WO2001001460A3 - Temperature controlled wafer chuck - Google Patents

Temperature controlled wafer chuck Download PDF

Info

Publication number
WO2001001460A3
WO2001001460A3 PCT/US2000/002236 US0002236W WO0101460A3 WO 2001001460 A3 WO2001001460 A3 WO 2001001460A3 US 0002236 W US0002236 W US 0002236W WO 0101460 A3 WO0101460 A3 WO 0101460A3
Authority
WO
WIPO (PCT)
Prior art keywords
chuck
top surface
temperature controlled
wafer chuck
temperature
Prior art date
Application number
PCT/US2000/002236
Other languages
French (fr)
Other versions
WO2001001460A9 (en
WO2001001460A2 (en
Inventor
Simon Costello
Tuyen Paul Pham
Original Assignee
Trio Tech Internat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trio Tech Internat filed Critical Trio Tech Internat
Priority to AU27433/00A priority Critical patent/AU2743300A/en
Publication of WO2001001460A2 publication Critical patent/WO2001001460A2/en
Publication of WO2001001460A3 publication Critical patent/WO2001001460A3/en
Publication of WO2001001460A9 publication Critical patent/WO2001001460A9/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection

Abstract

A temperature-controlled semiconductor wafer chuck system, the chuck being configured for mounting on a prober stage of a wafer probe test station. The chuck having a top surface and a bottom surface including a heat sink configuration for removal of thermal energy from the chuck. A primary heater configured to add heat to the chuck is adjacent the top surface of the chuck. A secondary heater is adjacent to the bottom of the chuck, whereby the temperature of the top surface of the chuck and the bottom of the chuck can be independently controlled.
PCT/US2000/002236 1999-01-26 2000-01-26 Temperature controlled wafer chuck WO2001001460A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU27433/00A AU2743300A (en) 1999-01-26 2000-01-27 A temperature controlled wafer chuck system with low thermal resistance

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/238,009 1999-01-26
US09/238,009 US6583638B2 (en) 1999-01-26 1999-01-26 Temperature-controlled semiconductor wafer chuck system

Publications (3)

Publication Number Publication Date
WO2001001460A2 WO2001001460A2 (en) 2001-01-04
WO2001001460A3 true WO2001001460A3 (en) 2001-05-03
WO2001001460A9 WO2001001460A9 (en) 2002-09-06

Family

ID=22896111

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/002236 WO2001001460A2 (en) 1999-01-26 2000-01-26 Temperature controlled wafer chuck

Country Status (3)

Country Link
US (2) US6583638B2 (en)
AU (1) AU2743300A (en)
WO (1) WO2001001460A2 (en)

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US20020017916A1 (en) 2002-02-14
US6583638B2 (en) 2003-06-24
US6605955B1 (en) 2003-08-12
WO2001001460A2 (en) 2001-01-04
AU2743300A (en) 2001-01-31

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