WO2001003298A1 - Oscillator circuit - Google Patents
Oscillator circuit Download PDFInfo
- Publication number
- WO2001003298A1 WO2001003298A1 PCT/EP2000/005635 EP0005635W WO0103298A1 WO 2001003298 A1 WO2001003298 A1 WO 2001003298A1 EP 0005635 W EP0005635 W EP 0005635W WO 0103298 A1 WO0103298 A1 WO 0103298A1
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- WO
- WIPO (PCT)
- Prior art keywords
- circuit
- capacitors
- capacitor array
- voltage
- current
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
Definitions
- This invention relates to an oscillator circuit, for example for generating a clock signal in an integrated circuit .
- Oscillator circuits are commonly used in integrated circuits to provide clock signals.
- the frequency of the resulting clock signal depends on parameters of the oscillator circuit.
- US-5,859,571 discloses a frequency trimmable oscillator, in which a current generator provides an output current, and also generates two threshold voltages.
- the current is switched into a delay unit, which includes two arrays of capacitors, one for providing coarse trimming of the output frequency, and one for providing fine trimming.
- the voltage on the capacitors is compared with the two threshold voltages, and the results of the comparisons are used to set and reset a flip-flop, with the time taken for each such cycle being the period of the output clock signal, such that the frequency is dependent on the value of the trimmed capacitance and is hence adjustable as desired.
- this circuit requires two arrays of capacitors.
- each capacitor has an associated parasitic capacitance.
- an oscillator circuit includes a current generator producing a current which is trimmable by means of a resistor array, and thus includes only a single capacitor array.
- an oscillator circuit includes a current generator which supplies current to input terminals of capacitors in a trimmable capacitor array.
- FIG. 1 is a block diagram of an oscillator circuit in accordance with the invention.
- Figure 2 is a schematic circuit diagram of a first sub-circuit forming part of the circuit of Figure 1.
- Figure 3 is a schematic circuit diagram of a second sub-circuit forming part of the circuit of Figure 1.
- Figure 4 is a schematic circuit diagram of a third sub-circuit forming part of the circuit of Figure 1.
- Figure 5 is a timing diagram for explaining the operation of the circuit of Figure 1. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
- FIG. 1 shows an oscillator circuit in accordance with aspects of the present invention.
- the oscillator circuit of Figure 1 includes a control circuit 2, which includes a current source 4.
- the current source 4 generates a current of magnitude Iset, which can be forced to flow out of or into the current source 4.
- the current source 4 further generates first and second threshold voltages Vu, VI, which are supplied as inputs to respective comparators 6, 8.
- the other inputs to these comparators 6, 8 are each supplied with a voltage of magnitude Vramp .
- the outputs of the comparators 6, 8 are connected to the Set and Reset terminals respectively of a flip-flop 10, and the output of the flip-flop 10 is fed back to the current source 4, and is also fed to a circuit output 12 is an output clock signal .
- a variable resistance circuit 14, including a resistor array 16, is connected to the current source 4, to alter the magnitude Iset of the current output therefrom.
- An operational amplifier 18 has its non-inverting input terminal 20 connected to a fixed reference voltage Vref, which may also be provided by the control circuit 2 if desired.
- the inverting input terminal 22 of the operational amplifier 20 is connected to an output of the current source 4.
- the output terminal 24 of the operational amplifier 18 provides an amplifier output voltage Vramp which, as mentioned above, is supplied to the control circuit 2 as an input to each of the comparators 6, 8.
- the operational amplifier 18 is generally conventional, and will not be described further herein.
- a capacitor array 26 is connected between the operational amplifier output terminal 24 and inverting input terminal 22, and thus forms a feedback loop around the amplifier.
- the voltage at the operational amplifier non-inverting input 20 is held constant relative to the supply voltage, the voltage at the operational amplifier inverting input 22 is also held relatively constant .
- the capacitor array includes a fixed capacitance (not shown in Figure 1) and a plurality of capacitors, which can be switched into or out of the circuit by means of a multiple bit digital signal.
- a multiple bit digital signal In a preferred embodiment, there are nine such capacitors, but Figure 1 shows only two capacitors CO, Cl, for clarity.
- Each capacitor CO, Cl, ... has a first terminal connected to the amplifier inverting input terminal 22 through a first respective switch 28.0, 28.1, ..., or is connected to ground through a second respective switch 30.0, 30.1, ....
- the switches are controlled by control bits B0, Bl, ..., such that, when a control bit is high, the respective first switch is closed, and, when a control bit is low, the respective second switch is closed.
- each capacitor CO, Cl, ... in the array 26 has an associated parasitic capacitance. Specifically, as shown in Figure 1, there is a parasitic capacitance 32.0, 32.1, ... between the first capacitor terminal and the substrate, and a parasitic capacitance 34.0, 34.1, ... between the second capacitor terminal and substrate.
- FIG. 2 is a schematic circuit diagram of the control circuit 2 of Figure 1.
- the control circuit includes a voltage divider 202 which provides the reference voltage Vref to the non- inverting input terminal of the operational amplifier 18.
- the control circuit also includes a current source 204, which has connections for the variable resistor array 16, and is controlled by the inverted circuit output voltage to produce the current output Iset .
- the first threshold voltage Vu is the gate voltage of PMOS transistors 206, 208
- the lower threshold voltage VI is the gate voltage of MOS transistors 210, 212.
- the control circuit 2 also includes a sub-unit 214 with comparators and a flip-flop, producing the inverted circuit output voltage .
- FIG 3 is a schematic circuit diagram of the variable resistor array 14 of Figure 1.
- the resistor array 14 includes four resistors 302, 304, 306, 308, and four CMOS switches 310, 312, 314, 316, which are of generally known type .
- the switches are connected in series with a fifth resistor 322 between terminals 318, 320, which are themselves connected to the current source 4.
- the switches 310, 312, 314, 316 are controlled by the binary signals DO, Dl, D2 , D3 respectively. When the respective binary value is low, the switch is closed, and when the respective binary value is high, the switch is open and the corresponding resistor is switched into the circuit.
- the resistor 302 has a value of 21k ⁇
- the resistors can advantageously be formed from blocks of matched resistors of value 21k ⁇ .
- the resistance value of the resistor array 14 can be varied between 315k ⁇ , if the switches are all closed, and 630k ⁇ , if the switches are all open.
- FIG 4 is a schematic circuit diagram of the variable capacitor array 26 of Figure 1.
- the capacitor array 26 includes nine capacitors 501, ..., 509, each connected in series with a respective switch 510, ..., 518 between terminals 519, 520 in the feedback loop of the operational amplifier 18. Also connected in parallel with the nine capacitors 501, ..., 509 is a capacitor 521.
- Each of the switches 510, ..., 518 is of the type shown in Figure 1, and is controlled by a respective binary digit B0, ...,B8. When the respective binary value is low, the corresponding capacitor is switched into the circuit, and when the corresponding binary value is high, the switch is open and the corresponding capacitor is switched out of the circui .
- the capacitor 510 has a value of 0.152pF
- capacitor 511 has a value of 2x0.152pF
- capacitor 512 has a value of 4x0.152pF
- capacitor 513 has a value of 8x0.152pF
- capacitor 514 has a value of 16x0.152pF
- capacitor 515 has a value of 32x0.152pF
- capacitor 516 has a value of 64x0.152pF
- capacitor 517 has a value of 128x0.152pF
- capacitor 518 has a value of 256x0.152pF
- capacitor 521 has a value of 305.5pF.
- These capacitors can advantageously be formed from blocks of matched capacitors of value 0.152pF, or 8x0.152pF, or 64x0.152pF.
- the capacitance value of the capacitor array 26 can be varied between 305.5pF, if all of the binary values B0-B9 are high and the corresponding capacitors are all switched out of the circuit, and 305.5pF + 511x0.152pF, if all of the binary values are low and the corresponding capacitors are all switched into the circuit.
- Integrated Circuit capacitors can have good matching, which allows a highly linear relationship between the value of the binary word B0-B9 and the trimmed capacitance value .
- the current source 4 produces a current Iset which is a function of the positive supply voltage, and is inversely proportional to the coarse trimmed resistance value of the resistor array 16.
- the current source 4 can act as a source or sink, and the direction of the current depends on the sign of the signal Vo at output 12 which is fed back to the current source.
- this signal When this signal is high, current flows into the current source 4 from the capacitor array 26, as shown by the arrow in Figure 1.
- this signal is low, current flows from the current source 4 into the capacitor array 26.
- the current Iset by flowing through the capacitor array 26, causes the output voltage Vramp of the operational amplifier 18 to increase or decrease linearly.
- the threshold voltages VI, Vu are set by the current source 4, and they are affected by changes in the supply voltage in the same way as the current Iset.
- the frequency of oscillation Fosc is the inverse of the period of one cycle.
- the period of one cycle is twice the time ⁇ t taken for the operational amplifier output voltage Vramp to increase from VI to Vu, or fall from Vu to VI.
- the upper and lower thresholds Vu, VI, and the current Iset might be related to the supply voltage Vdd and resistance Rset of the resistor array by equations such as :
- Vu Vdd - Vxl
- V ⁇ Vx2
- Iset (Vdd - Vxl - Vx2) I Rset where Vxl and Vx2 are unknown voltages . This gives :
- the frequency of oscillation is controlled by the trimmed values of resistance and capacitance, but is independent of fluctuations in the supply voltage Vdd.
- the capacitors C0-C8 have parasitic capacitances associated therewith.
- the circuit of the present invention minimizes any problems caused thereby.
- the operational amplifier 18 has a high gain, and the non-inverting input terminal is held at a constant voltage.
- the operational amplifier acts to keep the voltages at its two input terminals at the same level, and the voltage at the inverting input is kept generally constant. As a result, the voltages across the parasitic capacitances 32.0, 32.1 etc.
- the oscillator frequency Fosc has an accurate and linear relationship to the total value of the intended capacitance Ct .
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00942099A EP1196993B1 (en) | 1999-07-01 | 2000-06-19 | Oscillator circuit |
KR1020017016649A KR20020019110A (en) | 1999-07-01 | 2000-06-19 | Oscillator circuit |
AU56837/00A AU5683700A (en) | 1999-07-01 | 2000-06-19 | Oscillator circuit |
CA002377969A CA2377969A1 (en) | 1999-07-01 | 2000-06-19 | Oscillator circuit |
DE60031408T DE60031408D1 (en) | 1999-07-01 | 2000-06-19 | OSCILLATOR CIRCUIT |
JP2001508596A JP2003504910A (en) | 1999-07-01 | 2000-06-19 | Oscillation circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9915421.3 | 1999-07-01 | ||
GB9915421A GB2351619A (en) | 1999-07-01 | 1999-07-01 | A frequency trimmable oscillator with insensitivity to power supply variations and parasitic capacitance |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001003298A1 true WO2001003298A1 (en) | 2001-01-11 |
Family
ID=10856444
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2000/005635 WO2001003298A1 (en) | 1999-07-01 | 2000-06-19 | Oscillator circuit |
Country Status (12)
Country | Link |
---|---|
US (1) | US6326859B1 (en) |
EP (1) | EP1196993B1 (en) |
JP (1) | JP2003504910A (en) |
KR (1) | KR20020019110A (en) |
CN (1) | CN1214525C (en) |
AT (1) | ATE343248T1 (en) |
AU (1) | AU5683700A (en) |
CA (1) | CA2377969A1 (en) |
DE (1) | DE60031408D1 (en) |
GB (1) | GB2351619A (en) |
TW (1) | TW478253B (en) |
WO (1) | WO2001003298A1 (en) |
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EP0578020A2 (en) * | 1992-06-29 | 1994-01-12 | Siemens Audiologische Technik GmbH | Hearing aid with an integrated circuit |
US5670915A (en) * | 1996-05-24 | 1997-09-23 | Microchip Technology Incorporated | Accurate RC oscillator having peak - to - peak voltage control |
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US3878484A (en) * | 1974-01-11 | 1975-04-15 | Hekimian Laboratories Inc | Oscillator having output frequency linearly related to resistance |
EP0308540B1 (en) | 1983-11-17 | 1993-01-27 | Kabushiki Kaisha Toshiba | Oscillator circuit |
GB2189113B (en) | 1986-04-12 | 1990-04-25 | Thorn Emi Datatech Ltd | A voltage-controlled oscillator |
JPH0334619A (en) * | 1989-06-29 | 1991-02-14 | Nec Corp | Cr oscillator circuit |
US5128634A (en) | 1990-10-29 | 1992-07-07 | Motorola, Inc. | Oscillator cirucit independent or parasitic capacitors |
SE512841C2 (en) | 1991-09-10 | 2000-05-22 | Ericsson Telefon Ab L M | Harmonizers including an ECL differential amplifier |
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US5796312A (en) | 1996-05-24 | 1998-08-18 | Microchip Technology Incorporated | Microcontroller with firmware selectable oscillator trimming |
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WO1998020609A1 (en) | 1996-11-04 | 1998-05-14 | Advanced Micro Devices, Inc. | Low power wake-up system and method |
-
1999
- 1999-07-01 GB GB9915421A patent/GB2351619A/en not_active Withdrawn
- 1999-09-10 TW TW088115647A patent/TW478253B/en not_active IP Right Cessation
-
2000
- 2000-06-19 CN CNB008098794A patent/CN1214525C/en not_active Expired - Fee Related
- 2000-06-19 EP EP00942099A patent/EP1196993B1/en not_active Expired - Lifetime
- 2000-06-19 AU AU56837/00A patent/AU5683700A/en not_active Abandoned
- 2000-06-19 AT AT00942099T patent/ATE343248T1/en not_active IP Right Cessation
- 2000-06-19 JP JP2001508596A patent/JP2003504910A/en not_active Withdrawn
- 2000-06-19 KR KR1020017016649A patent/KR20020019110A/en not_active Application Discontinuation
- 2000-06-19 CA CA002377969A patent/CA2377969A1/en not_active Abandoned
- 2000-06-19 DE DE60031408T patent/DE60031408D1/en not_active Expired - Lifetime
- 2000-06-19 WO PCT/EP2000/005635 patent/WO2001003298A1/en active IP Right Grant
- 2000-06-30 US US09/609,061 patent/US6326859B1/en not_active Expired - Fee Related
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EP0407269A1 (en) * | 1989-07-07 | 1991-01-09 | STMicroelectronics S.A. | Integrated circuit with adjustable oscillator and frequency independent of the supply voltage |
EP0578020A2 (en) * | 1992-06-29 | 1994-01-12 | Siemens Audiologische Technik GmbH | Hearing aid with an integrated circuit |
US5670915A (en) * | 1996-05-24 | 1997-09-23 | Microchip Technology Incorporated | Accurate RC oscillator having peak - to - peak voltage control |
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Also Published As
Publication number | Publication date |
---|---|
EP1196993A1 (en) | 2002-04-17 |
TW478253B (en) | 2002-03-01 |
EP1196993B1 (en) | 2006-10-18 |
CA2377969A1 (en) | 2001-01-11 |
KR20020019110A (en) | 2002-03-09 |
GB2351619A (en) | 2001-01-03 |
ATE343248T1 (en) | 2006-11-15 |
AU5683700A (en) | 2001-01-22 |
GB9915421D0 (en) | 1999-09-01 |
DE60031408D1 (en) | 2006-11-30 |
CN1359559A (en) | 2002-07-17 |
CN1214525C (en) | 2005-08-10 |
US6326859B1 (en) | 2001-12-04 |
JP2003504910A (en) | 2003-02-04 |
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