WO2001026218A1 - Programmable gain feedback amplifier and method for maintaining constant phase - Google Patents

Programmable gain feedback amplifier and method for maintaining constant phase Download PDF

Info

Publication number
WO2001026218A1
WO2001026218A1 PCT/US2000/027639 US0027639W WO0126218A1 WO 2001026218 A1 WO2001026218 A1 WO 2001026218A1 US 0027639 W US0027639 W US 0027639W WO 0126218 A1 WO0126218 A1 WO 0126218A1
Authority
WO
WIPO (PCT)
Prior art keywords
operational amplifier
transconductance
gain
closed loop
current
Prior art date
Application number
PCT/US2000/027639
Other languages
French (fr)
Inventor
Craig L. Robertson
Original Assignee
Tripath Technology Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tripath Technology Inc. filed Critical Tripath Technology Inc.
Priority to AU78669/00A priority Critical patent/AU7866900A/en
Publication of WO2001026218A1 publication Critical patent/WO2001026218A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier in emitter-coupled or cascode amplifiers

Definitions

  • This invention relates to operational amplifiers and in particular to phase margin control.
  • the maximum usable bandwidth is constrained by the need to maintain positive phase margin (i.e., the total phase shift must be less than 180 degrees) at frequencies below the threshold where the open loop gain is greater than the closed loop gain.
  • this threshold is usually set at an open loop gain of 1.0. This constraint allows the opamp to be used as a voltage follower when it is connected in such a unity gain configuration.
  • this threshold is set at a higher gain. Unfortunately, this constrains the opamp to operation only above certain gain levels. Nevertheless there is an advantage in that the opamp typically requires less compensation and in that the Gain- Bandwidth product can be increased, allowing improved circuit performance at the higher gain.
  • the dominant pole is typically (but not always) implemented with a stage that provides a device gain or transconductance (I 0ut V ), denoted G m , that drives a compensation capacitor of value C.
  • the dominant pole bandwidth is the value G m /C. This provides a 90 degree phase shift.
  • the values of G m and C are selected so that the open loop system gain A v (s) of the dominant pole G m /C drops to a sufficiently low value before the sum of the secondary pole phase shifts reaches a value that results in instability. What is needed is a mechanism for optimizing bandwidth while maintaining stability.
  • current contributing to transconductance G m is controllably varied so that the operational amplifier maintains a constant phase margin at different closed loop gain settings without requiring a change in compensation capacitance.
  • adequate phase margins can be maintained, allowing better settling behavior.
  • the bandwidth of the operational amplifier is maximized while still maintaining the same phase margin.
  • Fig. 1 is a circuit diagram of a generalized front end of a generalized differential input operational amplifier according to the invention.
  • Fig. 2 is a generalized block diagram of an operational amplifier according to the invention.
  • Fig. 3 is a generalized block diagram of an operational amplifier in a typical inverting gain configuration with resistive closed loop gain control.
  • FIG. 1 shows the front end 10 of a generalized operational amplifier circuit according to the invention.
  • a simple folded cascode amplifier is a representative example of this type of circuit.
  • Bipolar input devices 12, 14 generate the transconductance G m - (The input device may also be FET devices.)
  • An optional folded cascode output stage 16 is frequently employed.
  • the G m of the input stage is applied to one or more compensation capacitors C at the output 11, providing a unity Gain-Bandwidth for the dominant pole at G m /C.
  • the capacitor(s) C may be coupled to a different low impedance point than ground.
  • the value of transconductance G m is varied so that it tracks the value of the closed loop gain G s developed by the external feedback attenuation.
  • the transconductance G m is proportional to the current value I at 22 in the input stage.
  • the input stage current is varied in a linear relationship with the desired closed loop gain G s .
  • the transconductance G m is varied by changing the value of the bias current I at 22 through the differential pair 12, 14. Specifically, the current source 22 is varied while other parameters are held constant in order to vary the transconductance .
  • the sum of the load currents L 18, 20 is equal to the sum of the cascode currents I c at 26, 28 and the bias current I at 22.
  • the G m is proportional to the square root of the current (when above threshold)
  • the current must vary quadratically. Varying the current and thus the gain allows the opamp to maintain a constant phase margin at different gain settings without having to change the compensation capacitor. At low gain settings adequate phase margins can be maintained, allowing better settling behavior. At higher gain settings, the bandwidth of the opamp is maximized while still maintaining the same phase margin.
  • Fig. 2 is a generalized block diagram of an operational amplifier 30 according to the invention showing the transconductance stage 11 and an output stage 32 illustrating in particular the formation of the compensation capacitance C.
  • Fig. 3 is a generalized block diagram of the operational amplifier 30 in a typical inverting gain configuration with resistive closed loop gain control by means of variable resistors R L and R 2 .
  • the transconductance G m is varied by varying the current I at 22 (Fig. 1) linearly with the variation of the resistance values R L and R under control of control logic 50.
  • Control logic 50 may be analog or digital.
  • One implementation of current control is a bank of parallel switched current sources wherein the controller selectively activates individual current sources.
  • one implementation of the variable resistances is a bank of switched resistors in series or parallel where the controller respectively shorts or opens the circuits including the individual resistors.

Abstract

In an operational amplifier (30), current and thus the gain is varied to allow the operational amplifier to maintain a constant phase margin at different gain settings without having to change the compensation capacitor (C). At low gain settings decent phase margins can be maintained, allowing better settling behaviour. At higher gain settings, the bandwidth of the operational amplifier is maximized while still maintaining the same phase margin.

Description

PROGRAMMABLE GAIN FEEDBACK AMPLIFIER AND METHOD FOR MAINTAINING CONSTANT PHASE
BACKGROUND OF THE INVENTION This invention relates to operational amplifiers and in particular to phase margin control.
In a conventional operational amplifier (opamp), the maximum usable bandwidth is constrained by the need to maintain positive phase margin (i.e., the total phase shift must be less than 180 degrees) at frequencies below the threshold where the open loop gain is greater than the closed loop gain.
In a general purpose opamp, this threshold is usually set at an open loop gain of 1.0. This constraint allows the opamp to be used as a voltage follower when it is connected in such a unity gain configuration.
In some opamps, this threshold is set at a higher gain. Unfortunately, this constrains the opamp to operation only above certain gain levels. Nevertheless there is an advantage in that the opamp typically requires less compensation and in that the Gain- Bandwidth product can be increased, allowing improved circuit performance at the higher gain.
In a typical opamp, there is a single dominant pole coupled with a number of secondary undesired poles. The dominant pole is typically (but not always) implemented with a stage that provides a device gain or transconductance (I0ut V ), denoted Gm, that drives a compensation capacitor of value C. The dominant pole bandwidth is the value Gm/C. This provides a 90 degree phase shift. The values of Gm and C are selected so that the open loop system gain Av(s) of the dominant pole Gm/C drops to a sufficiently low value before the sum of the secondary pole phase shifts reaches a value that results in instability. What is needed is a mechanism for optimizing bandwidth while maintaining stability.
SUMMARY OF THE INVENTION
According to the invention, in an operational amplifier, current contributing to transconductance Gm is controllably varied so that the operational amplifier maintains a constant phase margin at different closed loop gain settings without requiring a change in compensation capacitance. At low closed loop gain settings, adequate phase margins can be maintained, allowing better settling behavior. At higher closed loop gain settings, the bandwidth of the operational amplifier is maximized while still maintaining the same phase margin.
The invention will be better understood by reference to the following detailed description in connection with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a circuit diagram of a generalized front end of a generalized differential input operational amplifier according to the invention.
Fig. 2 is a generalized block diagram of an operational amplifier according to the invention.
Fig. 3 is a generalized block diagram of an operational amplifier in a typical inverting gain configuration with resistive closed loop gain control.
DESCRIPTION OF SPECIFIC EMBODIMENTS Figure 1 shows the front end 10 of a generalized operational amplifier circuit according to the invention. A simple folded cascode amplifier is a representative example of this type of circuit. Bipolar input devices 12, 14 generate the transconductance Gm- (The input device may also be FET devices.) An optional folded cascode output stage 16 is frequently employed. The Gm of the input stage is applied to one or more compensation capacitors C at the output 11, providing a unity Gain-Bandwidth for the dominant pole at Gm/C. The capacitor(s) C may be coupled to a different low impedance point than ground.
According to the invention, the value of transconductance Gm is varied so that it tracks the value of the closed loop gain Gs developed by the external feedback attenuation. With a front end stage based on bipolar devices, the transconductance Gm is proportional to the current value I at 22 in the input stage. The input stage current is varied in a linear relationship with the desired closed loop gain Gs.
In one embodiment the transconductance Gm is varied by changing the value of the bias current I at 22 through the differential pair 12, 14. Specifically, the current source 22 is varied while other parameters are held constant in order to vary the transconductance . The sum of the load currents L 18, 20 is equal to the sum of the cascode currents Ic at 26, 28 and the bias current I at 22.
In another embodiment the front end Gm stage, where the bipolar devices are replaced by an FET pair, the Gm is proportional to the square root of the current (when above threshold) To vary the Gm linearly, the current must vary quadratically. Varying the current and thus the gain allows the opamp to maintain a constant phase margin at different gain settings without having to change the compensation capacitor. At low gain settings adequate phase margins can be maintained, allowing better settling behavior. At higher gain settings, the bandwidth of the opamp is maximized while still maintaining the same phase margin.
Fig. 2 is a generalized block diagram of an operational amplifier 30 according to the invention showing the transconductance stage 11 and an output stage 32 illustrating in particular the formation of the compensation capacitance C. The compensation capacitance is a combination of the capacitance to ground 34 CG and the feedback or Miller capacitance Cm (36) multiplied by the gain of the output stage 32 G0 plus 1, or C = CG + Cm(G0 + 1). Fig. 3 is a generalized block diagram of the operational amplifier 30 in a typical inverting gain configuration with resistive closed loop gain control by means of variable resistors RL and R2. The closed loop gain Gs is the ratio of the output voltage to the input voltage which is established by the ratio of the feedback resistance to the load resistance or Gs = Vout/Vjn = - R2/RL (where V has a phase component). According to the invention, the transconductance Gm is varied by varying the current I at 22 (Fig. 1) linearly with the variation of the resistance values RL and R under control of control logic 50. Control logic 50 may be analog or digital. One implementation of current control is a bank of parallel switched current sources wherein the controller selectively activates individual current sources. Similarly one implementation of the variable resistances is a bank of switched resistors in series or parallel where the controller respectively shorts or opens the circuits including the individual resistors.
The invention has been explained with reference to specific embodiments. Other embodiments will be evident to those of ordinary skill in the art. It is therefore not intended that this invention be limited except as indicated by the appended claims.

Claims

WHAT IS CLAIMED IS:
1. In an operational amplifier, a method for maintaining constant phase margin at different closed loop gain settings without having to change the compensation capacitance comprising: varying transconductance of the operational amplifier in proportion to the selected closed loop gain.
2. The method according to claim 1 wherein said varying of transconductance comprises varying current through the input stage of said operational amplifier.
3. The method according to claim 2 wherein said selected closed loop gain is a ratio of a load resistance and a feedback resistance.
4. The method according to claim 3 wherein at least one of said load resistance and said feedback resistance is variable.
5. An operational amplifier system comprising: a input stage having controllable transconductance; a compensation capacitance which is nominally fixed; a load resistance; a feedback resistance; and a controller for controlling said transconductance and at least one of said load resistance and said feedback resistance.
6. The operational amplifier system according to claim 5 wherein said controllable transconductance is a controllable current.
PCT/US2000/027639 1999-10-06 2000-10-06 Programmable gain feedback amplifier and method for maintaining constant phase WO2001026218A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU78669/00A AU7866900A (en) 1999-10-06 2000-10-06 Programmable gain feedback amplifier and method for maintaining constant phase

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15802299P 1999-10-06 1999-10-06
US60/158,022 1999-10-06

Publications (1)

Publication Number Publication Date
WO2001026218A1 true WO2001026218A1 (en) 2001-04-12

Family

ID=22566382

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/027639 WO2001026218A1 (en) 1999-10-06 2000-10-06 Programmable gain feedback amplifier and method for maintaining constant phase

Country Status (2)

Country Link
AU (1) AU7866900A (en)
WO (1) WO2001026218A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022746A (en) * 2014-06-20 2014-09-03 威海北洋光电信息技术股份公司 Operational amplifier circuit with fixed bandwidth and real-time variable gain
US9531086B1 (en) 2016-01-06 2016-12-27 International Business Machines Corporation Dynamic phased array tapering without phase recalibration

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5625317A (en) * 1994-08-08 1997-04-29 Texas Instruments Incorporated Tuning method for integrated continuous-time filters
US5631598A (en) * 1995-06-07 1997-05-20 Analog Devices, Inc. Frequency compensation for a low drop-out regulator
US5726600A (en) * 1996-01-17 1998-03-10 Hughes Aircraft Company NPN bipolar circuit topology for a tunable transconductance cell and positive current source
US5886579A (en) * 1996-05-28 1999-03-23 Analog Devices, Inc. Variable gain CMOS amplifier
US6127890A (en) * 1998-07-14 2000-10-03 Fujitsu Limited Variable gain circuit with improved gain response

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5625317A (en) * 1994-08-08 1997-04-29 Texas Instruments Incorporated Tuning method for integrated continuous-time filters
US5631598A (en) * 1995-06-07 1997-05-20 Analog Devices, Inc. Frequency compensation for a low drop-out regulator
US5726600A (en) * 1996-01-17 1998-03-10 Hughes Aircraft Company NPN bipolar circuit topology for a tunable transconductance cell and positive current source
US5886579A (en) * 1996-05-28 1999-03-23 Analog Devices, Inc. Variable gain CMOS amplifier
US6127890A (en) * 1998-07-14 2000-10-03 Fujitsu Limited Variable gain circuit with improved gain response

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022746A (en) * 2014-06-20 2014-09-03 威海北洋光电信息技术股份公司 Operational amplifier circuit with fixed bandwidth and real-time variable gain
US9531086B1 (en) 2016-01-06 2016-12-27 International Business Machines Corporation Dynamic phased array tapering without phase recalibration
US10008995B2 (en) 2016-01-06 2018-06-26 International Business Machines Corporation Dynamic phased array tapering without phase recalibration
US10298190B2 (en) 2016-01-06 2019-05-21 International Business Machines Corporation Dynamic phased array tapering without phase recalibration
US10693429B2 (en) 2016-01-06 2020-06-23 International Business Machines Corporation Dynamic phased array tapering without phase recalibration
US10749489B2 (en) 2016-01-06 2020-08-18 International Business Machines Corporation Dynamic phased array tapering without phase recalibration

Also Published As

Publication number Publication date
AU7866900A (en) 2001-05-10

Similar Documents

Publication Publication Date Title
US7116164B1 (en) Variable-gain constant-bandwidth transimpedance amplifier
US3991380A (en) Complementary field effect transistor differential amplifier
US7205845B2 (en) Amplifier circuit for converting the current signal from an optical receiving element into a voltage signal
US5936466A (en) Differential operational transconductance amplifier
US5999052A (en) High speed, fine-resolution gain programmable amplifier
EP1715579B1 (en) Analogue multiplier
US20050285674A1 (en) Adapting operational amplifier frequency response respective to closed loop gain
US5834976A (en) Frequency self-compensated operational amplifier
EP0320471B1 (en) Common mode sensing and control in balanced amplifier chains
US20030030491A1 (en) Open loop variable gain amplifier using replica gain cell
US5825250A (en) Operational amplifier having an adjustable frequency compensation
US5389893A (en) Circuit for a controllable amplifier
EP0234435B1 (en) Low-frequency power amplifier, in particular of the integrated type
US6028482A (en) Wide dynamic range transimpedance amplifier circuit
US6057737A (en) Non-linear asymmetrical audio amplifiers
JP4015237B2 (en) Low noise amplifier structure
KR20170094427A (en) Active rc filters
US7928800B2 (en) Programmable compensation network for operational amplifiers
US7239202B1 (en) Variable-gain constant-bandwidth transimpedance amplifier
WO2001026218A1 (en) Programmable gain feedback amplifier and method for maintaining constant phase
Leung et al. 10-MHz 60-dB dynamic-range 6-dB variable gain amplifier
US4437070A (en) Amplifier arrangement whose overall gain is controllable by means of a control voltage
US20180152157A1 (en) Programmable gain amplifier
US5166983A (en) Mute circuit for audio amplifiers
US4972158A (en) Transistor amplifier with variable bias circuits

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP