WO2001044929A3 - Length decoder to detect one-byte prefixes and branch instructions - Google Patents

Length decoder to detect one-byte prefixes and branch instructions Download PDF

Info

Publication number
WO2001044929A3
WO2001044929A3 PCT/US2000/041327 US0041327W WO0144929A3 WO 2001044929 A3 WO2001044929 A3 WO 2001044929A3 US 0041327 W US0041327 W US 0041327W WO 0144929 A3 WO0144929 A3 WO 0144929A3
Authority
WO
WIPO (PCT)
Prior art keywords
detect
branch instructions
length decoder
prefixes
byte
Prior art date
Application number
PCT/US2000/041327
Other languages
French (fr)
Other versions
WO2001044929A2 (en
Inventor
Frederick Russell Gruner
Bharat Zaveri
Original Assignee
Intel Corp
Frederick Russell Gruner
Bharat Zaveri
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Frederick Russell Gruner, Bharat Zaveri filed Critical Intel Corp
Priority to AU27459/01A priority Critical patent/AU2745901A/en
Priority to GB0215172A priority patent/GB2373901B/en
Publication of WO2001044929A2 publication Critical patent/WO2001044929A2/en
Publication of WO2001044929A3 publication Critical patent/WO2001044929A3/en
Priority to HK02108126.8A priority patent/HK1046574B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3818—Decoding for concurrent execution
    • G06F9/382—Pipelined decoding, e.g. using predecoding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G06F9/30152—Determining start or end of instruction; determining instruction length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing

Abstract

A system and method for pre-decoding one-byte instruction prefixes and branch instruction indicators is described. A static line detect generates a number of instruction indicators. Further, a prefix and branch decode unit combines at least two of the number of instruction indicators, and a pre-decode unit decodes the combined instruction indicators.
PCT/US2000/041327 1999-12-17 2000-10-19 Length decoder to detect one-byte prefixes and branch instructions WO2001044929A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU27459/01A AU2745901A (en) 1999-12-17 2000-10-19 Length decode to detect one-byte prefixes and branch
GB0215172A GB2373901B (en) 1999-12-17 2000-10-19 Length decode to detect one-byte prefixes and branch
HK02108126.8A HK1046574B (en) 1999-12-17 2002-11-08 Length decode to detect one-byte prefixes and branch

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/466,534 US6496923B1 (en) 1999-12-17 1999-12-17 Length decode to detect one-byte prefixes and branch
US09/466,534 1999-12-17

Publications (2)

Publication Number Publication Date
WO2001044929A2 WO2001044929A2 (en) 2001-06-21
WO2001044929A3 true WO2001044929A3 (en) 2001-12-13

Family

ID=23852125

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/041327 WO2001044929A2 (en) 1999-12-17 2000-10-19 Length decoder to detect one-byte prefixes and branch instructions

Country Status (6)

Country Link
US (1) US6496923B1 (en)
CN (1) CN1186719C (en)
AU (1) AU2745901A (en)
GB (1) GB2373901B (en)
HK (1) HK1046574B (en)
WO (1) WO2001044929A2 (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8121828B2 (en) 1999-01-28 2012-02-21 Ati Technologies Ulc Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions
US8127121B2 (en) 1999-01-28 2012-02-28 Ati Technologies Ulc Apparatus for executing programs for a first computer architechture on a computer of a second architechture
US8074055B1 (en) 1999-01-28 2011-12-06 Ati Technologies Ulc Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
US7941647B2 (en) * 1999-01-28 2011-05-10 Ati Technologies Ulc Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination
US7213129B1 (en) * 1999-08-30 2007-05-01 Intel Corporation Method and system for a two stage pipelined instruction decode and alignment using previous instruction length
US6981132B2 (en) * 2000-08-09 2005-12-27 Advanced Micro Devices, Inc. Uniform register addressing using prefix byte
US6807616B1 (en) * 2001-08-09 2004-10-19 Advanced Micro Devices, Inc. Memory address checking in a proccesor that support both a segmented and a unsegmented address space
US7447886B2 (en) * 2002-04-22 2008-11-04 Freescale Semiconductor, Inc. System for expanded instruction encoding and method thereof
EP1387256B1 (en) 2002-07-31 2018-11-21 Texas Instruments Incorporated Program counter adjustment based on the detection of an instruction prefix
US7917734B2 (en) * 2003-06-30 2011-03-29 Intel Corporation Determining length of instruction with multiple byte escape code based on information from other than opcode byte
US20060155974A1 (en) * 2005-01-07 2006-07-13 Moyer William C Data processing system having flexible instruction capability and selection mechanism
US7487334B2 (en) * 2005-02-03 2009-02-03 International Business Machines Corporation Branch encoding before instruction cache write
US7421568B2 (en) * 2005-03-04 2008-09-02 Qualcomm Incorporated Power saving methods and apparatus to selectively enable cache bits based on known processor state
US7620797B2 (en) * 2006-11-01 2009-11-17 Apple Inc. Instructions for efficiently accessing unaligned vectors
US7624251B2 (en) * 2006-11-01 2009-11-24 Apple Inc. Instructions for efficiently accessing unaligned partial vectors
US8281109B2 (en) * 2007-12-27 2012-10-02 Intel Corporation Compressed instruction format
CN101887358B (en) * 2009-05-19 2014-06-25 威盛电子股份有限公司 Device and method suitable for a microprocessor
US8335910B2 (en) * 2009-05-19 2012-12-18 Via Technologies, Inc. Early release of cache data with start/end marks when instructions are only partially present
GB2521019B (en) * 2014-05-27 2016-05-25 Imagination Tech Ltd Decoding instructions that are modified by one or more other instructions

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586277A (en) * 1994-03-01 1996-12-17 Intel Corporation Method for parallel steering of fixed length fields containing a variable length instruction from an instruction buffer to parallel decoders
US5758116A (en) * 1994-09-30 1998-05-26 Intel Corporation Instruction length decoder for generating output length indicia to identity boundaries between variable length instructions
US5822559A (en) * 1996-01-02 1998-10-13 Advanced Micro Devices, Inc. Apparatus and method for aligning variable byte-length instructions to a plurality of issue positions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353420A (en) * 1992-08-10 1994-10-04 Intel Corporation Method and apparatus for decoding conditional jump instructions in a single clock in a computer processor
US5537629A (en) * 1994-03-01 1996-07-16 Intel Corporation Decoder for single cycle decoding of single prefixes in variable length instructions
US6175908B1 (en) * 1998-04-30 2001-01-16 Advanced Micro Devices, Inc. Variable byte-length instructions using state of function bit of second byte of plurality of instructions bytes as indicative of whether first byte is a prefix byte

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586277A (en) * 1994-03-01 1996-12-17 Intel Corporation Method for parallel steering of fixed length fields containing a variable length instruction from an instruction buffer to parallel decoders
US5758116A (en) * 1994-09-30 1998-05-26 Intel Corporation Instruction length decoder for generating output length indicia to identity boundaries between variable length instructions
US5822559A (en) * 1996-01-02 1998-10-13 Advanced Micro Devices, Inc. Apparatus and method for aligning variable byte-length instructions to a plurality of issue positions

Also Published As

Publication number Publication date
GB2373901A (en) 2002-10-02
GB2373901B (en) 2004-07-14
AU2745901A (en) 2001-06-25
US6496923B1 (en) 2002-12-17
CN1186719C (en) 2005-01-26
HK1046574B (en) 2004-12-31
GB0215172D0 (en) 2002-08-07
HK1046574A1 (en) 2003-01-17
CN1434937A (en) 2003-08-06
WO2001044929A2 (en) 2001-06-21

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