WO2001047174A3 - Dynamic parity inversion for i/o interconnects - Google Patents

Dynamic parity inversion for i/o interconnects Download PDF

Info

Publication number
WO2001047174A3
WO2001047174A3 PCT/US2000/042169 US0042169W WO0147174A3 WO 2001047174 A3 WO2001047174 A3 WO 2001047174A3 US 0042169 W US0042169 W US 0042169W WO 0147174 A3 WO0147174 A3 WO 0147174A3
Authority
WO
WIPO (PCT)
Prior art keywords
parity
data
header
interconnects
agent
Prior art date
Application number
PCT/US2000/042169
Other languages
French (fr)
Other versions
WO2001047174A2 (en
Inventor
Randy B Osborne
Jasmin Ajanovic
Original Assignee
Intel Corp
Randy B Osborne
Jasmin Ajanovic
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Randy B Osborne, Jasmin Ajanovic filed Critical Intel Corp
Priority to GB0215178A priority Critical patent/GB2374263B/en
Priority to AU45063/01A priority patent/AU4506301A/en
Priority to DE10085335T priority patent/DE10085335B4/en
Publication of WO2001047174A2 publication Critical patent/WO2001047174A2/en
Publication of WO2001047174A3 publication Critical patent/WO2001047174A3/en
Priority to HK02108398.9A priority patent/HK1047005B/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Abstract

A method of detecting synchronization errors during the transfer of data in which a transmitting agent sends to the receiving agent either: (a) data parity encoded with a data parity function when the transmitting agent encodes data in one or more clock signals, or (b) header parity encoded with a header parity function when the transmitting agent encodes header information in the one or more clock signals. A synchronization error condition is detected when the receiving agent either: (a) is configured to receive the data parity and actually receives the header parity, or (b) is configured to receive the header parity and actually receives the data parity.
PCT/US2000/042169 1999-12-22 2000-11-13 Dynamic parity inversion for i/o interconnects WO2001047174A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB0215178A GB2374263B (en) 1999-12-22 2000-11-13 Dynamic parity inversion for I/O interconnects
AU45063/01A AU4506301A (en) 1999-12-22 2000-11-13 Dynamic parity inversion for i/o interconnects
DE10085335T DE10085335B4 (en) 1999-12-22 2000-11-13 Dynamic parity inversion for I / O connections
HK02108398.9A HK1047005B (en) 1999-12-22 2002-11-20 Dynamic parity inversion for i/o interconnects

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/469,397 1999-12-22
US09/469,397 US6587988B1 (en) 1999-12-22 1999-12-22 Dynamic parity inversion for I/O interconnects

Publications (2)

Publication Number Publication Date
WO2001047174A2 WO2001047174A2 (en) 2001-06-28
WO2001047174A3 true WO2001047174A3 (en) 2002-09-26

Family

ID=23863624

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/042169 WO2001047174A2 (en) 1999-12-22 2000-11-13 Dynamic parity inversion for i/o interconnects

Country Status (7)

Country Link
US (3) US6587988B1 (en)
AU (1) AU4506301A (en)
DE (1) DE10085335B4 (en)
GB (1) GB2374263B (en)
HK (1) HK1047005B (en)
TW (1) TW511360B (en)
WO (1) WO2001047174A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7246954B2 (en) 2004-08-09 2007-07-24 Avago Technologies Fiber Ip (Singapore) Ltd. Pte. Opto-electronic housing and optical assembly
US8806269B2 (en) * 2011-06-28 2014-08-12 International Business Machines Corporation Unified, workload-optimized, adaptive RAS for hybrid systems

Citations (2)

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EP0837613A2 (en) * 1996-10-16 1998-04-22 Lucent Technologies Inc. Messaging protocol for use in a telecommunications network
US5928375A (en) * 1997-01-08 1999-07-27 International Business Machines Corporation Method for enhancing data transmission in parity based data processing systems

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US4346474A (en) 1980-07-03 1982-08-24 International Business Machines Corporation Even-odd parity checking for synchronous data transmission
US4412329A (en) * 1981-10-15 1983-10-25 Sri International Parity bit lock-on method and apparatus
NZ221479A (en) 1986-08-22 1990-09-26 Transcom Australia Ltd Modem with sync regeneration for hf radio
US5003535A (en) * 1989-06-23 1991-03-26 At&T Bell Laboratories Packet synchronization utilizing a multi-length packet format including check sequences
JPH04211547A (en) * 1990-03-20 1992-08-03 Fujitsu Ltd Synchronous circuit
EP0540007B1 (en) * 1991-10-29 1999-01-07 Nippon Hoso Kyokai Method and apparatus for the reception of information signals
GB9213273D0 (en) * 1992-06-23 1992-08-05 Digital Equipment Int Efficient atm cell synchronization
JP2818534B2 (en) * 1993-09-28 1998-10-30 日本電気株式会社 Coded modulation method
US5410546A (en) 1993-11-01 1995-04-25 Storage Technology Corporation Apparatus and method for CRC computation over fixed length blocks containing variable length packets of data received out of order
EP1083703B1 (en) 1994-03-09 2003-06-04 Matsushita Electric Industrial Co., Ltd. Data transmission system and method
JP3129143B2 (en) 1994-05-31 2001-01-29 松下電器産業株式会社 Data transfer method
JP3149328B2 (en) 1995-01-09 2001-03-26 松下電器産業株式会社 Transmitter and receiver
US5881247A (en) 1995-11-30 1999-03-09 Allen-Bradley Company Llc System having a plurality of frame bytes capable of identifying addressed recipients and assert a busy signal onto the backplane bus to forthrightly abort the message transfer
US5996032A (en) 1996-04-30 1999-11-30 Texas Instruments Incorporated System for writing a plurality of data bits less than from the total number of bits in a data register using a single register write operation
DE19733748C2 (en) * 1997-08-04 1999-07-15 Bosch Gmbh Robert Data transfer device
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US6279140B1 (en) 1999-01-07 2001-08-21 International Business Machines Corporation Method and apparatus for checksum verification with receive packet processing

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0837613A2 (en) * 1996-10-16 1998-04-22 Lucent Technologies Inc. Messaging protocol for use in a telecommunications network
US5928375A (en) * 1997-01-08 1999-07-27 International Business Machines Corporation Method for enhancing data transmission in parity based data processing systems

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"METHOD FOR CONVERTING TDM DATA INTO PACKETS FOR TRANSPORT IN A FAST-PACKET SWITCH", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 35, no. 4A, 1 September 1992 (1992-09-01), pages 123 - 131, XP000314706, ISSN: 0018-8689 *

Also Published As

Publication number Publication date
DE10085335T1 (en) 2002-12-05
US20030126552A1 (en) 2003-07-03
HK1047005A1 (en) 2003-01-30
HK1047005B (en) 2004-04-23
DE10085335B4 (en) 2006-03-23
GB0215178D0 (en) 2002-08-07
GB2374263B (en) 2003-12-10
GB2374263A (en) 2002-10-09
US6574777B2 (en) 2003-06-03
TW511360B (en) 2002-11-21
US20020069391A1 (en) 2002-06-06
WO2001047174A2 (en) 2001-06-28
AU4506301A (en) 2001-07-03
US6718512B2 (en) 2004-04-06
US6587988B1 (en) 2003-07-01

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