WO2001050695A8 - Method for equalizing data received - Google Patents

Method for equalizing data received

Info

Publication number
WO2001050695A8
WO2001050695A8 PCT/US2001/000084 US0100084W WO0150695A8 WO 2001050695 A8 WO2001050695 A8 WO 2001050695A8 US 0100084 W US0100084 W US 0100084W WO 0150695 A8 WO0150695 A8 WO 0150695A8
Authority
WO
WIPO (PCT)
Prior art keywords
signal
interference
received
mitigation
approach
Prior art date
Application number
PCT/US2001/000084
Other languages
French (fr)
Other versions
WO2001050695A1 (en
Inventor
Shane Michael Tonissen
Efstratios Skafidas
Original Assignee
Bandspeed Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bandspeed Inc filed Critical Bandspeed Inc
Priority to AU27554/01A priority Critical patent/AU2755401A/en
Publication of WO2001050695A1 publication Critical patent/WO2001050695A1/en
Publication of WO2001050695A8 publication Critical patent/WO2001050695A8/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • H04L25/03076—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure not using decision feedback
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03375—Passband transmission
    • H04L2025/03414—Multicarrier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03477—Tapped delay lines not time-recursive
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03484—Tapped delay lines time-recursive

Abstract

An approach for processing data received from a communications channel generally involves equalizing received data in the time domain prior to demodulation by an approach that incorporates mitigation of interference. Oversampling of the received signal provides improved equalization performance and mitigation of interference, such as crosstalk. A receiver oversamples a received signal and splits the signal into a set of observation sequences. The set of observation sequences are processed to provide an estimate of the input to the communications channel, while providing at least partial rejection of any interfering signal. Exact knowledge of the parameters of the interference signal is not required.
PCT/US2001/000084 1999-12-30 2001-01-02 Method for equalizing data received WO2001050695A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU27554/01A AU2755401A (en) 1999-12-30 2001-01-02 Approach for processing data received from a communications channel

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US17377899P 1999-12-30 1999-12-30
US17378599P 1999-12-30 1999-12-30
US60/173,785 1999-12-30
US60/173,778 1999-12-30

Publications (2)

Publication Number Publication Date
WO2001050695A1 WO2001050695A1 (en) 2001-07-12
WO2001050695A8 true WO2001050695A8 (en) 2001-10-11

Family

ID=26869522

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2001/000169 WO2001050697A1 (en) 1999-12-30 2001-01-02 Approach for processing data received from a communications channel in finite precision arithmetic applications
PCT/US2001/000084 WO2001050695A1 (en) 1999-12-30 2001-01-02 Method for equalizing data received

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/US2001/000169 WO2001050697A1 (en) 1999-12-30 2001-01-02 Approach for processing data received from a communications channel in finite precision arithmetic applications

Country Status (8)

Country Link
US (2) US6983030B2 (en)
EP (1) EP1157512A1 (en)
JP (1) JP4834269B2 (en)
KR (1) KR20010108283A (en)
AU (2) AU2757701A (en)
CA (1) CA2381314A1 (en)
IL (1) IL145090A (en)
WO (2) WO2001050697A1 (en)

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US8832169B2 (en) 2011-02-16 2014-09-09 Qualcomm Incorporated Reducing steady state error in fixed point implementations or recursive filters
WO2013109237A2 (en) * 2011-12-21 2013-07-25 Intel Corporation Low power high-speed digital receiver
BR112014015644A8 (en) * 2011-12-21 2017-07-04 Intel Corp low power silencer circuit
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Also Published As

Publication number Publication date
US20010036237A1 (en) 2001-11-01
AU2757701A (en) 2001-07-16
JP2003519962A (en) 2003-06-24
US6983030B2 (en) 2006-01-03
US20010036228A1 (en) 2001-11-01
AU2755401A (en) 2001-07-16
WO2001050695A1 (en) 2001-07-12
CA2381314A1 (en) 2001-07-12
WO2001050697A1 (en) 2001-07-12
EP1157512A1 (en) 2001-11-28
US6804313B2 (en) 2004-10-12
KR20010108283A (en) 2001-12-07
JP4834269B2 (en) 2011-12-14
IL145090A (en) 2007-06-03
IL145090A0 (en) 2002-06-30

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