WO2001065607A3 - Trench gate dmos field-effect transistor - Google Patents

Trench gate dmos field-effect transistor Download PDF

Info

Publication number
WO2001065607A3
WO2001065607A3 PCT/US2001/004796 US0104796W WO0165607A3 WO 2001065607 A3 WO2001065607 A3 WO 2001065607A3 US 0104796 W US0104796 W US 0104796W WO 0165607 A3 WO0165607 A3 WO 0165607A3
Authority
WO
WIPO (PCT)
Prior art keywords
trench
transistor cells
effect transistor
trench gate
substrate
Prior art date
Application number
PCT/US2001/004796
Other languages
French (fr)
Other versions
WO2001065607A2 (en
Inventor
Fwu-Iuan Hshieh
Koon Chong So
Yan Man Tsui
Original Assignee
Gen Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Semiconductor Inc filed Critical Gen Semiconductor Inc
Priority to JP2001564397A priority Critical patent/JP2003529209A/en
Priority to KR1020027011229A priority patent/KR20020079919A/en
Priority to EP01910706A priority patent/EP1266406B1/en
Priority to AU2001238287A priority patent/AU2001238287A1/en
Publication of WO2001065607A2 publication Critical patent/WO2001065607A2/en
Publication of WO2001065607A3 publication Critical patent/WO2001065607A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0626Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a localised breakdown region, e.g. built-in avalanching region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856Source regions
    • H01L29/0865Disposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure

Abstract

A trench DMOS transistor structure (200) is provided that includes at least three individual trench DMOS transistor cells (21) formed on a substrate (220) of a first conductivity type. The plurality of individual DMOS transistor cells is dividable into peripheral transistor cells (211, 212, 213) and interior transistor cells (214, 215, 216). Each of the individual transistor cells includes a body region (214) located on the substrate, which has a second conductivity type. At least one trench (202, 204) extends through the body region and the substrate. An insulating layer (230) lines the trench. A conductive electrode is located in the trench, which overlies the insulating layer. Interior transistor cells, but not the peripheral transistor cells, each further include a source region (240) of the first conductivity type in the body region adjacent to the trench.
PCT/US2001/004796 2000-02-29 2001-02-15 Trench gate dmos field-effect transistor WO2001065607A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001564397A JP2003529209A (en) 2000-02-29 2001-02-15 Trench double diffused metal oxide semiconductor transistor structure
KR1020027011229A KR20020079919A (en) 2000-02-29 2001-02-15 Dmos transistor structure having improved performance
EP01910706A EP1266406B1 (en) 2000-02-29 2001-02-15 Trench gate DMOS field-effect transistor
AU2001238287A AU2001238287A1 (en) 2000-02-29 2001-02-15 Dmos transistor structure having improved performance

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/515,335 US6548860B1 (en) 2000-02-29 2000-02-29 DMOS transistor structure having improved performance
US09/515,335 2000-02-29

Publications (2)

Publication Number Publication Date
WO2001065607A2 WO2001065607A2 (en) 2001-09-07
WO2001065607A3 true WO2001065607A3 (en) 2002-05-30

Family

ID=24050918

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/004796 WO2001065607A2 (en) 2000-02-29 2001-02-15 Trench gate dmos field-effect transistor

Country Status (8)

Country Link
US (1) US6548860B1 (en)
EP (2) EP2267786A3 (en)
JP (1) JP2003529209A (en)
KR (1) KR20020079919A (en)
CN (1) CN1279620C (en)
AU (1) AU2001238287A1 (en)
TW (1) TW493280B (en)
WO (1) WO2001065607A2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10127885B4 (en) * 2001-06-08 2009-09-24 Infineon Technologies Ag Trench power semiconductor device
US6838722B2 (en) * 2002-03-22 2005-01-04 Siliconix Incorporated Structures of and methods of fabricating trench-gated MIS devices
US8629019B2 (en) * 2002-09-24 2014-01-14 Vishay-Siliconix Method of forming self aligned contacts for a power MOSFET
US7494876B1 (en) 2005-04-21 2009-02-24 Vishay Siliconix Trench-gated MIS device having thick polysilicon insulation layer at trench bottom and method of fabricating the same
US7583485B1 (en) 2005-07-26 2009-09-01 Vishay-Siliconix Electrostatic discharge protection circuit for integrated circuits
US7544545B2 (en) * 2005-12-28 2009-06-09 Vishay-Siliconix Trench polysilicon diode
CN101361193B (en) * 2006-01-18 2013-07-10 维西埃-硅化物公司 Floating gate structure with high electrostatic discharge performance
DE102006029750B4 (en) * 2006-06-28 2010-12-02 Infineon Technologies Austria Ag Trench transistor and method of manufacture
US20080206944A1 (en) * 2007-02-23 2008-08-28 Pan-Jit International Inc. Method for fabricating trench DMOS transistors and schottky elements
US10600902B2 (en) 2008-02-13 2020-03-24 Vishay SIliconix, LLC Self-repairing field effect transisitor
US9230810B2 (en) 2009-09-03 2016-01-05 Vishay-Siliconix System and method for substrate wafer back side and edge cross section seals
US9425305B2 (en) 2009-10-20 2016-08-23 Vishay-Siliconix Structures of and methods of fabricating split gate MIS devices
US9419129B2 (en) 2009-10-21 2016-08-16 Vishay-Siliconix Split gate semiconductor device with curved gate oxide profile
KR101728363B1 (en) 2010-03-02 2017-05-02 비쉐이-실리코닉스 Structures and methods of fabricating dual gate devices
DE112012002136T5 (en) 2011-05-18 2014-03-13 Vishay-Siliconix Semiconductor device
JP6524279B2 (en) * 2011-08-24 2019-06-05 ローム株式会社 Semiconductor device and method of manufacturing the same
JP6290526B2 (en) * 2011-08-24 2018-03-07 ローム株式会社 Semiconductor device and manufacturing method thereof
JP6219140B2 (en) * 2013-11-22 2017-10-25 ルネサスエレクトロニクス株式会社 Semiconductor device
EP3183753A4 (en) 2014-08-19 2018-01-10 Vishay-Siliconix Electronic circuit
US11217541B2 (en) 2019-05-08 2022-01-04 Vishay-Siliconix, LLC Transistors with electrically active chip seal ring and methods of manufacture
US11218144B2 (en) 2019-09-12 2022-01-04 Vishay-Siliconix, LLC Semiconductor device with multiple independent gates

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58100460A (en) * 1981-12-11 1983-06-15 Hitachi Ltd Vertical type metal oxide semiconductor device
US5043779A (en) * 1989-07-21 1991-08-27 Fuji Electric Co., Ltd. Metal oxide semiconductor device with well region
US5763915A (en) * 1996-02-27 1998-06-09 Magemos Corporation DMOS transistors having trenched gate oxide
US5986304A (en) * 1997-01-13 1999-11-16 Megamos Corporation Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners
US5998266A (en) * 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5072266A (en) 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
JP3170966B2 (en) * 1993-08-25 2001-05-28 富士電機株式会社 Insulated gate control semiconductor device and manufacturing method thereof
JPH0878668A (en) * 1994-08-31 1996-03-22 Toshiba Corp Semiconductor device for power
US5688725A (en) * 1994-12-30 1997-11-18 Siliconix Incorporated Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance
US5998837A (en) * 1995-06-02 1999-12-07 Siliconix Incorporated Trench-gated power MOSFET with protective diode having adjustable breakdown voltage
JP3257394B2 (en) * 1996-04-04 2002-02-18 株式会社日立製作所 Voltage driven semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58100460A (en) * 1981-12-11 1983-06-15 Hitachi Ltd Vertical type metal oxide semiconductor device
US5043779A (en) * 1989-07-21 1991-08-27 Fuji Electric Co., Ltd. Metal oxide semiconductor device with well region
US5763915A (en) * 1996-02-27 1998-06-09 Magemos Corporation DMOS transistors having trenched gate oxide
US5998266A (en) * 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer
US5986304A (en) * 1997-01-13 1999-11-16 Megamos Corporation Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 007, no. 204 (E - 197) 9 September 1983 (1983-09-09) *

Also Published As

Publication number Publication date
CN1416597A (en) 2003-05-07
JP2003529209A (en) 2003-09-30
AU2001238287A1 (en) 2001-09-12
US6548860B1 (en) 2003-04-15
EP2267786A2 (en) 2010-12-29
TW493280B (en) 2002-07-01
CN1279620C (en) 2006-10-11
EP1266406A2 (en) 2002-12-18
WO2001065607A2 (en) 2001-09-07
KR20020079919A (en) 2002-10-19
EP1266406B1 (en) 2011-11-30
EP2267786A3 (en) 2011-01-12

Similar Documents

Publication Publication Date Title
WO2001065607A3 (en) Trench gate dmos field-effect transistor
WO2002007201A3 (en) Method for etching trenches for the fabrication of semiconductor devices
WO2001071817A3 (en) Dmos transistor having a trench gate electrode and method of making the same
EP0820096A3 (en) Semiconductor device and method for fabricating the same
TW328154B (en) Field effect transistor and CMOS element
WO2005091799A3 (en) Optimized trench power mosfet with integrated schottky diode
WO2003100865A3 (en) Microwave field effect transistor structure
TW200620676A (en) Thin film transistor and its manufacturing method
WO2002027800A3 (en) Trench dmos transistor having lightly doped source structure
TW200507255A (en) Semiconductor device and method of fabricating the same
WO2003038863A3 (en) Trench dmos device with improved drain contact
MY147032A (en) Structure and method for forming a shielded gate trench fet with the shield and gate electrodes being connected together
WO2002043117A3 (en) Trench gate fermi-threshold field effect transistors and methods of fabricating the same
EP1033757A3 (en) Insulated gate bipolar transistor
GB0031248D0 (en) Column transistor in semiconductor device
TW346680B (en) Semiconductor device and process for producing the same
WO2005053031A3 (en) Trench insulated gate field effect transistor
WO2001069684A3 (en) Field-effect semiconductor devices
EP0981166A3 (en) JFET transistor
TW200507242A (en) Semiconductor device
WO2003098700A3 (en) Resurf super-junction devices having trenches
JP2002134756A5 (en)
WO2001006568A3 (en) Trench-gate field-effect transistors and their manufacture
GB2371921B (en) Architecture for circuit connection of a vertical transistor
WO2004055868A3 (en) Integrated circuit modification using well implants

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

WWE Wipo information: entry into national phase

Ref document number: 2001910706

Country of ref document: EP

Ref document number: 1020027011229

Country of ref document: KR

ENP Entry into the national phase

Ref document number: 2001 564397

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 018058078

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 1020027011229

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 2001910706

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642