WO2001075953A1 - Procede de fabrication de film mince et appareil de fabrication, transistor de film mince et procede de fabrication - Google Patents

Procede de fabrication de film mince et appareil de fabrication, transistor de film mince et procede de fabrication Download PDF

Info

Publication number
WO2001075953A1
WO2001075953A1 PCT/JP2001/002912 JP0102912W WO0175953A1 WO 2001075953 A1 WO2001075953 A1 WO 2001075953A1 JP 0102912 W JP0102912 W JP 0102912W WO 0175953 A1 WO0175953 A1 WO 0175953A1
Authority
WO
WIPO (PCT)
Prior art keywords
manufacturing
thin film
thin
substrate
film
Prior art date
Application number
PCT/JP2001/002912
Other languages
English (en)
French (fr)
Inventor
Mikihiko Nishitani
Masashi Goto
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Priority to US10/240,570 priority Critical patent/US6913986B2/en
Publication of WO2001075953A1 publication Critical patent/WO2001075953A1/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02422Non-crystalline insulating materials, e.g. glass, polymers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
PCT/JP2001/002912 2000-04-04 2001-04-04 Procede de fabrication de film mince et appareil de fabrication, transistor de film mince et procede de fabrication WO2001075953A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/240,570 US6913986B2 (en) 2000-04-04 2001-04-04 Method and apparatus for fabricating a thin film and thin film transistor and method of fabricating same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2000-101935 2000-04-04
JP2000101935 2000-04-04
JP2000-247351 2000-08-17
JP2000247351 2000-08-17

Publications (1)

Publication Number Publication Date
WO2001075953A1 true WO2001075953A1 (fr) 2001-10-11

Family

ID=26589409

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2001/002912 WO2001075953A1 (fr) 2000-04-04 2001-04-04 Procede de fabrication de film mince et appareil de fabrication, transistor de film mince et procede de fabrication

Country Status (4)

Country Link
US (1) US6913986B2 (ja)
KR (1) KR100840423B1 (ja)
TW (1) TW495995B (ja)
WO (1) WO2001075953A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004090847A1 (ja) * 2003-04-02 2004-10-21 Matsushita Electric Industrial Co. Ltd. 表示装置
EP3614442A3 (en) 2005-09-29 2020-03-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having oxide semiconductor layer and manufactoring method thereof
US8334537B2 (en) * 2007-07-06 2012-12-18 Semiconductor Energy Laboratory Co., Ltd. Light-emitting device
TWI456663B (zh) 2007-07-20 2014-10-11 Semiconductor Energy Lab 顯示裝置之製造方法
JP5405850B2 (ja) * 2009-02-17 2014-02-05 株式会社日立製作所 酸化物半導体を有する電界効果トランジスタの製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02307221A (ja) * 1989-05-22 1990-12-20 Nec Corp Cvd膜の成長方法
JPH0750263A (ja) * 1993-08-06 1995-02-21 Toshiba Corp 薄膜形成方法および薄膜エッチング方法
JPH08316152A (ja) * 1995-05-23 1996-11-29 Matsushita Electric Works Ltd 化合物半導体の結晶成長方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0777264B2 (ja) 1986-04-02 1995-08-16 三菱電機株式会社 薄膜トランジスタの製造方法
US4751193A (en) * 1986-10-09 1988-06-14 Q-Dot, Inc. Method of making SOI recrystallized layers by short spatially uniform light pulses
US4986214A (en) * 1986-12-16 1991-01-22 Mitsubishi Denki Kabushiki Kaisha Thin film forming apparatus
US5534072A (en) * 1992-06-24 1996-07-09 Anelva Corporation Integrated module multi-chamber CVD processing system and its method for processing subtrates
JP3186237B2 (ja) 1992-08-28 2001-07-11 株式会社日立製作所 配線形成方法および装置および配線形成用試料ホルダ
JPH0697193A (ja) 1992-09-11 1994-04-08 Hitachi Ltd 半導体装置とその製造方法
JP3497198B2 (ja) 1993-02-03 2004-02-16 株式会社半導体エネルギー研究所 半導体装置および薄膜トランジスタの作製方法
US5843225A (en) 1993-02-03 1998-12-01 Semiconductor Energy Laboratory Co., Ltd. Process for fabricating semiconductor and process for fabricating semiconductor device
EP1119053B1 (en) * 1993-02-15 2011-11-02 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating TFT semiconductor device
CN1052566C (zh) * 1993-11-05 2000-05-17 株式会社半导体能源研究所 制造半导体器件的方法
JP3464285B2 (ja) 1994-08-26 2003-11-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100274313B1 (ko) * 1997-06-27 2000-12-15 김영환 하부 게이트형 박막트렌지스터의 제조방법
US6602765B2 (en) * 2000-06-12 2003-08-05 Seiko Epson Corporation Fabrication method of thin-film semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02307221A (ja) * 1989-05-22 1990-12-20 Nec Corp Cvd膜の成長方法
JPH0750263A (ja) * 1993-08-06 1995-02-21 Toshiba Corp 薄膜形成方法および薄膜エッチング方法
JPH08316152A (ja) * 1995-05-23 1996-11-29 Matsushita Electric Works Ltd 化合物半導体の結晶成長方法

Also Published As

Publication number Publication date
US6913986B2 (en) 2005-07-05
TW495995B (en) 2002-07-21
KR20020086682A (ko) 2002-11-18
US20030143784A1 (en) 2003-07-31
KR100840423B1 (ko) 2008-06-20

Similar Documents

Publication Publication Date Title
EP1713117A4 (en) SEMICONDUCTOR DEVICE OF SILICON CARBIDE AND METHOD OF MANUFACTURING THE SAME
TW200507279A (en) Thin-film semiconductor substrate, method of manufacturing the same; apparatus for and method of crystallization;Thin-film semiconductor apparatus, method of manufacturing the same;
WO2003015143A1 (fr) Film semi-conducteur en nitrure du groupe iii et son procede de production
WO2003092041A3 (en) Method for fabricating a soi substrate a high resistivity support substrate
WO2006096528A3 (en) Stabilized photoresist structure for etching process
FR2895809B1 (fr) Procede de fabrication d'un substrat de transistor en couche mince.
TW200509244A (en) A selective etch process for making a semiconductor device having a high-k gate dielectric
EP1467216A3 (en) Method for manufacturing magnetic field detecting element
TW200742081A (en) Method for fabricating a thin film transistor
TW200505026A (en) Method for manufacturing polysilicon film
WO2001075953A1 (fr) Procede de fabrication de film mince et appareil de fabrication, transistor de film mince et procede de fabrication
DE60324222D1 (de) Verfahren zur Herstellung strukturierter Schichten
TWI257177B (en) Manufacturing processes for a thin film transistor and a pixel structure
TW200501317A (en) Method of forming a contact hole and method of forming a semiconductor device
WO2005061378A3 (en) Equipment and process for creating a custom sloped etch in a substrate
WO2009014337A3 (en) Method of manufacturing crystalline semiconductor thin film
TWI255959B (en) Method of manufacturing thin film transistor array
US7883950B2 (en) Semiconductor device having reduced polysilicon pattern width and method of manufacturing the same
TW346664B (en) Mixed-mode IC separated spacer structure and process for producing the same
WO2004073058A3 (en) Flash memory devices
WO2005057681A8 (en) Process for removing an organic layer during fabrication of an organic electronic device and the organic electronic device formed by the process
WO2005022608A3 (en) Siliciding spacer in integrated circuit technology
TW200607044A (en) Method of segmenting a wafer
WO2007112261A3 (en) Semiconductor device made by multiple anneal of stress inducing layer
US6451451B2 (en) Mask, and method and apparatus for making it

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): KR SG US

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 1020027012577

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 10240570

Country of ref document: US

WWP Wipo information: published in national office

Ref document number: 1020027012577

Country of ref document: KR