WO2001093075A3 - Modular design method and system for programmable logic devices - Google Patents

Modular design method and system for programmable logic devices Download PDF

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Publication number
WO2001093075A3
WO2001093075A3 PCT/US2001/014387 US0114387W WO0193075A3 WO 2001093075 A3 WO2001093075 A3 WO 2001093075A3 US 0114387 W US0114387 W US 0114387W WO 0193075 A3 WO0193075 A3 WO 0193075A3
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WO
WIPO (PCT)
Prior art keywords
modules
design
level
logic
implementation
Prior art date
Application number
PCT/US2001/014387
Other languages
French (fr)
Other versions
WO2001093075A2 (en
Inventor
Jeffrey M Mason
Steve E Lass
Bruce E Talley
David W Bennett
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Priority to EP01932986A priority Critical patent/EP1301867A2/en
Priority to CA2410073A priority patent/CA2410073C/en
Publication of WO2001093075A2 publication Critical patent/WO2001093075A2/en
Publication of WO2001093075A3 publication Critical patent/WO2001093075A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G06F30/347—Physical level, e.g. placement or routing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement

Abstract

In modular design flow, logic designers are able to partition a top-level logic design for a PLD into modules and implement any module independently from other modules. Modules are mapped, placed, and routed using selected information derived at the time the top-level logic design is partitioned. Finally, the modules are integrated into the top-level logic design using a guided process. Specifically, the information generated during the partitioning of the top-level design and the implementation of each module is used to guide the implementation of the associated logic in the top-level design. In this manner, the implementation of all modules can proceed in any order or in parallel and the integration of the modules into the top-level design can be done quickly and in any order.
PCT/US2001/014387 2000-05-25 2001-05-02 Modular design method and system for programmable logic devices WO2001093075A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP01932986A EP1301867A2 (en) 2000-05-25 2001-05-02 Modular design method and system for programmable logic devices
CA2410073A CA2410073C (en) 2000-05-25 2001-05-02 Modular design method and system for programmable logic devices

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US20763100P 2000-05-25 2000-05-25
US60/207,631 2000-05-25
US09/839,464 2001-04-20
US09/839,464 US6817005B2 (en) 2000-05-25 2001-04-20 Modular design method and system for programmable logic devices

Publications (2)

Publication Number Publication Date
WO2001093075A2 WO2001093075A2 (en) 2001-12-06
WO2001093075A3 true WO2001093075A3 (en) 2003-01-16

Family

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Family Applications (1)

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PCT/US2001/014387 WO2001093075A2 (en) 2000-05-25 2001-05-02 Modular design method and system for programmable logic devices

Country Status (4)

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US (1) US6817005B2 (en)
EP (1) EP1301867A2 (en)
CA (1) CA2410073C (en)
WO (1) WO2001093075A2 (en)

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Also Published As

Publication number Publication date
US20010047509A1 (en) 2001-11-29
US6817005B2 (en) 2004-11-09
CA2410073C (en) 2013-04-02
CA2410073A1 (en) 2001-12-06
EP1301867A2 (en) 2003-04-16
WO2001093075A2 (en) 2001-12-06

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