WO2002023550A3 - Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules - Google Patents
Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules Download PDFInfo
- Publication number
- WO2002023550A3 WO2002023550A3 PCT/US2001/029383 US0129383W WO0223550A3 WO 2002023550 A3 WO2002023550 A3 WO 2002023550A3 US 0129383 W US0129383 W US 0129383W WO 0223550 A3 WO0223550 A3 WO 0223550A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory
- daisy
- memory controller
- memory module
- module
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/409—Mechanical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
- G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001291138A AU2001291138A1 (en) | 2000-09-18 | 2001-09-18 | Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules |
KR10-2003-7003869A KR100531426B1 (en) | 2000-09-18 | 2001-09-18 | Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules |
JP2002527509A JP4142950B2 (en) | 2000-09-18 | 2001-09-18 | Apparatus for achieving a buffered daisy chain connection between a memory controller and a memory module |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/665,196 | 2000-09-18 | ||
US09/665,196 US6317352B1 (en) | 2000-09-18 | 2000-09-18 | Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modules |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002023550A2 WO2002023550A2 (en) | 2002-03-21 |
WO2002023550A3 true WO2002023550A3 (en) | 2003-07-10 |
Family
ID=24669114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/029383 WO2002023550A2 (en) | 2000-09-18 | 2001-09-18 | Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules |
Country Status (7)
Country | Link |
---|---|
US (1) | US6317352B1 (en) |
JP (1) | JP4142950B2 (en) |
KR (1) | KR100531426B1 (en) |
CN (1) | CN1271533C (en) |
AU (1) | AU2001291138A1 (en) |
TW (1) | TWI231508B (en) |
WO (1) | WO2002023550A2 (en) |
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- 2001-09-18 AU AU2001291138A patent/AU2001291138A1/en not_active Abandoned
- 2001-09-18 WO PCT/US2001/029383 patent/WO2002023550A2/en active IP Right Grant
- 2001-09-18 JP JP2002527509A patent/JP4142950B2/en not_active Expired - Fee Related
- 2001-09-18 KR KR10-2003-7003869A patent/KR100531426B1/en active IP Right Grant
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Also Published As
Publication number | Publication date |
---|---|
JP2004527018A (en) | 2004-09-02 |
KR100531426B1 (en) | 2005-11-28 |
WO2002023550A2 (en) | 2002-03-21 |
CN1531687A (en) | 2004-09-22 |
US6317352B1 (en) | 2001-11-13 |
AU2001291138A1 (en) | 2002-03-26 |
CN1271533C (en) | 2006-08-23 |
TWI231508B (en) | 2005-04-21 |
JP4142950B2 (en) | 2008-09-03 |
KR20030064400A (en) | 2003-07-31 |
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