WO2002031880A2 - Trench dmos transistor with embedded trench schottky rectifier - Google Patents
Trench dmos transistor with embedded trench schottky rectifier Download PDFInfo
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- WO2002031880A2 WO2002031880A2 PCT/US2001/030757 US0130757W WO0231880A2 WO 2002031880 A2 WO2002031880 A2 WO 2002031880A2 US 0130757 W US0130757 W US 0130757W WO 0231880 A2 WO0231880 A2 WO 0231880A2
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- 230000004888 barrier function Effects 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 33
- 229920005591 polysilicon Polymers 0.000 claims abstract description 31
- 210000000746 body region Anatomy 0.000 claims abstract description 23
- 239000004020 conductor Substances 0.000 claims abstract description 8
- 230000000873 masking effect Effects 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 16
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 239000002019 doping agent Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000001020 plasma etching Methods 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- 238000011084 recovery Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
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- 230000008569 process Effects 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- -1 i.e. Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
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- 238000007254 oxidation reaction Methods 0.000 description 1
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- FAIAAWCVCHQXDN-UHFFFAOYSA-N phosphorus trichloride Chemical compound ClP(Cl)Cl FAIAAWCVCHQXDN-UHFFFAOYSA-N 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7806—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a Schottky barrier diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- MOSFETs in parallel with Schottky barrier rectifiers. More particularly, the present invention relates to the integration of trench DMOSFETs and trench Schottky rectifiers upon a single substrate.
- Schottky barrier rectifiers (also referred to as Schottky barrier diodes) have been used as synchronous rectifiers in DC-DC power converters.
- An improved version of a Schottky barrier rectifier is disclosed in U.S. Patent No. 5,365,102 entitled “Schottky Barrier Rectifier with MOS Trench.”
- a cross-sectional view of such a device is illustrated in Figure 1.
- rectifier 10 includes a semiconductor substrate 12 of first conductivity type, typically N-type conductivity, having a first face 12a and a second opposing face 12b.
- the substrate 12 comprises a relatively highly doped cathode region 12c (shown as N+) adjacent the first face 12a.
- a drift region 12d of first conductivity type extends from the cathode region 12c to the second face 12b. Hence, the doping concentration of the cathode region 12c is greater than that of the drift region 12d.
- the mesa can be of stripe, rectangular, cylindrical or other similar geometry.
- Insulating regions 16a and 16b e.g., SiO 2
- the rectifier also includes an anode electrode 18 on the insulating regions 16a, 16b. The anode electrode 18 forms a Schottky rectifying contact with the mesa 14.
- the height of the Schottky barrier formed at the anode electrode/mesa interface is dependent not only on the type of electrode metal and semiconductor (e.g., Si, Ge, GaAs, and SiC) used, but is also dependent on the doping concentration in the mesa 14.
- a cathode electrode 20 is provided adjacent the cathode region 12c at the first face 12a. The cathode electrode 20 ohmically contacts cathode region 12c.
- Such a trench MOS Schottky barrier rectifier displays significant improvements in reverse blocking voltage.
- two or more individual trench MOS Schottky barrier rectifiers are fabricated in parallel, with rectifiers sharing common anode and cathode contacts. As a result, the individual trench MOS Schottky barrier rectifiers act as a single rectifier.
- Schottky barrier rectifiers including those described in U.S.
- Patent No. 5,365,102 have relatively high on-resistance (forward-biased voltage drop). Moreover, many Schottky barrier rectifiers have relatively high reverse- biased leakage currents. As a result, Schottky barrier rectifiers are frequently replaced for power conversion applications by power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), which address these problems.
- MOSFETs Metal Oxide Semiconductor Field Effect Transistors
- DMOS transistors Double diffused MOSFETs (also referred to herein as DMOSFETs) are a type of MOSFET that use diffusion to form the transistor regions.
- a typical discrete DMOS circuit includes two or more individual DMOS transistor cells which are fabricated in parallel. The individual DMOS transistor cells share a common drain contact (the substrate), while their sources are all shorted together with metal and their gates are shorted together by polysilicon. Thus, even though the discrete DMOS circuit is constructed from a matrix of smaller transistors, it behaves as if it were a single large transistor.
- DMOS transistor is a "trench DMOS transistor" in which the channel is formed vertically and the gate is formed in a trench extending between the source and drain.
- the trench which is lined with a thin oxide layer and filled with polysilicon, allows less constricted current flow and thereby provides lower values of specific on-resistance (forward-biased voltage drop). Examples of trench DMOS transistors are disclosed in U.S. Patent Nos. 5,072,266, 5,541,425, and 5,866,931.
- FIGS 2a-2C illustrate one embodiment of a conventional trench DMOS structure 120 in which the individual cells 121 are rectangular in shape in a horizontal cross-section.
- the transistor cells 121 need not have a rectangular shape for basic transistor operation, but more generally may have any polygonal shape. However, a regular rectangular shape and a regular hexagonal shape are generally considered most convenient for layout purposes.
- the structure includes, in this embodiment, an N+ substrate 100 on which is grown a lightly n-doped epitaxial layer 104. Within doped epitaxial layer 104, a body region 116 of opposite conductivity is provided. An n-doped epitaxial layer 140 that overlies much of the body region 116 serves as the source.
- a rectangularly shaped trench 124 is provided in the epitaxial layers, which is open at the upper surface of the structure and defines the perimeter of the transistor cell.
- a gate oxide layer 130 lines the bottom and sidewalls of the trench 124.
- the trench 124 is filled with polysilicon, i.e., polycrystalline silicon.
- a drain electrode is connected to the back surface of the semiconductor substrate 100, a source electrode 118 is connected to the source regions 140 and the body region 116, and a gate electrode is connected to the polysilicon that fills the trench 124.
- the polysilicon lining trenches 124 is continuously connected over the surface of structure 120.
- polysilicon contacts 129 extend beyond the surface of structure 120 to serve as interconnects. It should be noted that, rather than having a closed-cell geometry as depicted in the figures, the transistor cell may have an open or stripe geometry.
- the DMOS transistor shown in FIG. 2A-C has its gate positioned in a vertically oriented trench.
- This structure is often called a trench vertical DMOS. It is “vertical” because the drain contact appears on the back or underside of the substrate and because the channel flow of current from source to drain is approximately vertical. This minimizes the higher resistance associated with bent or curved current paths or with parasitic field effect construction.
- the device is also doubly diffused (denoted by the prefix "D") because the source region is diffused into the epitaxial material on top of a portion of the earlier- diffused body region of opposite conductivity type.
- This structure uses the trench sidewall area for current control by the gate and has a substantially vertical current flow associated with it. As previously mentioned, this device is particularly appropriate for use as a power switching transistor where the current carried through a given transverse silicon area is to be maximized.
- FIG. 3 A A portion of a prior art trench DMOS transistor is illustrated schematically in Figure 3 A. Such a transistor behaves as if having a built-in body diode D as shown in Figure 3A.
- the transistor shown in Figure 3 A can be illustrated as the portion of Figure 3B surrounded by the dashed lines.
- the built-in body diode is represented by D in Figure 3B, which also contains switch S 2 associated with the transistor.
- switch Si and diode D ls as well as inductor L h capacitor C ⁇ and load Ri.
- a voltage Nn is applied across the circuit as shown.
- Figure 3C illustrates two control signals, a first gate drive signal GDSi for driving switch Si and a second gate drive signal GDS 2 for driving switch S 2 , at times Ti, T 2 ⁇ T 3j T j and T 5 .
- GDSi and GDS are such that switch Si is in the on state and switch S 2 is in the off state.
- signals GDSi and GDS 2 are such that both switches Si and S 2 are in the off state.
- signals GDSi and GDS 2 are such that switches Si and S are in the off state, producing a current flow like that shown in Figure 3D.
- switch Si is turned off for a brief period before switch S 2 is turned on (see, for example, the time period between T 2 and T 3 ).
- this current results in a voltage drop across the built-in body diode D 2 that is about 0.65V.
- this voltage drop can be reduced to about 0.3V, reducing power dissipation.
- MOS trench Schottky barrier rectifiers like those disclosed in U.S. Patent No. 5,365, 102, are disadvantageous for integration with a trench DMOS transistors, because the MOS trench of the Schottky barrier rectifier is filled with metal, potentially resulting in a metal coverage problem in the trench area.
- this difficulty is overcome by integrating trench DMOS transistors and MOS trench Schottky barrier rectifiers together in one package using the MCM (multiple chips module) method, significantly adding to the expense of such devices.
- MCM multiple chips module
- an integrated circuit is provided that has a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions.
- the integrated circuit comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of the first conductivity type over the substrate, wherein the epitaxial layer has a lower doping level than the substrate; (c) a plurality of body regions of a second conductivity type within the epitaxial layer in the transistor regions; (d) a plurality of trenches within the epitaxial layer in both the transistor regions and the rectifier regions; (e) a first insulating layer that lines the trenches; (f) a polysilicon conductor within the trenches and overlying the first insulating layer; (g) a plurality of source regions of the first conductivity type within the body regions at a location adjacent to the trenches; (h) a second insulating layer over the doped polysilicon layer in the transistor regions; and (i) an electrode layer over both the transistor regions and the rectifier regions.
- An electrode layer is also preferably provided on a surface of the substrate opposing the body regions.
- the substrate is an n-doped substrate
- the first insulating layer is a silicon dioxide layer
- the second insulating layer is a borophosphosilicate glass layer.
- an integrated circuit which comprises: (a) a plurality of trench Schottky barrier rectifiers and (b) a plurality of trench DMOS transistors.
- the trench Schottky barrier rectifiers and the trench DMOS transistors are integrated upon a common substrate, and trenches associated with the trench Schottky barrier rectifiers and the trench DMOS transistors are filled with polysilicon.
- the trench Schottky barrier rectifiers and the trench DMOS transistors are fabricated from a common oxide layer and a common polysilicon layer disposed over the oxide layer.
- the trench Schottky barrier rectifiers and the trench DMOS transistors are fabricated using a common substrate, a common epitaxial layer disposed over the substrate, a common oxide layer disposed over the epitaxial layer, and a common polysilicon layer disposed over the oxide layer.
- the anodes of the trench Schottky barrier rectifiers and the sources of the trench DMOS transistors preferably share a common electrode
- the cathodes of the trench Schottky barrier rectifiers and the drains of the trench DMOS transistors preferably share a common electrode
- a method for manufacturing an integrated circuit comprising a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions.
- the method comprises: (a) providing a substrate of a first conductivity type; (b) forming an epitaxial layer of the first conductivity type over the substrate, wherein the epitaxial layer has a lower doping level than the substrate; (c) forming a one or more body regions of a second conductivity type within the epitaxial layer in the transistor regions; (d) forming a plurality of trenches within the epitaxial layer in both the transistor regions and the rectifier regions; (e) forming a first insulating layer that lines the trenches; (f) forming a polysilicon conductor within the trenches and overlying the first insulating layer; (g) forming a plurality of source regions of the first conductivity type within the body regions adjacent the trenches; (h
- an electrode layer is preferably formed on the surface of the substrate opposite the body regions.
- the step of forming the body regions includes the steps of forming a patterned masking layer over the epitaxial layer and implanting and diffusing a dopant into the epitaxial layer;
- the step of forming the trenches includes the step of forming a patterned masking layer over the epitaxial layer and etching the trenches through the masking layer;
- the step of forming the source regions includes the steps of forming a patterned masking layer and implanting and diffusing a dopant into the body regions;
- the step of forming the second insulating layer over the polysilicon layer in the transistor region comprises the steps of depositing a BPSG layer over at least the transistor region, forming a patterned masking layer over the BPSG layer, and etching the BPSG layer in areas not covered by the patterned masking layer.
- the present invention is advantageous in that it provides a product in which a trench Schottky barrier rectifier is integrated with a trench DMOS transistor on a single substrate and a method for making the same. As a result, such devices can be fabricated with greater ease and less expense than has heretofore been possible. Still other embodiments and advantages will become readily apparent to those skilled in the art upon review of the Detailed Description, Examples and Claims set forth below.
- FIG. 1 shows a cross-sectional view of a MOS trench Schottky barrier rectifier of the prior art.
- FIG. 2A shows a plan view of a conventional trench DMOS transistor.
- FIG. 2B shows an enlarged plan view illustrating an individual cell in the conventional transistor of FIG. 1.
- FIG. 2C shows a cross-sectional view of the DMOS transistor shown in
- FIGs. 2A and 2B taken along line A-A' of FIG. 2B.
- Figure 3 A is a schematic illustration of a portion of a prior art trench DMOS transistor, which behaves as if possessing a built-in body diode D t ,.
- Figure 3B is a circuit diagram, which includes an equivalent circuit for the structure of Figure 3 A. Current flow is shown for the case where switch Si is in the on state and switch S 2 is in the off state.
- Figure 3C illustrates two control signals for driving switches Si and S (shown in Figure 3B) at times Ti , T 2; T 3; T 4, and T 5 .
- Figure 3D illustrates current flow for the circuit of Figure 3B where switches Si and S 2 are in the off state.
- Figure 3E illustrates current flow for the circuit of Figure 3B where switch Si is in the off state and switch S 2 is in the on state.
- FIG. 4 shows a cross sectional view of an embodiment of a combination trench DMOS transistor and trench Schottky barrier rectifier of the present invention.
- FIGS. 5A to 5J are sectional views illustrating a method of manufacturing a combination trench DMOS transistor and trench Schottky barrier rectifier according to an embodiment of the invention.
- Figure 4 illustrates one embodiment of the present invention, showing a combination trench DMOS transistor and trench Schottky barrier rectifier structure 250.
- Structure 250 has DMOS transistor devices within DMOS transistor region 220 and has Schottky barrier rectifier devices within rectifier region 222.
- Structure 250 includes, within this embodiment, an N+ substrate 200 on which is grown a lightly n-doped epitaxial layer 202, which serves as the drain for the DMOS transistor devices and cathode/drift region for the rectifier devices.
- Conductive layer 218 acts as a common drain contact for the DMOS transistor devices and as a common cathode electrode from the rectifier devices.
- N epitaxial layer 202 P body regions 204 of opposite conductivity act as the gate region for the DMOS transistor devices. N+ regions 212 are also provided, which act as sources for the DMOS transistor devices. Conductive layer 216 acts as a common source contact for the DMOS transistor devices, shorting sources (i.e., N+ regions 212) with one another. Conductive layer 216 acts as anode electrode for the rectifier devices.
- Trench regions lined with oxide layers 206 and filled with polysilicon 210 are provided. Within the rectifier devices, these trench regions create a mesa structure, resulting in increased reverse-blocking voltage, among other effects. It is noted that polysilicon 210 is shorted to the conductive layer 216 (anode) for the rectifier devices.
- the filled trenches 206, 210 act as gate electrodes for the trench DMOS transistor devices.
- polysilicon 210 is insulated from conductive layer 216 (source contact) by BPSG (borophosphosilicate glass) structures 214, allowing the gates and sources to be independently biased.
- Figs. 5A to 5J show the steps that are preformed to form the trench DMOS transistor with embedded trench Schottky rectifier 250 depicted in Fig. 4.
- an N-doped epitaxial layer 202 is grown on a conventionally N+ doped substrate 200.
- Epitaxial layer is typically 5.5 microns in thickness for a 30 V trench DMOS transistor device.
- Patterned masking layer 203 defines P-body region 204 which is formed by implantation and diffusion processes as shown in Fig. 5B.
- the P-body region may be implanted at 40 to 60 keV with a dosage of 5.5 x 10 13 /cm 3 .
- P-body region 204 defines a DMOS transistor region 220 of the device.
- a rectifier region 222 of the structure 250 is not provided with such a P-body region.
- Patterned masking layer 203 is then removed by any appropriate method known in the art.
- Mask portions 205 are then provided as shown in Fig. 5C.
- Mask portions define the location of trenches 207 as shown in Fig.
- Trenches are preferably dry etched through openings between mask portions 205 by reactive ion etching, typically to a depth that ranges from 1.5 to 2.5 microns.
- Mask portions 205 are then removed as shown in Fig. 5E, and oxide layer 206 is formed over the surface of the entire structure, typically by thermal oxidation. Oxide thicknesses in the range of 500 to 800 Angstroms are typical for layer 206.
- the surface is covered (and the trenches are filled) with polysilicon 210, i.e., polycrystalline silicon, using techniques known in the art, such as CVD, to provide the structure shown in Fig. 5F.
- Polysilicon 210 is typically doped to reduce its resistivity, typically on order of 20 ⁇ /m.
- Doping can be carried out, for example, during CVD with phosphorous chloride or by implantation with arsenic or phosphorous.
- Polysilicon 210 is then etched, for example, by reactive ion etching (RIE), to optimize its thickness within the trenches and to expose portions of oxide layer 206 as shown in Fig. 5G.
- RIE reactive ion etching
- Patterned masking layer 211 defines source regions 212 within DMOS transistor region 220.
- Source regions 212 are typically formed via an implantation and diffusion process.
- the source regions 212 may be implanted with arsenic at 80 keV to a concentration that is frequently in the range of 8xl0 15 to 1.2xl0 16 cm "3 .
- the arsenic is diffused to a depth of approximately 0.5 microns.
- Patterned masking layer 211 is then removed by any appropriate technique known in the art.
- BPSG borophosphosilicate glass
- PECVD PECVD
- the structure is then etched, typically by RIE, to remove BPSG layer 214 and oxide layer 206 in those areas not covered by photoresist layer 215 as shown in Fig. 51.
- Photoresist layer 215 is removed, typically by RIE, followed by BPSG reflow and a post-reflow ⁇ etching step as is known in the art. Finally, the structure is then provided with metal contact layer 216 as shown in Figure 5J by a metal sputtering step. Metal contact layer 218 is also provided as shown to complete the device.
Abstract
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Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002535170A JP2004511910A (en) | 2000-10-06 | 2001-10-02 | Trench double diffused metal oxide semiconductor transistor incorporating trench Schottky rectifier |
AU2001294951A AU2001294951A1 (en) | 2000-10-06 | 2001-10-02 | Trench dmos transistor with embedded trench schottky rectifier |
EP01975653A EP1323191B1 (en) | 2000-10-06 | 2001-10-02 | Method for manufacturing a trench dmos transistor with embedded trench schottky rectifier |
KR1020037004917A KR100846158B1 (en) | 2000-10-06 | 2001-10-02 | An integrated circuit and a method of manufacturing the integrated circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/684,931 US6593620B1 (en) | 2000-10-06 | 2000-10-06 | Trench DMOS transistor with embedded trench schottky rectifier |
US09/684,931 | 2000-10-06 |
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WO2002031880A2 true WO2002031880A2 (en) | 2002-04-18 |
WO2002031880A3 WO2002031880A3 (en) | 2002-07-25 |
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PCT/US2001/030757 WO2002031880A2 (en) | 2000-10-06 | 2001-10-02 | Trench dmos transistor with embedded trench schottky rectifier |
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US (2) | US6593620B1 (en) |
EP (2) | EP2315247B1 (en) |
JP (1) | JP2004511910A (en) |
KR (1) | KR100846158B1 (en) |
CN (1) | CN100334731C (en) |
AU (1) | AU2001294951A1 (en) |
TW (1) | TW506130B (en) |
WO (1) | WO2002031880A2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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Families Citing this family (122)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6972436B2 (en) * | 1998-08-28 | 2005-12-06 | Cree, Inc. | High voltage, high temperature capacitor and interconnection structures |
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US6982452B2 (en) * | 2000-11-28 | 2006-01-03 | Precision Dynamics Corporation | Rectifying charge storage element |
US7061066B2 (en) * | 2001-10-17 | 2006-06-13 | Fairchild Semiconductor Corporation | Schottky diode using charge balance structure |
US7022378B2 (en) * | 2002-08-30 | 2006-04-04 | Cree, Inc. | Nitrogen passivation of interface states in SiO2/SiC structures |
US7221010B2 (en) | 2002-12-20 | 2007-05-22 | Cree, Inc. | Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors |
US7074643B2 (en) * | 2003-04-24 | 2006-07-11 | Cree, Inc. | Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same |
US6979863B2 (en) * | 2003-04-24 | 2005-12-27 | Cree, Inc. | Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same |
US6987305B2 (en) * | 2003-08-04 | 2006-01-17 | International Rectifier Corporation | Integrated FET and schottky device |
JP4176734B2 (en) * | 2004-05-14 | 2008-11-05 | 株式会社東芝 | Trench MOSFET |
JP3673805B1 (en) * | 2004-06-22 | 2005-07-20 | 国立大学法人 東京大学 | Training equipment |
US7118970B2 (en) | 2004-06-22 | 2006-10-10 | Cree, Inc. | Methods of fabricating silicon carbide devices with hybrid well regions |
JP2006012967A (en) * | 2004-06-23 | 2006-01-12 | Toshiba Corp | Semiconductor device |
US20060289931A1 (en) * | 2004-09-26 | 2006-12-28 | Samsung Electronics Co., Ltd. | Recessed gate structures including blocking members, methods of forming the same, semiconductor devices having the recessed gate structures and methods of forming the semiconductor devices |
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DE102004059640A1 (en) * | 2004-12-10 | 2006-06-22 | Robert Bosch Gmbh | Semiconductor device and method for its production |
FR2880193A1 (en) * | 2004-12-23 | 2006-06-30 | St Microelectronics Sa | SCHOTTKY DIODE WITH VERTICAL BARRIER |
US7671439B2 (en) * | 2005-02-11 | 2010-03-02 | Alpha & Omega Semiconductor, Ltd. | Junction barrier Schottky (JBS) with floating islands |
US7737522B2 (en) * | 2005-02-11 | 2010-06-15 | Alpha & Omega Semiconductor, Ltd. | Trench junction barrier controlled Schottky device with top and bottom doped regions for enhancing forward current in a vertical direction |
US7414268B2 (en) | 2005-05-18 | 2008-08-19 | Cree, Inc. | High voltage silicon carbide MOS-bipolar devices having bi-directional blocking capabilities |
US7615801B2 (en) * | 2005-05-18 | 2009-11-10 | Cree, Inc. | High voltage silicon carbide devices having bi-directional blocking capabilities |
US20060261346A1 (en) * | 2005-05-18 | 2006-11-23 | Sei-Hyung Ryu | High voltage silicon carbide devices having bi-directional blocking capabilities and methods of fabricating the same |
US7391057B2 (en) * | 2005-05-18 | 2008-06-24 | Cree, Inc. | High voltage silicon carbide devices having bi-directional blocking capabilities |
US7528040B2 (en) | 2005-05-24 | 2009-05-05 | Cree, Inc. | Methods of fabricating silicon carbide devices having smooth channels |
US7868394B2 (en) * | 2005-08-09 | 2011-01-11 | United Microelectronics Corp. | Metal-oxide-semiconductor transistor and method of manufacturing the same |
US8183113B2 (en) | 2005-08-24 | 2012-05-22 | Samsung Electronics Co., Ltd. | Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures |
KR100711520B1 (en) * | 2005-09-12 | 2007-04-27 | 삼성전자주식회사 | recessed gate electrode structure and method for forming the same, semiconductor device having recessed gate electrode and method for manufacturing the same |
US7727904B2 (en) | 2005-09-16 | 2010-06-01 | Cree, Inc. | Methods of forming SiC MOSFETs with high inversion layer mobility |
JP2007299970A (en) * | 2006-05-01 | 2007-11-15 | Toshiba Corp | Semiconductor device, and its fabrication process |
US8154073B2 (en) * | 2006-07-14 | 2012-04-10 | Denso Corporation | Semiconductor device |
US8432012B2 (en) | 2006-08-01 | 2013-04-30 | Cree, Inc. | Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same |
US7728402B2 (en) | 2006-08-01 | 2010-06-01 | Cree, Inc. | Semiconductor devices including schottky diodes with controlled breakdown |
WO2008020911A2 (en) | 2006-08-17 | 2008-02-21 | Cree, Inc. | High power insulated gate bipolar transistors |
US7601596B2 (en) * | 2006-11-16 | 2009-10-13 | Infineon Technologies Austria Ag | Semiconductor device with trench transistors and method for manufacturing such a device |
JP4561747B2 (en) * | 2007-01-11 | 2010-10-13 | 富士電機システムズ株式会社 | Semiconductor device |
US8835987B2 (en) | 2007-02-27 | 2014-09-16 | Cree, Inc. | Insulated gate bipolar transistors including current suppressing layers |
US7564099B2 (en) * | 2007-03-12 | 2009-07-21 | International Rectifier Corporation | Monolithic MOSFET and Schottky diode device |
KR100861213B1 (en) * | 2007-04-17 | 2008-09-30 | 동부일렉트로닉스 주식회사 | Semiconductor device and method for manufactruing of the same |
US8368126B2 (en) * | 2007-04-19 | 2013-02-05 | Vishay-Siliconix | Trench metal oxide semiconductor with recessed trench material and remote contacts |
JP4405529B2 (en) | 2007-05-15 | 2010-01-27 | 株式会社東芝 | Semiconductor device |
JP5285242B2 (en) * | 2007-07-04 | 2013-09-11 | ローム株式会社 | Semiconductor device |
US8633521B2 (en) | 2007-09-26 | 2014-01-21 | Stmicroelectronics N.V. | Self-bootstrapping field effect diode structures and methods |
US8148748B2 (en) * | 2007-09-26 | 2012-04-03 | Stmicroelectronics N.V. | Adjustable field effect rectifier |
WO2009042807A2 (en) | 2007-09-26 | 2009-04-02 | Lakota Technologies, Inc. | Adjustable field effect rectifier |
US7741693B1 (en) * | 2007-11-16 | 2010-06-22 | National Semiconductor Corporation | Method for integrating trench MOS Schottky barrier devices into integrated circuits and related semiconductor devices |
US20090159966A1 (en) * | 2007-12-20 | 2009-06-25 | Chih-Jen Huang | High voltage semiconductor device, method of fabricating the same, and method of fabricating the same and a low voltage semiconductor device together on a substrate |
WO2009134812A1 (en) * | 2008-04-28 | 2009-11-05 | Lakota Technologies, Inc. | Mosfet with integrated field effect rectifier |
US8232558B2 (en) | 2008-05-21 | 2012-07-31 | Cree, Inc. | Junction barrier Schottky diodes with current surge capability |
CN101752311B (en) * | 2008-12-17 | 2012-04-18 | 上海华虹Nec电子有限公司 | Method and structure for integrating power MOS transistor and Schottky diode |
JP5476747B2 (en) * | 2009-03-05 | 2014-04-23 | 日産自動車株式会社 | Semiconductor device |
JP5476746B2 (en) * | 2009-03-05 | 2014-04-23 | 日産自動車株式会社 | Semiconductor device |
US8288220B2 (en) | 2009-03-27 | 2012-10-16 | Cree, Inc. | Methods of forming semiconductor devices including epitaxial layers and related structures |
WO2010127370A2 (en) | 2009-05-01 | 2010-11-04 | Lakota Technologies, Inc. | Series current limiting device |
US8294507B2 (en) | 2009-05-08 | 2012-10-23 | Cree, Inc. | Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits |
US8629509B2 (en) | 2009-06-02 | 2014-01-14 | Cree, Inc. | High voltage insulated gate bipolar transistors with minority carrier diverter |
US8193848B2 (en) | 2009-06-02 | 2012-06-05 | Cree, Inc. | Power switching devices having controllable surge current capabilities |
TWI469221B (en) * | 2009-06-26 | 2015-01-11 | Pfc Device Co | Trench schottky diode and manufacturing mehtod thereof |
US8541787B2 (en) | 2009-07-15 | 2013-09-24 | Cree, Inc. | High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability |
US8354690B2 (en) | 2009-08-31 | 2013-01-15 | Cree, Inc. | Solid-state pinch off thyristor circuits |
US9117739B2 (en) | 2010-03-08 | 2015-08-25 | Cree, Inc. | Semiconductor devices with heterojunction barrier regions and methods of fabricating same |
US8415671B2 (en) | 2010-04-16 | 2013-04-09 | Cree, Inc. | Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices |
TWI418015B (en) * | 2010-05-13 | 2013-12-01 | Great Power Semiconductor Corp | Power semiconductor structure with field effect rectifier and fabrication method thereof |
US8319290B2 (en) | 2010-06-18 | 2012-11-27 | Fairchild Semiconductor Corporation | Trench MOS barrier schottky rectifier with a planar surface using CMP techniques |
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US8643101B2 (en) | 2011-04-20 | 2014-02-04 | United Microelectronics Corp. | High voltage metal oxide semiconductor device having a multi-segment isolation structure |
US9142662B2 (en) | 2011-05-06 | 2015-09-22 | Cree, Inc. | Field effect transistor devices with low source resistance |
US9029945B2 (en) | 2011-05-06 | 2015-05-12 | Cree, Inc. | Field effect transistor devices with low source resistance |
US8581338B2 (en) | 2011-05-12 | 2013-11-12 | United Microelectronics Corp. | Lateral-diffused metal oxide semiconductor device (LDMOS) and fabrication method thereof |
US8501603B2 (en) | 2011-06-15 | 2013-08-06 | United Microelectronics Corp. | Method for fabricating high voltage transistor |
US8592905B2 (en) | 2011-06-26 | 2013-11-26 | United Microelectronics Corp. | High-voltage semiconductor device |
US9984894B2 (en) | 2011-08-03 | 2018-05-29 | Cree, Inc. | Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions |
CN102931215B (en) * | 2011-08-11 | 2015-02-04 | 上海华虹宏力半导体制造有限公司 | IGBT (Insulated Gate Bipolar Transistor) structure integrated with low leakage-current Schottky diode and preparation method thereof |
US20130043513A1 (en) | 2011-08-19 | 2013-02-21 | United Microelectronics Corporation | Shallow trench isolation structure and fabricating method thereof |
US8729599B2 (en) | 2011-08-22 | 2014-05-20 | United Microelectronics Corp. | Semiconductor device |
US8921937B2 (en) | 2011-08-24 | 2014-12-30 | United Microelectronics Corp. | High voltage metal-oxide-semiconductor transistor device and method of fabricating the same |
US8680587B2 (en) | 2011-09-11 | 2014-03-25 | Cree, Inc. | Schottky diode |
US8664665B2 (en) | 2011-09-11 | 2014-03-04 | Cree, Inc. | Schottky diode employing recesses for elements of junction barrier array |
US9640617B2 (en) | 2011-09-11 | 2017-05-02 | Cree, Inc. | High performance power module |
US9373617B2 (en) | 2011-09-11 | 2016-06-21 | Cree, Inc. | High current, low switching loss SiC power module |
WO2013036370A1 (en) | 2011-09-11 | 2013-03-14 | Cree, Inc. | High current density power module comprising transistors with improved layout |
US8618582B2 (en) | 2011-09-11 | 2013-12-31 | Cree, Inc. | Edge termination structure employing recesses for edge termination elements |
US8742498B2 (en) | 2011-11-03 | 2014-06-03 | United Microelectronics Corp. | High voltage semiconductor device and fabricating method thereof |
US8482063B2 (en) | 2011-11-18 | 2013-07-09 | United Microelectronics Corporation | High voltage semiconductor device |
US8587058B2 (en) | 2012-01-02 | 2013-11-19 | United Microelectronics Corp. | Lateral diffused metal-oxide-semiconductor device |
US8492835B1 (en) | 2012-01-20 | 2013-07-23 | United Microelectronics Corporation | High voltage MOSFET device |
US9093296B2 (en) | 2012-02-09 | 2015-07-28 | United Microelectronics Corp. | LDMOS transistor having trench structures extending to a buried layer |
TWI523196B (en) | 2012-02-24 | 2016-02-21 | 聯華電子股份有限公司 | High voltage metal-oxide-semiconductor transistor device and layout pattern thereof |
US8890144B2 (en) | 2012-03-08 | 2014-11-18 | United Microelectronics Corp. | High voltage semiconductor device |
US9236471B2 (en) | 2012-04-24 | 2016-01-12 | United Microelectronics Corp. | Semiconductor structure and method for manufacturing the same |
US9159791B2 (en) | 2012-06-06 | 2015-10-13 | United Microelectronics Corp. | Semiconductor device comprising a conductive region |
US8836067B2 (en) | 2012-06-18 | 2014-09-16 | United Microelectronics Corp. | Transistor device and manufacturing method thereof |
US8674441B2 (en) | 2012-07-09 | 2014-03-18 | United Microelectronics Corp. | High voltage metal-oxide-semiconductor transistor device |
US8643104B1 (en) | 2012-08-14 | 2014-02-04 | United Microelectronics Corp. | Lateral diffusion metal oxide semiconductor transistor structure |
US8729631B2 (en) | 2012-08-28 | 2014-05-20 | United Microelectronics Corp. | MOS transistor |
US8829611B2 (en) | 2012-09-28 | 2014-09-09 | United Microelectronics Corp. | High voltage metal-oxide-semiconductor transistor device |
US9196717B2 (en) | 2012-09-28 | 2015-11-24 | United Microelectronics Corp. | High voltage metal-oxide-semiconductor transistor device |
US8704304B1 (en) | 2012-10-05 | 2014-04-22 | United Microelectronics Corp. | Semiconductor structure |
US20140110777A1 (en) | 2012-10-18 | 2014-04-24 | United Microelectronics Corp. | Trench gate metal oxide semiconductor field effect transistor and fabricating method thereof |
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TWI521718B (en) | 2012-12-20 | 2016-02-11 | 財團法人工業技術研究院 | Integrated device including junction barrier schottky diode embedded in mosfet cell array |
US9035425B2 (en) | 2013-05-02 | 2015-05-19 | United Microelectronics Corp. | Semiconductor integrated circuit |
US8896057B1 (en) | 2013-05-14 | 2014-11-25 | United Microelectronics Corp. | Semiconductor structure and method for manufacturing the same |
US8786362B1 (en) | 2013-06-04 | 2014-07-22 | United Microelectronics Corporation | Schottky diode having current leakage protection structure and current leakage protecting method of the same |
US8941175B2 (en) | 2013-06-17 | 2015-01-27 | United Microelectronics Corp. | Power array with staggered arrangement for improving on-resistance and safe operating area |
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US9136368B2 (en) * | 2013-10-03 | 2015-09-15 | Texas Instruments Incorporated | Trench gate trench field plate semi-vertical semi-lateral MOSFET |
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US9123802B2 (en) * | 2013-10-03 | 2015-09-01 | Texas Instruments Incorporated | Vertical trench MOSFET device in integrated power technologies |
US9136375B2 (en) | 2013-11-21 | 2015-09-15 | United Microelectronics Corp. | Semiconductor structure |
US9490360B2 (en) | 2014-02-19 | 2016-11-08 | United Microelectronics Corp. | Semiconductor device and operating method thereof |
JP6036765B2 (en) * | 2014-08-22 | 2016-11-30 | トヨタ自動車株式会社 | Semiconductor device and manufacturing method of semiconductor device |
CN107275402B (en) * | 2017-03-31 | 2020-04-21 | 成都芯源系统有限公司 | Semiconductor device and method for manufacturing the same |
CN107482006B (en) * | 2017-09-28 | 2019-03-15 | 英诺赛科(珠海)科技有限公司 | Transistor device with integrated diode |
CN114937693B (en) * | 2022-07-25 | 2022-10-28 | 深圳市威兆半导体股份有限公司 | Trench gate SiC MOSFET device with double-channel diode and preparation method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0899791A2 (en) * | 1997-08-27 | 1999-03-03 | SILICONIX Incorporated | Trench-gated MOSFET with bidirectional voltage clamping |
WO2000051167A2 (en) * | 1999-02-26 | 2000-08-31 | Fairchild Semiconductor Corporation | Monolithically integrated trench mosfet and schottky diode |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4408679A (en) * | 1981-09-28 | 1983-10-11 | Peabody Spunstrand, Inc. | Sound attenuator |
US4811065A (en) | 1987-06-11 | 1989-03-07 | Siliconix Incorporated | Power DMOS transistor with high speed body diode |
US5072266A (en) | 1988-12-27 | 1991-12-10 | Siliconix Incorporated | Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry |
JP2689606B2 (en) * | 1989-05-24 | 1997-12-10 | 富士電機株式会社 | Method for manufacturing insulated gate field effect transistor |
US4982260A (en) | 1989-10-02 | 1991-01-01 | General Electric Company | Power rectifier with trenches |
US5910669A (en) | 1992-07-24 | 1999-06-08 | Siliconix Incorporated | Field effect Trench transistor having lightly doped epitaxial region on the surface portion thereof |
US5262668A (en) | 1992-08-13 | 1993-11-16 | North Carolina State University At Raleigh | Schottky barrier rectifier including schottky barrier regions of differing barrier heights |
US5410170A (en) | 1993-04-14 | 1995-04-25 | Siliconix Incorporated | DMOS power transistors with reduced number of contacts using integrated body-source connections |
US5365102A (en) | 1993-07-06 | 1994-11-15 | North Carolina State University | Schottky barrier rectifier with MOS trench |
JP3400846B2 (en) | 1994-01-20 | 2003-04-28 | 三菱電機株式会社 | Semiconductor device having trench structure and method of manufacturing the same |
US5688725A (en) | 1994-12-30 | 1997-11-18 | Siliconix Incorporated | Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance |
US5597765A (en) * | 1995-01-10 | 1997-01-28 | Siliconix Incorporated | Method for making termination structure for power MOSFET |
JP3272242B2 (en) | 1995-06-09 | 2002-04-08 | 三洋電機株式会社 | Semiconductor device |
JP3384198B2 (en) * | 1995-07-21 | 2003-03-10 | 三菱電機株式会社 | Insulated gate semiconductor device and method of manufacturing the same |
US5612567A (en) | 1996-05-13 | 1997-03-18 | North Carolina State University | Schottky barrier rectifiers and methods of forming same |
US5877528A (en) * | 1997-03-03 | 1999-03-02 | Megamos Corporation | Structure to provide effective channel-stop in termination areas for trenched power transistors |
US6031265A (en) * | 1997-10-16 | 2000-02-29 | Magepower Semiconductor Corp. | Enhancing DMOS device ruggedness by reducing transistor parasitic resistance and by inducing breakdown near gate runners and termination area |
US6429481B1 (en) * | 1997-11-14 | 2002-08-06 | Fairchild Semiconductor Corporation | Field effect transistor and method of its manufacture |
US6204097B1 (en) * | 1999-03-01 | 2001-03-20 | Semiconductor Components Industries, Llc | Semiconductor device and method of manufacture |
US6593620B1 (en) * | 2000-10-06 | 2003-07-15 | General Semiconductor, Inc. | Trench DMOS transistor with embedded trench schottky rectifier |
-
2000
- 2000-10-06 US US09/684,931 patent/US6593620B1/en not_active Expired - Lifetime
-
2001
- 2001-09-24 TW TW090123497A patent/TW506130B/en not_active IP Right Cessation
- 2001-10-02 EP EP10011957.7A patent/EP2315247B1/en not_active Expired - Lifetime
- 2001-10-02 AU AU2001294951A patent/AU2001294951A1/en not_active Abandoned
- 2001-10-02 WO PCT/US2001/030757 patent/WO2002031880A2/en active Application Filing
- 2001-10-02 EP EP01975653A patent/EP1323191B1/en not_active Expired - Lifetime
- 2001-10-02 KR KR1020037004917A patent/KR100846158B1/en active IP Right Grant
- 2001-10-02 JP JP2002535170A patent/JP2004511910A/en active Pending
- 2001-10-02 CN CNB018169554A patent/CN100334731C/en not_active Expired - Lifetime
-
2003
- 2003-05-30 US US10/448,791 patent/US6762098B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0899791A2 (en) * | 1997-08-27 | 1999-03-03 | SILICONIX Incorporated | Trench-gated MOSFET with bidirectional voltage clamping |
WO2000051167A2 (en) * | 1999-02-26 | 2000-08-31 | Fairchild Semiconductor Corporation | Monolithically integrated trench mosfet and schottky diode |
Non-Patent Citations (1)
Title |
---|
See also references of EP1323191A2 * |
Cited By (20)
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US9368587B2 (en) | 2001-01-30 | 2016-06-14 | Fairchild Semiconductor Corporation | Accumulation-mode field effect transistor with improved current capability |
US8143124B2 (en) | 2003-05-20 | 2012-03-27 | Fairchild Semiconductor Corporation | Methods of making power semiconductor devices with thick bottom oxide layer |
US8786045B2 (en) | 2003-05-20 | 2014-07-22 | Fairchild Semiconductor Corporation | Power semiconductor devices having termination structures |
US8143123B2 (en) | 2003-05-20 | 2012-03-27 | Fairchild Semiconductor Corporation | Methods of forming inter-poly dielectric (IPD) layers in power semiconductor devices |
US7982265B2 (en) | 2003-05-20 | 2011-07-19 | Fairchild Semiconductor Corporation | Trenched shield gate power semiconductor devices and methods of manufacture |
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US8936985B2 (en) | 2003-05-20 | 2015-01-20 | Fairchild Semiconductor Corporation | Methods related to power semiconductor devices with thick bottom oxide layers |
US8889511B2 (en) | 2003-05-20 | 2014-11-18 | Fairchild Semiconductor Corporation | Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor |
US8350317B2 (en) | 2003-05-20 | 2013-01-08 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
US7754550B2 (en) | 2003-07-10 | 2010-07-13 | International Rectifier Corporation | Process for forming thick oxides on Si or SiC for semiconductor devices |
JP2005051225A (en) * | 2003-07-10 | 2005-02-24 | Internatl Rectifier Corp | Method for forming thick oxide on silicon or silicon carbide for semiconductor device |
JP2012109580A (en) * | 2003-12-30 | 2012-06-07 | Fairchild Semiconductor Corp | Power semiconductor device and manufacturing method thereof |
JP2008227514A (en) * | 2003-12-30 | 2008-09-25 | Fairchild Semiconductor Corp | Power semiconductor device and its production process |
JP4903055B2 (en) * | 2003-12-30 | 2012-03-21 | フェアチャイルド・セミコンダクター・コーポレーション | Power semiconductor device and manufacturing method thereof |
JP2007529115A (en) * | 2003-12-30 | 2007-10-18 | フェアチャイルド・セミコンダクター・コーポレーション | Power semiconductor device and manufacturing method thereof |
US8592895B2 (en) | 2005-06-10 | 2013-11-26 | Fairchild Semiconductor Corporation | Field effect transistor with source, heavy body region and shielded gate |
CN110676307B (en) * | 2019-10-12 | 2022-12-20 | 中国电子科技集团公司第十三研究所 | Preparation method of Schottky diode |
CN110676307A (en) * | 2019-10-12 | 2020-01-10 | 中国电子科技集团公司第十三研究所 | Preparation method of Schottky diode |
Also Published As
Publication number | Publication date |
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TW506130B (en) | 2002-10-11 |
EP1323191A2 (en) | 2003-07-02 |
JP2004511910A (en) | 2004-04-15 |
EP1323191B1 (en) | 2012-06-27 |
KR20030036896A (en) | 2003-05-09 |
AU2001294951A1 (en) | 2002-04-22 |
EP2315247B1 (en) | 2017-08-02 |
US20030207538A1 (en) | 2003-11-06 |
WO2002031880A3 (en) | 2002-07-25 |
US6762098B2 (en) | 2004-07-13 |
KR100846158B1 (en) | 2008-07-14 |
US6593620B1 (en) | 2003-07-15 |
EP2315247A1 (en) | 2011-04-27 |
CN100334731C (en) | 2007-08-29 |
CN1468449A (en) | 2004-01-14 |
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