WO2002041387A1 - A method for attaching an integrated circuit on a silicon chip to a smart label - Google Patents

A method for attaching an integrated circuit on a silicon chip to a smart label Download PDF

Info

Publication number
WO2002041387A1
WO2002041387A1 PCT/FI2001/000961 FI0100961W WO0241387A1 WO 2002041387 A1 WO2002041387 A1 WO 2002041387A1 FI 0100961 W FI0100961 W FI 0100961W WO 0241387 A1 WO0241387 A1 WO 0241387A1
Authority
WO
WIPO (PCT)
Prior art keywords
smart label
chip
web
integrated circuit
film
Prior art date
Application number
PCT/FI2001/000961
Other languages
French (fr)
Inventor
Samuli STRÖMBERG
Original Assignee
Rafsec Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rafsec Oy filed Critical Rafsec Oy
Priority to EP01982504A priority Critical patent/EP1336194A1/en
Priority to JP2002543690A priority patent/JP2004514291A/en
Priority to AU2002214066A priority patent/AU2002214066A1/en
Publication of WO2002041387A1 publication Critical patent/WO2002041387A1/en
Priority to US10/438,589 priority patent/US20040005754A1/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/16—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating
    • B32B37/20—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating involving the assembly of continuous webs only
    • B32B37/203—One or more of the layers being plastic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/04—Punching, slitting or perforating
    • B32B2038/042—Punching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2305/00—Condition, form or state of the layers or laminate
    • B32B2305/34—Inserts
    • B32B2305/342—Chips
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2310/00—Treatment by energy or chemical effects
    • B32B2310/08—Treatment by energy or chemical effects by wave energy or particle radiation
    • B32B2310/0806—Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation
    • B32B2310/0825—Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation using IR radiation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2519/00—Labels, badges
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/12—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/79—Apparatus for Tape Automated Bonding [TAB]
    • H01L2224/7965—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Definitions

  • a method for attaching an integrated circuit on a silicon chip to a smart label is described.
  • the present invention relates to a method for pretreatment of a silicon wafer, and a method for attaching an integrated circuit on a silicon chip to a smart label.
  • a method is known from the publication US 5,810,959, in which a substrate and a silicon chip are attached by means of an anisotropic con- ductive thermosetting adhesive by using heat and pressure.
  • Publication US 5,918,113 discloses a method, in which an anisotropic conductive adhesive is applied onto a circuit board, the adhesive containing a thermoplastic or thermosetting resin and conductive powder dispersed therein.
  • the adhesive layer is softened and a semiconductor chip is adhered to it by means of heat and pressure.
  • thermoplastic film On a substrate having a circuitry pattern formed on the substrate, a thermoplastic film is positioned, having vias that expose the bumps of the chip. The thermoplastic film forms an underfill for the chip, and when the film is heated, it connects the chip and the circuitry pattern.
  • a method is known from the publication US 6,077,382, in which an anisotropic conductive thermosetting adhesive is placed on a circuit board, and the circuit board is heated to a temperature which is lower than the setting temperature of the adhesive.
  • a semiconductor chip is placed in its position and adhered by means of heat and pressure.
  • a problem in the process of manufacture of a smart label web is how to attach the integrated circuit on the chip to the circuitry pattern.
  • the attachment can be made so that the solder bumps on the chip are attached to the circuitry pattern of the smart label and a so-called underfill is formed between the smart label and the chip by means of capillary forces, to level out tensions caused by thermal expansion between the chip and the adhering substrate.
  • the underfill also prevents the movement of the solder joint and the development of fractures in the solder joint.
  • the underfill can be stiffened to prevent bending of the joint.
  • There are several types of underfills, and the used technique is also dependent on the type of the underfill.
  • the underfill can also be formed in such a way that film pieces of suitable size are detached from a carrier web and placed on the smart label web, after which the chips provided with bumps are placed onto the underfill and the underfill is cured.
  • the underfill is a problematic point in the process, because it requires a separate process step that takes a relatively long time due to the curing time required by the underfills, typically several minutes.
  • the curing of the adhesive may be required under pressure, wherein the curing must be performed by installed thermal resistors.
  • the production line is thus expensive and inflexible.
  • the method of the invention for manufacture of a smart label web is characterized in that the integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic film on the surface of the chip.
  • the method of the invention for pretreatment of a silicon wafer is characterized in that, before the separation of the wafer into single chips, a thermoplastic film is adhered to the surface of the wafer.
  • thermoplastic film in which the thermoplastic film is readily adhered to the surface of the chip, provides the manufacture of a smart label web with the following advantages:
  • thermoplastic materials are typically about 40°C lower and the processing times are less than a third of corresponding thermo- setting materials
  • smart labels refer to labels comprising an RF-ID circuit (identification) or an RF-EAS circuit (electronic article surveillance).
  • a smart label web consists of a sequence of successive and/or adjacent smart labels.
  • the smart label can be manufactured by pressing a circuitry pattern with an electroconductive printing ink on a film, by etching the circuitry pattern on a metal film, by punching the circuitry pattern from a metal film, or by winding the circuit pattern of for example a copper wire.
  • the electrically operating RF1D (radio frequency identification) circuit of the smart label is a simple electric oscillating circuit (RCL circuit) operating at a defined frequency.
  • the circuit consists of a coil, a capacitor and an integrated circuit on a chip.
  • the integrated circuit comprises an escort memory and an RF part which is arranged to communicate with a reader device. Also the capacitor of the RCL circuit can be integrated on the chip.
  • the smart label web is of a material that is flexible but still has a suitable rigidity, such as polycarbonate, polyolefine, polyester, polyethylene terephta- late (PET), polyvinyl chloride (PVC), or acrylonitrile / butadiene / styrene copolymer (ABS).
  • the wafer is normally supplied for use in attaching processes so that the chips are separated from each other, on top of a carrying film carried by a frame.
  • the single chips are detached in the process by pushing the chip mechanically from underneath the carrying film and by gripping it from the opposite side with a turning tool utilizing an underpressure suction.
  • thermoplastic films refer to films whose surface can be made adherent to another surface by the effect of heat, but which are substantially non- adherent in room temperature. Thermoplastic films can also be heated several times without substantially affecting the adherence. Substantially the same process conditions can be used for both anisotropic conducting and non-conducting thermoplastic films.
  • thermoplastic films include anisotropic conductive films 8773 and 8783 (Z-Axis Adhesive Films 8773 and 8783) by 3M.
  • the film contains conductive particles in such a way that it is electroconductive in the thickness direction of the film only, that is, there is no conductivity in the direction of the plane of the film.
  • the thermoplastic film can be made fluid by means of heat and pressure. When cooled, the thermoplastic film is crystallized and gives the bond mechanical strength. Thermosetting will not be necessary.
  • the thermoplastic film can be of e.g. polyester or polyether amide.
  • the conductive particles having a size of typically 7 to 50 ⁇ m, can be e.g. glass particles coated with silver.
  • the thickness of the thermoplastic film is typically 20 to 70 ⁇ .
  • the thermoplastic film is normally formed on the surface of a release paper or the like.
  • the release paper can be released from the film in connection with heating of the film.
  • the process temperatures presented in the application, typical for thermoplastic films, are the same both for the bonding of the film on the wafer and for the bonding of the film-coated chip to the smart label of the smart label web, because it is a question of temperatures related to the properties of these materials.
  • thermoplastic film can be an anisotropic electroconductive thermoplastic film (AFC) or a non-conductive film (NCF).
  • AFC anisotropic electroconductive thermoplastic film
  • NCF non-conductive film
  • chips are picked up in a continuous manner so that the chips are placed onto the smart label web in a precisely focused manner.
  • the web is heated on the opposite side so that the chip is tacked lightly to the web before making the final bond.
  • the final bond of the chip can be made by means of heat and pressure for example in a nip formed by two rolls, where at least one of the contact surfaces forming the nip is heated and at least one is resilient.
  • nip it is possible either to laminate, on both sides of the smart label web, the other layers simul- taneously onto the structure, or to leave out the layers and to use the nip to achieve a connection only.
  • a nip can also be formed between a shoe roll and its counter roll.
  • the thermoplastic film can also be heated by microwaves, wherein the film can be heated selectively, simultaneously applying pressure on the bond (materials blended with selective additives are heated in a microwave field).
  • Fig. 1 shows a process chart for attaching a chip to a smart label by a method of prior art
  • Fig. 2 shows, in a process chart, the method of the invention for attaching a chip onto a smart label
  • Fig. 3 shows a smart label web in a top view
  • Figs. 4 and 5 show side views of some production lines according to the invention, whereby a chip can be attached to smart labels of a smart label web.
  • FIG. 1 shows a prior art method for forming an anisotropic thermo- setting film attachment.
  • a smart label web containing smart labels one after another and possibly also adjacent to each other, is unwound from a reel. From another reel, a carrier web is unwound that contains pieces of a thermosetting film with the required size on its surface.
  • a piece of the thermosetting anisotropic film is detached from the carrier web and placed on the smart label at the point where the chip provided with bumps will be attached in the next step of the process.
  • the thermosetting anisotropic conductive underfill is cured, and the smart label web is then possibly laminated with the other layers of the web. Finally, the smart label web and the other layers possibly attached to it are reeled up.
  • FIG. 2 shows a new method according to the invention, in which a chip is attached to a smart label web by means of a thermoplastic, anisotropic conductive film or a thermoplastic non-conductive film.
  • the smart label web is unwound, and a chip is placed onto the circuitry pattern of the smart label, a thermoplastic film being readily attached to the other surface of the chip.
  • the smart label web is heated to such a temperature that the film on the surface of the web can be attached to the web, at a desired location.
  • the final bond of the chip and the smart label is made by means of heat and pressure, for example in a nip formed by two rolls, longer than a nip formed by hard rolls.
  • the smart label web is heated. Simultaneously with the final bonding of the chip, it is possible to laminate the smart label web with the other web layers.
  • the lamination process can also be sepa- rate, wherein the hot and long nip is only used to perform the final bonding of the chip to the smart label web.
  • the smart label web and the other layers possibly attached to it are reeled up.
  • FIG. 3 shows a smart label web W2 in a top view, including a single smart label 12 comprising a circuitry pattern 13 and an integrated circuit 14 therein.
  • the smart label 12 can be manufactured by pressing the circuitry pattern on a film with an electroconductive printing ink, by etching the circuitry pattern on a metal film, by punching the circuitry pattern from a metal film, or by winding the circuitry pattern of e.g. cop- per wire.
  • the circuitry pattern is provided with an identification circuit, such as a radio frequency identification (RFID) circuit.
  • RFID radio frequency identification
  • the identification circuit is a simple electric oscillating circuit (RCL circuit) tuned to operate at a defined frequency.
  • the circuit consists of a coil, a capacitor and a circuit integrated on a chip, consisting of an escort memory and an RF part for communication with a reader device.
  • the capacitor of the RCL circuit can also be integrated on the chip.
  • the smart label web W2 containing smart labels 12 one after another on a carrier web is unwound from a reel 3.
  • the carrier web may also contain several smart labels side by side.
  • the material of the smart label web W2, onto whose surface the circuitry pattern is formed and the integrated circuit is attached, is preferably a plastic film with a suitable rigidity.
  • thermoplastic film is preferably heated to a temperature of 80 to 105°C.
  • the thermoplastic film is preferably heated to a temperature of 140 to 150°C.
  • the smart label web can be led to a nip where at least one of the two contact surfaces is heated.
  • the nip is preferably a nip longer than a nip formed by hard rolls.
  • the nip can be for example a nip N1 formed by a thermoroll and a resilient roll, wherein the pressure per unit area is lower than in a corresponding hard nip.
  • One of the contact surfaces forming the nip can also be a shoe roll.
  • thermo- plastic film between the circuitry pattern of the smart label and the integrated circuit on the chip is heated for example by microwaves.
  • the thermo- plastic film is thus blended with additives which are heated by microwaves.
  • the smart label web, onto which the integrated circuit on the chip is placed is introduced to a process step which exerts pressure on the joint surface. It is also pos- sible that the heating by microwaves and the exertion of pressure on the joint surface take place simultaneously.
  • the force which is exerted to the joint is preferably 200 to 800 g per joint, irrespective of which of the above-mentioned methods is used for making the final bond of the chip. After the chip has been attached to the smart label web W2, the web is reeled up on a roll 11.
  • Figure 5 shows a method in which the circuit integrated on the chip is attached to the circuitry pattern of the smart label as presented in connection with the description of Fig. 4. It is thus possible that in the same nip where the final bond of the integrated circuit is made, the smart label web W2, a liner web W1 and a back web W3 are also combined. Thus, the continuous web comprising the liner web W1 is unwound from the reel 5. From the reverse side of the liner web W1 , the release web of the liner web is released and, after the releasing, it is reeled up on a roll 4.
  • the liner web W1 is impregnated with an adhesive whose adhesion can be improved by heating it with a heater 7 which can be for example an infrared heater.
  • the material of the liner web W1 is preferably a poly- olefine film, such as a polypropylene or polyethylene film.
  • the continuous web comprising the back web W3 is unwound from the reel 1. From the reverse side of the back web W3, the release web of the back web is released and, after the releasing, it is reeled up on a roll 2. On the side where the release web was released, the back web W3 is provided with an adhesive.
  • the adhesive can be for example a pressure-sensitive adhesive which can be made to adhere to another surface by pressing it against the other surface.
  • the liner web W1 , the smart label web W2 and the back web W3 are bound to each other in a nip N1 formed by rolls 8 and 9, which is a resilient, long nip.
  • the nip N1 is followed by a radiator device 10 to which the blank of the smart label inlet web W4 is led, if the surface of any web is provided with an adhesive to be cured by radiation.
  • the radiator device 10 can produce ultraviolet radiation or electron beams.
  • the blank of the smart label inlet web W4 is further introduced to a punching unit 18 in which the liner web W1 and the smart web W2 are punched at a suitable location so that the surface of the back web W3 is provided with a sequence of smart labels 12 of a fixed size and protective surface films on top of them. After the punching, excess parts of the liner web W1 and the smart label web W3 are left outside the smart label 12 and the surface film and are removed by reeling up the excess material on a reel 19.
  • the ready made web W5 is
  • Fig. 5 can be modified according to the need. It can be supplemented with new parts or something can be left out. In some processes, for example the treatment with an infrared heater, the curing of the adhesive in a radiator device, the punching to a suitable size, or the removal of excess material may be unnecessary steps in the process. When several webs are combined in the same nip, their number is not limited but it may vary according to the case.
  • thermoplastic film readily onto the surface of the integrated circuit on the chip, it is possible to make the final bond between the chip and the smart label in a simple and reliable manner.

Abstract

A method for manufacturing a smart label web comprises smart labels placed one after and/or next to each other and comprising a circuitry pattern and an integrated circuit on a chip therein. In the method, an electric contact is formed between the integrated circuit on the chip and the circuitry pattern on the smart label of the smart label web. The integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic film on the surface of the chip.

Description

A method for attaching an integrated circuit on a silicon chip to a smart label.
The present invention relates to a method for pretreatment of a silicon wafer, and a method for attaching an integrated circuit on a silicon chip to a smart label.
A method is known from the publication US 5,810,959, in which a substrate and a silicon chip are attached by means of an anisotropic con- ductive thermosetting adhesive by using heat and pressure.
Publication US 5,918,113 discloses a method, in which an anisotropic conductive adhesive is applied onto a circuit board, the adhesive containing a thermoplastic or thermosetting resin and conductive powder dispersed therein. The adhesive layer is softened and a semiconductor chip is adhered to it by means of heat and pressure.
From the publication US 5,918,363, a method is known in which integrated circuits formed on a wafer are tested to determine whether they are functional, an underfill is applied on the functional integrated circuits, and the chips are separated from each other. The underfill can contain a thermoplastic substance. After this, the silicon chips are connected to their location of use in such a way that the underfill is spread around the electric connections.
From the publication US 5,936,847, an electronic circuit is known in which there is a non-conductive polymer layer forming the underfill between the substrate and the chip. The polymer layer is provided with openings for electrical contacts. The substrate is also provided with openings, through which a conductive polymer is sprayed to form an electrical contact between the substrate and the chip.
The publication US 6,040,630 discloses a connection for a chip which can also be released, if necessary. On a substrate having a circuitry pattern formed on the substrate, a thermoplastic film is positioned, having vias that expose the bumps of the chip. The thermoplastic film forms an underfill for the chip, and when the film is heated, it connects the chip and the circuitry pattern.
A method is known from the publication US 6,077,382, in which an anisotropic conductive thermosetting adhesive is placed on a circuit board, and the circuit board is heated to a temperature which is lower than the setting temperature of the adhesive. A semiconductor chip is placed in its position and adhered by means of heat and pressure.
A problem in the process of manufacture of a smart label web is how to attach the integrated circuit on the chip to the circuitry pattern. According to prior art, the attachment can be made so that the solder bumps on the chip are attached to the circuitry pattern of the smart label and a so-called underfill is formed between the smart label and the chip by means of capillary forces, to level out tensions caused by thermal expansion between the chip and the adhering substrate. The underfill also prevents the movement of the solder joint and the development of fractures in the solder joint. By adding filler particles in the underfill, the underfill can be stiffened to prevent bending of the joint. There are several types of underfills, and the used technique is also dependent on the type of the underfill. Using an anisotropic conductive thermosetting underfill, the underfill can also be formed in such a way that film pieces of suitable size are detached from a carrier web and placed on the smart label web, after which the chips provided with bumps are placed onto the underfill and the underfill is cured.
The underfill is a problematic point in the process, because it requires a separate process step that takes a relatively long time due to the curing time required by the underfills, typically several minutes. In the proc- ess, the curing of the adhesive may be required under pressure, wherein the curing must be performed by installed thermal resistors. The production line is thus expensive and inflexible.
By means of the methods according to the invention it is possible to avoid the above-mentioned problems. The method of the invention for manufacture of a smart label web is characterized in that the integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic film on the surface of the chip. The method of the invention for pretreatment of a silicon wafer is characterized in that, before the separation of the wafer into single chips, a thermoplastic film is adhered to the surface of the wafer.
The method of the invention, in which the thermoplastic film is readily adhered to the surface of the chip, provides the manufacture of a smart label web with the following advantages:
- there is no need for a separate method step for attaching an anisotropic conductive film piece to the smart label, nor for time- consuming hardening by heat, wherein the production line becomes simpler, more reliable and less expensive than production lines of prior art,
it is possible to improve the capacity of smart label production lines,
it is possible to have shorter processing times,
it is possible to use materials with lower temperature resistance in the smart label web, because the processing temperatures of thermoplastic materials are typically about 40°C lower and the processing times are less than a third of corresponding thermo- setting materials, and
it is possible to integrate the steps of the process better than before.
In this Finnish application, the English terms corresponding to the Finnish terms are often included in parenthesis, because the English terms are regularly used by persons skilled in the art.
In the present application, smart labels refer to labels comprising an RF-ID circuit (identification) or an RF-EAS circuit (electronic article surveillance). A smart label web consists of a sequence of successive and/or adjacent smart labels. The smart label can be manufactured by pressing a circuitry pattern with an electroconductive printing ink on a film, by etching the circuitry pattern on a metal film, by punching the circuitry pattern from a metal film, or by winding the circuit pattern of for example a copper wire. The electrically operating RF1D (radio frequency identification) circuit of the smart label is a simple electric oscillating circuit (RCL circuit) operating at a defined frequency. The circuit consists of a coil, a capacitor and an integrated circuit on a chip. The integrated circuit comprises an escort memory and an RF part which is arranged to communicate with a reader device. Also the capacitor of the RCL circuit can be integrated on the chip. The smart label web is of a material that is flexible but still has a suitable rigidity, such as polycarbonate, polyolefine, polyester, polyethylene terephta- late (PET), polyvinyl chloride (PVC), or acrylonitrile / butadiene / styrene copolymer (ABS).
The wafer is normally supplied for use in attaching processes so that the chips are separated from each other, on top of a carrying film carried by a frame. The single chips are detached in the process by pushing the chip mechanically from underneath the carrying film and by gripping it from the opposite side with a turning tool utilizing an underpressure suction.
In the method of the invention for pretreatment of a silicon wafer, the wafer is pretreated so that a thermoplastic film is attached to the surface of the wafer which is provided with bumps and checked for functionality, before the separation of the wafer into single chips. Thermoplastic films refer to films whose surface can be made adherent to another surface by the effect of heat, but which are substantially non- adherent in room temperature. Thermoplastic films can also be heated several times without substantially affecting the adherence. Substantially the same process conditions can be used for both anisotropic conducting and non-conducting thermoplastic films. As an example to be mentioned, thermoplastic films include anisotropic conductive films 8773 and 8783 (Z-Axis Adhesive Films 8773 and 8783) by 3M. The film contains conductive particles in such a way that it is electroconductive in the thickness direction of the film only, that is, there is no conductivity in the direction of the plane of the film. The thermoplastic film can be made fluid by means of heat and pressure. When cooled, the thermoplastic film is crystallized and gives the bond mechanical strength. Thermosetting will not be necessary. The thermoplastic film can be of e.g. polyester or polyether amide. The conductive particles, having a size of typically 7 to 50 μm, can be e.g. glass particles coated with silver. The thickness of the thermoplastic film is typically 20 to 70 μ . The thermoplastic film is normally formed on the surface of a release paper or the like. The release paper can be released from the film in connection with heating of the film. The process temperatures presented in the application, typical for thermoplastic films, are the same both for the bonding of the film on the wafer and for the bonding of the film-coated chip to the smart label of the smart label web, because it is a question of temperatures related to the properties of these materials.
In the method of the invention for bonding a chip to a smart label in a smart label web, the chip and the circuitry pattern are connected to each other by means of a thermoplastic film attached to the chip, wherein an electric contact is formed between the chip and the circuitry pattern. The thermoplastic film can be an anisotropic electroconductive thermoplastic film (AFC) or a non-conductive film (NCF). When a thermoplastic film is used, there is no need for an underfill, because the thermoplastic film forms a sufficiently flexible backing for the chip. When a non-conductive thermoplastic film is used, the reliability of the electric contact is slightly lower than in the case of an anisotropic conductive film, but it is still sufficient. It is also possible to introduce the thermoplastic non-conductive film in the full width of the web on top of the smart label web and to connect the chips to the contact area.
From the wafer that is separated into single chips after the attachment of the thermoplastic film, chips are picked up in a continuous manner so that the chips are placed onto the smart label web in a precisely focused manner. When the chip is placed onto the web, the web is heated on the opposite side so that the chip is tacked lightly to the web before making the final bond. After this, the final bond of the chip can be made by means of heat and pressure for example in a nip formed by two rolls, where at least one of the contact surfaces forming the nip is heated and at least one is resilient. In said nip, it is possible either to laminate, on both sides of the smart label web, the other layers simul- taneously onto the structure, or to leave out the layers and to use the nip to achieve a connection only. At the same time, it is possible to level out the profile of the smart label by discharging some of the thermoplastic film in fluid form from the top of the chip. It is also possible to start cross-linking of an adhesive layer upon combining several layers simultaneously, to provide a more reliable lamination result or a more rigid structure.
In addition to the above-mentioned nip, a nip can also be formed between a shoe roll and its counter roll. The thermoplastic film can also be heated by microwaves, wherein the film can be heated selectively, simultaneously applying pressure on the bond (materials blended with selective additives are heated in a microwave field).
In the following, the invention will be described with reference to the appended drawings, in which
Fig. 1 shows a process chart for attaching a chip to a smart label by a method of prior art,
Fig. 2 shows, in a process chart, the method of the invention for attaching a chip onto a smart label,
Fig. 3 shows a smart label web in a top view, and
Figs. 4 and 5 show side views of some production lines according to the invention, whereby a chip can be attached to smart labels of a smart label web.
Figure 1 shows a prior art method for forming an anisotropic thermo- setting film attachment. A smart label web containing smart labels one after another and possibly also adjacent to each other, is unwound from a reel. From another reel, a carrier web is unwound that contains pieces of a thermosetting film with the required size on its surface. A piece of the thermosetting anisotropic film is detached from the carrier web and placed on the smart label at the point where the chip provided with bumps will be attached in the next step of the process. The thermosetting anisotropic conductive underfill is cured, and the smart label web is then possibly laminated with the other layers of the web. Finally, the smart label web and the other layers possibly attached to it are reeled up.
Figure 2 shows a new method according to the invention, in which a chip is attached to a smart label web by means of a thermoplastic, anisotropic conductive film or a thermoplastic non-conductive film. The smart label web is unwound, and a chip is placed onto the circuitry pattern of the smart label, a thermoplastic film being readily attached to the other surface of the chip. On the opposite side of the web, the smart label web is heated to such a temperature that the film on the surface of the web can be attached to the web, at a desired location. After this, the final bond of the chip and the smart label is made by means of heat and pressure, for example in a nip formed by two rolls, longer than a nip formed by hard rolls. Thus, at least one of the two contact surfaces forming the nip is heated. Simultaneously with the final bonding of the chip, it is possible to laminate the smart label web with the other web layers. The lamination process can also be sepa- rate, wherein the hot and long nip is only used to perform the final bonding of the chip to the smart label web. Finally, the smart label web and the other layers possibly attached to it are reeled up.
Figure 3 shows a smart label web W2 in a top view, including a single smart label 12 comprising a circuitry pattern 13 and an integrated circuit 14 therein. The smart label 12 can be manufactured by pressing the circuitry pattern on a film with an electroconductive printing ink, by etching the circuitry pattern on a metal film, by punching the circuitry pattern from a metal film, or by winding the circuitry pattern of e.g. cop- per wire. The circuitry pattern is provided with an identification circuit, such as a radio frequency identification (RFID) circuit. The identification circuit is a simple electric oscillating circuit (RCL circuit) tuned to operate at a defined frequency. The circuit consists of a coil, a capacitor and a circuit integrated on a chip, consisting of an escort memory and an RF part for communication with a reader device. The capacitor of the RCL circuit can also be integrated on the chip.
In Fig. 4, the smart label web W2 containing smart labels 12 one after another on a carrier web, is unwound from a reel 3. The carrier web may also contain several smart labels side by side. The material of the smart label web W2, onto whose surface the circuitry pattern is formed and the integrated circuit is attached, is preferably a plastic film with a suitable rigidity.
From a wafer which is provided with bumps, whose surface is impreg- nated with a thermoplastic film and which is separated into single chips after the impregnation with the film, a single chip is picked up and placed onto the circuitry pattern 13 of the smart label in a focused manner by means of an insertion tool 15. At the same time, the smart label is heated with a heater 16 at the location where the chip is placed on the opposite side of the smart label. The heating of the smart label will make the thermoplastic film on the surface of the chip adhere to the circuitry pattern. The thermoplastic film is preferably heated to a temperature of 80 to 105°C.
Further, the final bond between the integrated circuit on the chip and the circuitry pattern is made on application of heat. Thus, the thermoplastic film is preferably heated to a temperature of 140 to 150°C. The smart label web can be led to a nip where at least one of the two contact surfaces is heated. The nip is preferably a nip longer than a nip formed by hard rolls. The nip can be for example a nip N1 formed by a thermoroll and a resilient roll, wherein the pressure per unit area is lower than in a corresponding hard nip. One of the contact surfaces forming the nip can also be a shoe roll. It is also possible that the heating takes place before the nip, wherein the thermoplastic film between the circuitry pattern of the smart label and the integrated circuit on the chip is heated for example by microwaves. The thermo- plastic film is thus blended with additives which are heated by microwaves. After the heating by microwaves, the smart label web, onto which the integrated circuit on the chip is placed, is introduced to a process step which exerts pressure on the joint surface. It is also pos- sible that the heating by microwaves and the exertion of pressure on the joint surface take place simultaneously. The force which is exerted to the joint is preferably 200 to 800 g per joint, irrespective of which of the above-mentioned methods is used for making the final bond of the chip. After the chip has been attached to the smart label web W2, the web is reeled up on a roll 11.
Figure 5 shows a method in which the circuit integrated on the chip is attached to the circuitry pattern of the smart label as presented in connection with the description of Fig. 4. It is thus possible that in the same nip where the final bond of the integrated circuit is made, the smart label web W2, a liner web W1 and a back web W3 are also combined. Thus, the continuous web comprising the liner web W1 is unwound from the reel 5. From the reverse side of the liner web W1 , the release web of the liner web is released and, after the releasing, it is reeled up on a roll 4. On the side where the release web was released, the liner web W1 is impregnated with an adhesive whose adhesion can be improved by heating it with a heater 7 which can be for example an infrared heater. The material of the liner web W1 is preferably a poly- olefine film, such as a polypropylene or polyethylene film.
The continuous web comprising the back web W3 is unwound from the reel 1. From the reverse side of the back web W3, the release web of the back web is released and, after the releasing, it is reeled up on a roll 2. On the side where the release web was released, the back web W3 is provided with an adhesive. The adhesive can be for example a pressure-sensitive adhesive which can be made to adhere to another surface by pressing it against the other surface.
The liner web W1 , the smart label web W2 and the back web W3 are bound to each other in a nip N1 formed by rolls 8 and 9, which is a resilient, long nip. The nip N1 is followed by a radiator device 10 to which the blank of the smart label inlet web W4 is led, if the surface of any web is provided with an adhesive to be cured by radiation. The radiator device 10 can produce ultraviolet radiation or electron beams. The blank of the smart label inlet web W4 is further introduced to a punching unit 18 in which the liner web W1 and the smart web W2 are punched at a suitable location so that the surface of the back web W3 is provided with a sequence of smart labels 12 of a fixed size and protective surface films on top of them. After the punching, excess parts of the liner web W1 and the smart label web W3 are left outside the smart label 12 and the surface film and are removed by reeling up the excess material on a reel 19. The ready made web W5 is reeled up on a reel 11.
The process according to Fig. 5 can be modified according to the need. It can be supplemented with new parts or something can be left out. In some processes, for example the treatment with an infrared heater, the curing of the adhesive in a radiator device, the punching to a suitable size, or the removal of excess material may be unnecessary steps in the process. When several webs are combined in the same nip, their number is not limited but it may vary according to the case.
The invention is not restricted to the description above, but the invention may vary within the scope of the claims. The main idea in the invention is that by attaching the thermoplastic film readily onto the surface of the integrated circuit on the chip, it is possible to make the final bond between the chip and the smart label in a simple and reliable manner.

Claims

Claims:
1. A method for manufacturing a smart label web, the smart label web comprising smart labels one after the other and/or side by side, which comprise a circuitry pattern and an integrated circuit on a chip attached to it, and in which method, an electric contact is formed between the integrated circuit on the chip and the circuitry pattern on the smart label of the smart label web, characterized in that the integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic film on the surface of the chip.
2. The method according to claim 1 , characterized in that the integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic anisotropic conductive film on the surface of the chip.
3. The method according to claim 1 , characterized in that the integrated circuit on the chip is attached to the circuitry pattern of the smart label by means of a thermoplastic non-conductive film on the surface of the chip.
4. The method according to claim 1 , characterized in that the smart label is heated at the location of the bond of the chip in such a way that the thermoplastic film can be made to adhere to the circuitry pattern of the smart label.
5. The method according to any of the preceding claims 1-4, characterized in that the smart label, to which the integrated circuit on the chip is attached, is subjected to a treatment by heat and pressure in such a way that the treatments by heat and pressure are simultaneous or successive steps in the process.
6. The method according to claim 5, characterized in that the smart label web is attached to the other web layers simultaneously when it is treated by heat and pressure.
7. The method according to claim 5, characterized in that the smart label web is treated by heat and pressure in a nip which is formed by contact surfaces of which at least one is resilient and at least one is heated.
8. The method according to claim 5, characterized in that the smart label web is treated by heat and pressure in such a way that the thermoplastic film is first heated by microwaves and the smart label web is then subjected to pressure.
9. A method for pretreatment of a silicon wafer, in which method integrated circuits, provided with bumps and checked for functionality, are separated into single chips, characterized in that before the separation of the wafer into single chips, a thermoplastic film is attached to the surface of the wafer.
10. The method according to claim 9, characterized in that the thermoplastic film and/or wafer is heated in such a way that the thermoplastic film adheres to the surface of the wafer.
11. The method according to claim 9 or 10, characterized in that a release paper or the like is released from the thermoplastic film.
12. The device according to any of the preceding claims 9 to 11 , char- acterized in that the wafer is separated into single chips.
PCT/FI2001/000961 2000-11-20 2001-11-05 A method for attaching an integrated circuit on a silicon chip to a smart label WO2002041387A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP01982504A EP1336194A1 (en) 2000-11-20 2001-11-05 A method for attaching an integrated circuit on a silicon chip to a smart label
JP2002543690A JP2004514291A (en) 2000-11-20 2001-11-05 How to attach an integrated circuit on a silicon chip to a smart label
AU2002214066A AU2002214066A1 (en) 2000-11-20 2001-11-05 A method for attaching an integrated circuit on a silicon chip to a smart label
US10/438,589 US20040005754A1 (en) 2000-11-20 2003-05-15 Method for attaching an integrated circuit on a silicon chip to a smart label

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20002543A FI113851B (en) 2000-11-20 2000-11-20 Method of attaching a chip's integrated circuit to an intelligent self-adhesive label and method of pre-treating a silicon wafer
FI20002543 2000-11-20

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/438,589 Continuation US20040005754A1 (en) 2000-11-20 2003-05-15 Method for attaching an integrated circuit on a silicon chip to a smart label

Publications (1)

Publication Number Publication Date
WO2002041387A1 true WO2002041387A1 (en) 2002-05-23

Family

ID=8559534

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FI2001/000961 WO2002041387A1 (en) 2000-11-20 2001-11-05 A method for attaching an integrated circuit on a silicon chip to a smart label

Country Status (6)

Country Link
US (1) US20040005754A1 (en)
EP (1) EP1336194A1 (en)
JP (1) JP2004514291A (en)
AU (1) AU2002214066A1 (en)
FI (1) FI113851B (en)
WO (1) WO2002041387A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1560155A1 (en) * 2004-01-31 2005-08-03 Atlantic ZeiserGmbH Manufacturing method for non-contact chip cards

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6951596B2 (en) * 2002-01-18 2005-10-04 Avery Dennison Corporation RFID label technique
JP2005306470A (en) * 2004-03-25 2005-11-04 Tatsuo Sasazaki Sheet-like molding
US7109867B2 (en) * 2004-09-09 2006-09-19 Avery Dennison Corporation RFID tags with EAS deactivation ability
US7500307B2 (en) * 2004-09-22 2009-03-10 Avery Dennison Corporation High-speed RFID circuit placement method
US7623034B2 (en) * 2005-04-25 2009-11-24 Avery Dennison Corporation High-speed RFID circuit placement method and device
US7555826B2 (en) 2005-12-22 2009-07-07 Avery Dennison Corporation Method of manufacturing RFID devices
FI120018B (en) 2006-04-28 2009-05-29 Wisteq Oy Remote identifier and subject and procedure for making a remote identifier
US7546676B2 (en) * 2007-05-31 2009-06-16 Symbol Technologies, Inc. Method for manufacturing micro-strip antenna element

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0824270A2 (en) * 1996-08-06 1998-02-18 Hitachi Chemical Co., Ltd. A method of mounting a plurality of electronic parts on a circuit board
US5973600A (en) * 1997-09-11 1999-10-26 Precision Dynamics Corporation Laminated radio frequency identification device
JP2000113147A (en) * 1998-10-08 2000-04-21 Hitachi Chem Co Ltd Ic card and its manufacture
EP1014302A1 (en) * 1998-07-08 2000-06-28 Dai Nippon Printing Co., Ltd. Noncontact ic card and manufacture thereof
US6113728A (en) * 1989-03-09 2000-09-05 Hitachi Chemical Company, Ltd. Process for connecting circuits and adhesive film used therefor

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE792488A (en) * 1971-12-08 1973-03-30 Dainippon Printing Co Ltd IDENTIFICATION CARDS AND METHOD FOR MANUFACTURING SUCH CARDS
DE3130032A1 (en) * 1981-07-30 1983-02-17 Agfa-Gevaert Ag, 5090 Leverkusen COUNTERFEIT-PROOF DOCUMENT
US4954814A (en) * 1986-09-29 1990-09-04 Monarch Marking Systems, Inc. Tag and method of making same
US4846922A (en) * 1986-09-29 1989-07-11 Monarch Marking Systems, Inc. Method of making deactivatable tags
KR0147813B1 (en) * 1989-05-16 1998-08-01 월터 클리웨인, 한스-피터 위트린 Laminated structure and process for the production thereof
JPH03239595A (en) * 1990-02-16 1991-10-25 Dainippon Printing Co Ltd Manufacture of card
JPH04321190A (en) * 1991-04-22 1992-11-11 Mitsubishi Electric Corp Antenna circuit and its production for non-contact type portable storage
JP3842362B2 (en) * 1996-02-28 2006-11-08 株式会社東芝 Thermocompression bonding method and thermocompression bonding apparatus
US5936847A (en) * 1996-05-02 1999-08-10 Hei, Inc. Low profile electronic circuit modules
US5918363A (en) * 1996-05-20 1999-07-06 Motorola, Inc. Method for marking functional integrated circuit chips with underfill material
JPH1084014A (en) * 1996-07-19 1998-03-31 Shinko Electric Ind Co Ltd Manufacture of semiconductor device
US5867102C1 (en) * 1997-02-27 2002-09-10 Wallace Comp Srvices Inc Electronic article surveillance label assembly and method of manufacture
US6077382A (en) * 1997-05-09 2000-06-20 Citizen Watch Co., Ltd Mounting method of semiconductor chip
US5982284A (en) * 1997-09-19 1999-11-09 Avery Dennison Corporation Tag or label with laminated thin, flat, flexible device
US6040630A (en) * 1998-04-13 2000-03-21 Harris Corporation Integrated circuit package for flip chip with alignment preform feature and method of forming same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6113728A (en) * 1989-03-09 2000-09-05 Hitachi Chemical Company, Ltd. Process for connecting circuits and adhesive film used therefor
EP0824270A2 (en) * 1996-08-06 1998-02-18 Hitachi Chemical Co., Ltd. A method of mounting a plurality of electronic parts on a circuit board
US5973600A (en) * 1997-09-11 1999-10-26 Precision Dynamics Corporation Laminated radio frequency identification device
EP1014302A1 (en) * 1998-07-08 2000-06-28 Dai Nippon Printing Co., Ltd. Noncontact ic card and manufacture thereof
JP2000113147A (en) * 1998-10-08 2000-04-21 Hitachi Chem Co Ltd Ic card and its manufacture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1560155A1 (en) * 2004-01-31 2005-08-03 Atlantic ZeiserGmbH Manufacturing method for non-contact chip cards
US7264993B2 (en) 2004-01-31 2007-09-04 Atlantic Zeiser Gmbh Method for producing information carriers

Also Published As

Publication number Publication date
FI20002543A0 (en) 2000-11-20
FI113851B (en) 2004-06-30
FI20002543A (en) 2002-05-21
EP1336194A1 (en) 2003-08-20
US20040005754A1 (en) 2004-01-08
AU2002214066A1 (en) 2002-05-27
JP2004514291A (en) 2004-05-13

Similar Documents

Publication Publication Date Title
US7244332B2 (en) Smart label web and a method for its manufacture
EP1399881B1 (en) A smart label and a smart label web
US7236093B2 (en) Method for the manufacture of a smart label inlet web, and a smart label inlet web
JP4283667B2 (en) Injection molded product and manufacturing method thereof
EP1292455B1 (en) A method and an apparatus for manufacturing a smart label inlet web
EP1964034B1 (en) Electrical device manufacturing techniques
US20020020491A1 (en) High speed flip chip assembly process
CA2650700A1 (en) Printed circuit board element comprising at least one embedded component as well as method for embedding at least one component in a printed circuit board element
FI111039B (en) Smart card and procedure for its preparation
FI119401B (en) Smart label web and process for its manufacture
US20040005754A1 (en) Method for attaching an integrated circuit on a silicon chip to a smart label
KR20070043635A (en) Rfid antenna with pre-applied adhesives
KR100846236B1 (en) A smart card web and a method for its manufacture
JP2020536774A (en) Methods and equipment for producing labels with integrated conductive patterns
WO2006133380A2 (en) Manufacturing of electronic devices using conductive polymer
FI111485B (en) A method of affixing an RFID tag to one surface

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2001982504

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 10438589

Country of ref document: US

WWE Wipo information: entry into national phase

Ref document number: 2002543690

Country of ref document: JP

WWP Wipo information: published in national office

Ref document number: 2001982504

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

WWW Wipo information: withdrawn in national office

Ref document number: 2001982504

Country of ref document: EP