WO2002043072A3 - Very small swing and low voltage cmos static memory - Google Patents
Very small swing and low voltage cmos static memory Download PDFInfo
- Publication number
- WO2002043072A3 WO2002043072A3 PCT/US2001/046942 US0146942W WO0243072A3 WO 2002043072 A3 WO2002043072 A3 WO 2002043072A3 US 0146942 W US0146942 W US 0146942W WO 0243072 A3 WO0243072 A3 WO 0243072A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- storage elements
- coupled
- sensing device
- low voltage
- static memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/067—Single-ended amplifiers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/06—Sense amplifier related aspects
- G11C2207/063—Current sense amplifiers
Abstract
The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60119583T DE60119583T2 (en) | 2000-11-03 | 2001-11-05 | CMOS memory with small fluctuating voltages and low operating voltage |
EP01989977A EP1374248B1 (en) | 2000-11-03 | 2001-11-05 | Very small swing and low voltage cmos static memory |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US24591300P | 2000-11-03 | 2000-11-03 | |
US60/245,913 | 2000-11-03 | ||
US10/012,858 | 2001-11-03 | ||
US10/012,858 US6639866B2 (en) | 2000-11-03 | 2001-11-03 | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002043072A2 WO2002043072A2 (en) | 2002-05-30 |
WO2002043072A3 true WO2002043072A3 (en) | 2003-04-24 |
Family
ID=26684094
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/046942 WO2002043072A2 (en) | 2000-11-03 | 2001-11-05 | Very small swing and low voltage cmos static memory |
Country Status (4)
Country | Link |
---|---|
US (5) | US6639866B2 (en) |
EP (1) | EP1374248B1 (en) |
DE (1) | DE60119583T2 (en) |
WO (1) | WO2002043072A2 (en) |
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GB9600384D0 (en) * | 1996-01-09 | 1996-03-13 | Nyfotek As | Dna glycosylases |
US6525955B1 (en) * | 2001-12-18 | 2003-02-25 | Broadcom Corporation | Memory cell with fuse element |
US6639866B2 (en) * | 2000-11-03 | 2003-10-28 | Broadcom Corporation | Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
JP4186768B2 (en) * | 2003-09-16 | 2008-11-26 | 沖電気工業株式会社 | Multiport semiconductor memory |
US6873565B1 (en) * | 2003-10-10 | 2005-03-29 | Hewlett-Packard Development Company, L.P. | Dual-ported read SRAM cell with improved soft error immunity |
FR2871922A1 (en) * | 2004-06-17 | 2005-12-23 | St Microelectronics Sa | LIVING MEMORY CELL WITH REDUCED DIMENSIONS AND COMPLEXITY |
KR100745368B1 (en) * | 2005-11-22 | 2007-08-02 | 삼성전자주식회사 | Semiconductor memory device having advanced data input/output path |
EP2477109B1 (en) | 2006-04-12 | 2016-07-13 | Soft Machines, Inc. | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
EP2523101B1 (en) * | 2006-11-14 | 2014-06-04 | Soft Machines, Inc. | Apparatus and method for processing complex instruction formats in a multi- threaded architecture supporting various context switch modes and virtualization schemes |
US7746713B2 (en) * | 2007-09-12 | 2010-06-29 | Massachusetts Institute Of Technology | High density 45 nm SRAM using small-signal non-strobed regenerative sensing |
US7961499B2 (en) * | 2009-01-22 | 2011-06-14 | Qualcomm Incorporated | Low leakage high performance static random access memory cell using dual-technology transistors |
TWI419173B (en) * | 2009-07-31 | 2013-12-11 | Univ Nat Chiao Tung | Static random access memory device |
TWI453749B (en) * | 2010-02-05 | 2014-09-21 | Univ Nat Chiao Tung | Subthreshold multi-port register file design |
US8493811B2 (en) * | 2010-02-10 | 2013-07-23 | Apple Inc. | Memory having asynchronous read with fast read output |
TWI455148B (en) * | 2010-12-13 | 2014-10-01 | Vanguard Int Semiconduct Corp | Integrated device for accessing multi-port input read/write event |
US20120235708A1 (en) * | 2011-03-16 | 2012-09-20 | Mark Slamowitz | Method and System for High Speed Differential Synchronous Sense Amplifier |
EP2689326B1 (en) | 2011-03-25 | 2022-11-16 | Intel Corporation | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US8593896B2 (en) * | 2011-03-30 | 2013-11-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Differential read write back sense amplifier circuits and methods |
US8522178B2 (en) * | 2011-09-07 | 2013-08-27 | Apple Inc. | Re-modeling a memory array for accurate timing analysis |
KR20130130478A (en) * | 2012-05-22 | 2013-12-02 | 삼성전자주식회사 | Input buffer |
US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
KR102083390B1 (en) | 2013-03-15 | 2020-03-02 | 인텔 코포레이션 | A method for emulating a guest centralized flag architecture by using a native distributed flag architecture |
US9691462B2 (en) | 2014-09-27 | 2017-06-27 | Qualcomm Incorporated | Latch offset cancelation for magnetoresistive random access memory |
US9373388B1 (en) * | 2015-04-29 | 2016-06-21 | Qualcomm Incorporated | Sense amplifier with pulsed control for pull-up transistors |
US11087800B1 (en) * | 2020-04-10 | 2021-08-10 | Sandisk Technologies Llc | Sense amplifier architecture providing small swing voltage sensing |
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US5590087A (en) * | 1993-05-05 | 1996-12-31 | Hewlett-Packard Company | Multi-ported data storage device with improved cell stability |
US5608681A (en) * | 1996-01-22 | 1997-03-04 | Lsi Logic Corporation | Fast memory sense system |
JPH09186535A (en) * | 1995-12-27 | 1997-07-15 | Toshiba Microelectron Corp | Differential input sense amplifier circuit |
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-
2001
- 2001-11-03 US US10/012,858 patent/US6639866B2/en not_active Expired - Lifetime
- 2001-11-05 WO PCT/US2001/046942 patent/WO2002043072A2/en active IP Right Grant
- 2001-11-05 DE DE60119583T patent/DE60119583T2/en not_active Expired - Lifetime
- 2001-11-05 EP EP01989977A patent/EP1374248B1/en not_active Expired - Lifetime
-
2003
- 2003-10-06 US US10/679,547 patent/US6822918B2/en not_active Expired - Lifetime
-
2004
- 2004-11-23 US US10/996,140 patent/US7251175B2/en not_active Expired - Lifetime
-
2007
- 2007-07-12 US US11/777,054 patent/US7639549B2/en not_active Expired - Fee Related
-
2009
- 2009-11-12 US US12/617,570 patent/US7986570B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5590087A (en) * | 1993-05-05 | 1996-12-31 | Hewlett-Packard Company | Multi-ported data storage device with improved cell stability |
JPH09186535A (en) * | 1995-12-27 | 1997-07-15 | Toshiba Microelectron Corp | Differential input sense amplifier circuit |
US5608681A (en) * | 1996-01-22 | 1997-03-04 | Lsi Logic Corporation | Fast memory sense system |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 11 28 November 1997 (1997-11-28) * |
Also Published As
Publication number | Publication date |
---|---|
EP1374248B1 (en) | 2006-05-10 |
US20080089144A1 (en) | 2008-04-17 |
DE60119583D1 (en) | 2006-06-14 |
US7986570B2 (en) | 2011-07-26 |
US6639866B2 (en) | 2003-10-28 |
US20100177581A1 (en) | 2010-07-15 |
DE60119583T2 (en) | 2007-05-10 |
WO2002043072A2 (en) | 2002-05-30 |
US7639549B2 (en) | 2009-12-29 |
US7251175B2 (en) | 2007-07-31 |
US6822918B2 (en) | 2004-11-23 |
US20040066687A1 (en) | 2004-04-08 |
US20020125585A1 (en) | 2002-09-12 |
EP1374248A2 (en) | 2004-01-02 |
US20050091477A1 (en) | 2005-04-28 |
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