WO2002058074A3 - Partial block data programming and reading operations in a non-volatile memory - Google Patents

Partial block data programming and reading operations in a non-volatile memory Download PDF

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Publication number
WO2002058074A3
WO2002058074A3 PCT/US2002/000366 US0200366W WO02058074A3 WO 2002058074 A3 WO2002058074 A3 WO 2002058074A3 US 0200366 W US0200366 W US 0200366W WO 02058074 A3 WO02058074 A3 WO 02058074A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
pages
block
volatile memory
superceded
Prior art date
Application number
PCT/US2002/000366
Other languages
French (fr)
Other versions
WO2002058074A2 (en
WO2002058074A9 (en
Inventor
Kevin M Conley
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25076410&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2002058074(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Sandisk Corp filed Critical Sandisk Corp
Priority to KR1020037009551A priority Critical patent/KR100944996B1/en
Priority to AU2002236723A priority patent/AU2002236723A1/en
Priority to JP2002558275A priority patent/JP4155824B2/en
Priority to EP02703078A priority patent/EP1352394B1/en
Priority to DE60211653T priority patent/DE60211653T2/en
Publication of WO2002058074A2 publication Critical patent/WO2002058074A2/en
Publication of WO2002058074A9 publication Critical patent/WO2002058074A9/en
Publication of WO2002058074A3 publication Critical patent/WO2002058074A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7202—Allocation control and policies
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7209—Validity control, e.g. using flags, time stamps or sequence numbers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/16—Flash programming of all the cells in an array, sector or block simultaneously

Abstract

Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into superceded pages of data, the pages of new data are identified by the same logical address as the pages of data which they superceded and a time stamp is added to note when each page was written. When reading the data, the most recent pages of data are used and the older superceded pages of data are ignored. This technique is also applied to metablocks that include one block from each of several different units of a memory array, by directing all page updates to a single unused block in one of the units.
PCT/US2002/000366 2001-01-19 2002-01-07 Partial block data programming and reading operations in a non-volatile memory WO2002058074A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020037009551A KR100944996B1 (en) 2001-01-19 2002-01-07 Partial block data programming and reading operations in a non-volatile memory
AU2002236723A AU2002236723A1 (en) 2001-01-19 2002-01-07 Partial block data programming and reading operations in a non-volatile memory
JP2002558275A JP4155824B2 (en) 2001-01-19 2002-01-07 Partial block data programming and reading operations in non-volatile memory
EP02703078A EP1352394B1 (en) 2001-01-19 2002-01-07 Partial block data programming and reading operations in a non-volatile memory
DE60211653T DE60211653T2 (en) 2001-01-19 2002-01-07 TEPASS PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/766,436 2001-01-19
US09/766,436 US6763424B2 (en) 2001-01-19 2001-01-19 Partial block data programming and reading operations in a non-volatile memory

Publications (3)

Publication Number Publication Date
WO2002058074A2 WO2002058074A2 (en) 2002-07-25
WO2002058074A9 WO2002058074A9 (en) 2002-10-03
WO2002058074A3 true WO2002058074A3 (en) 2003-07-10

Family

ID=25076410

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/000366 WO2002058074A2 (en) 2001-01-19 2002-01-07 Partial block data programming and reading operations in a non-volatile memory

Country Status (11)

Country Link
US (6) US6763424B2 (en)
EP (4) EP1645964A3 (en)
JP (3) JP4155824B2 (en)
KR (2) KR100944996B1 (en)
CN (3) CN1290021C (en)
AT (1) ATE327556T1 (en)
AU (1) AU2002236723A1 (en)
DE (1) DE60211653T2 (en)
ES (1) ES2262782T3 (en)
TW (1) TWI221217B (en)
WO (1) WO2002058074A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
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US9122591B2 (en) 2004-05-13 2015-09-01 Sandisk Technologies Inc. Pipelined data relocation and improved chip architectures

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US20020099904A1 (en) 2002-07-25
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US6968421B2 (en) 2005-11-22
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CN1290021C (en) 2006-12-13
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US20060031627A1 (en) 2006-02-09
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