WO2002071666A8 - Synchronizing clocks across a communication link - Google Patents

Synchronizing clocks across a communication link

Info

Publication number
WO2002071666A8
WO2002071666A8 PCT/US2002/003552 US0203552W WO02071666A8 WO 2002071666 A8 WO2002071666 A8 WO 2002071666A8 US 0203552 W US0203552 W US 0203552W WO 02071666 A8 WO02071666 A8 WO 02071666A8
Authority
WO
WIPO (PCT)
Prior art keywords
synchronization signal
slave clock
expected
interpolation
slave
Prior art date
Application number
PCT/US2002/003552
Other languages
French (fr)
Other versions
WO2002071666A1 (en
Inventor
Pranesh Sinha
Sharon Akler
Yair Bourlas
Timothy Leo Gallagher
Sheldon L Gilbert
Stephen C Pollmann
Frederick W Price
Blaine C Readler
John Wiss
Eli Arviv
Original Assignee
Ensemble Comm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25150692&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2002071666(A8) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Ensemble Comm Inc filed Critical Ensemble Comm Inc
Publication of WO2002071666A1 publication Critical patent/WO2002071666A1/en
Publication of WO2002071666A8 publication Critical patent/WO2002071666A8/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W48/00—Access restriction; Network selection; Access point selection
    • H04W48/08—Access restriction or access information delivery, e.g. discovery data delivery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W84/00—Network topologies
    • H04W84/18—Self-organising networks, e.g. ad-hoc networks or sensor networks
    • H04W84/20—Master-slave selection or change arrangements

Abstract

Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock (580) may be synchronized to a master clock (510) by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate (560) received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock.
PCT/US2002/003552 2001-02-21 2002-02-06 Synchronizing clocks across a communication link WO2002071666A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/790,443 US6944188B2 (en) 2001-02-21 2001-02-21 Synchronizing clocks across a communication link
US09/790,443 2001-02-21

Publications (2)

Publication Number Publication Date
WO2002071666A1 WO2002071666A1 (en) 2002-09-12
WO2002071666A8 true WO2002071666A8 (en) 2003-12-04

Family

ID=25150692

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/003552 WO2002071666A1 (en) 2001-02-21 2002-02-06 Synchronizing clocks across a communication link

Country Status (2)

Country Link
US (4) US6944188B2 (en)
WO (1) WO2002071666A1 (en)

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Also Published As

Publication number Publication date
US8199779B2 (en) 2012-06-12
US20090279652A1 (en) 2009-11-12
US7907640B2 (en) 2011-03-15
US20020114354A1 (en) 2002-08-22
WO2002071666A1 (en) 2002-09-12
US20070002987A1 (en) 2007-01-04
US6944188B2 (en) 2005-09-13
US7583705B2 (en) 2009-09-01
US20110122981A1 (en) 2011-05-26

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