WO2002073619A3 - System latency levelization for read data - Google Patents

System latency levelization for read data Download PDF

Info

Publication number
WO2002073619A3
WO2002073619A3 PCT/US2002/007226 US0207226W WO02073619A3 WO 2002073619 A3 WO2002073619 A3 WO 2002073619A3 US 0207226 W US0207226 W US 0207226W WO 02073619 A3 WO02073619 A3 WO 02073619A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
system read
differences
read data
system latency
Prior art date
Application number
PCT/US2002/007226
Other languages
French (fr)
Other versions
WO2002073619A2 (en
WO2002073619A9 (en
Inventor
Jeffery W Janzen
Keeth Brent
Kevin J Ryan
Troy A Manning
Brian Johnson
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to EP02725101A priority Critical patent/EP1374245A2/en
Priority to KR1020037011967A priority patent/KR100607740B1/en
Priority to AU2002255686A priority patent/AU2002255686A1/en
Priority to JP2002572579A priority patent/JP2004524641A/en
Publication of WO2002073619A2 publication Critical patent/WO2002073619A2/en
Publication of WO2002073619A3 publication Critical patent/WO2002073619A3/en
Publication of WO2002073619A9 publication Critical patent/WO2002073619A9/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

Abstract

In a high speed memory subsystem differences in each memory device's minimum device read latency and differences in signal propagation time between the memory device and the memory controller can result in widely varying system read latencies. The present invention equalizes the system read latencies of every memory device in a high speed memory system by comparing the differences in system read latencies of each device and then operating each memory device with a device system read latency which causes every device to exhibit the same system read latency.
PCT/US2002/007226 2001-03-13 2002-03-12 System latency levelization for read data WO2002073619A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP02725101A EP1374245A2 (en) 2001-03-13 2002-03-12 System latency levelization for read data
KR1020037011967A KR100607740B1 (en) 2001-03-13 2002-03-12 System latency levelization for read data
AU2002255686A AU2002255686A1 (en) 2001-03-13 2002-03-12 System latency levelization for read data
JP2002572579A JP2004524641A (en) 2001-03-13 2002-03-12 System latency levelization for read data

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/804,221 2001-03-13
US09/804,221 US6658523B2 (en) 2001-03-13 2001-03-13 System latency levelization for read data

Publications (3)

Publication Number Publication Date
WO2002073619A2 WO2002073619A2 (en) 2002-09-19
WO2002073619A3 true WO2002073619A3 (en) 2003-10-23
WO2002073619A9 WO2002073619A9 (en) 2003-12-18

Family

ID=25188462

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/007226 WO2002073619A2 (en) 2001-03-13 2002-03-12 System latency levelization for read data

Country Status (7)

Country Link
US (2) US6658523B2 (en)
EP (1) EP1374245A2 (en)
JP (2) JP2004524641A (en)
KR (1) KR100607740B1 (en)
CN (2) CN101159163A (en)
AU (1) AU2002255686A1 (en)
WO (1) WO2002073619A2 (en)

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Also Published As

Publication number Publication date
KR20040005888A (en) 2004-01-16
CN101159163A (en) 2008-04-09
US6658523B2 (en) 2003-12-02
EP1374245A2 (en) 2004-01-02
WO2002073619A2 (en) 2002-09-19
JP2007272929A (en) 2007-10-18
US20020133666A1 (en) 2002-09-19
CN1507629A (en) 2004-06-23
KR100607740B1 (en) 2006-08-01
AU2002255686A1 (en) 2002-09-24
WO2002073619A9 (en) 2003-12-18
US20040107326A1 (en) 2004-06-03
JP2004524641A (en) 2004-08-12
US6851016B2 (en) 2005-02-01

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