WO2003007153A3 - Facilitating efficient join operations between a head thread and a speculative thread - Google Patents

Facilitating efficient join operations between a head thread and a speculative thread Download PDF

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Publication number
WO2003007153A3
WO2003007153A3 PCT/US2002/022070 US0222070W WO03007153A3 WO 2003007153 A3 WO2003007153 A3 WO 2003007153A3 US 0222070 W US0222070 W US 0222070W WO 03007153 A3 WO03007153 A3 WO 03007153A3
Authority
WO
WIPO (PCT)
Prior art keywords
thread
speculative
program
executing
head
Prior art date
Application number
PCT/US2002/022070
Other languages
French (fr)
Other versions
WO2003007153A2 (en
Inventor
Shailender Chaudhry
Marc Tremblay
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Priority to AU2002326378A priority Critical patent/AU2002326378A1/en
Publication of WO2003007153A2 publication Critical patent/WO2003007153A2/en
Publication of WO2003007153A3 publication Critical patent/WO2003007153A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Abstract

One embodiment of the present invention provides a system that facilitates efficient join operations between a head thread and a speculative thread during speculative program execution, wherein the head thread executes program instructions and the speculative thread executes program instructions in advance of the head thread. The system operates by executing a primary version of a program using the head thread, and by executing a speculative version of the program using the speculative thread. When the head thread reaches a point in the program where the speculative thread began executing, the system performs a join operation between the head thread and the speculative thread. This join operation causes the speculative thread to act as a new head thread by switching from executing the speculative version of the program to executing the primary version of the program. To facilitate this switching operation, the system performs a lookup to determine where the new head thread is to commence executing within the primary version of the program based upon where the speculative thread is currently executing within the speculative version of the program.
PCT/US2002/022070 2001-07-13 2002-07-12 Facilitating efficient join operations between a head thread and a speculative thread WO2003007153A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002326378A AU2002326378A1 (en) 2001-07-13 2002-07-12 Facilitating efficient join operations between a head thread and a speculative thread

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US30547001P 2001-07-13 2001-07-13
US60/305,470 2001-07-13

Publications (2)

Publication Number Publication Date
WO2003007153A2 WO2003007153A2 (en) 2003-01-23
WO2003007153A3 true WO2003007153A3 (en) 2003-12-11

Family

ID=23180933

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/022070 WO2003007153A2 (en) 2001-07-13 2002-07-12 Facilitating efficient join operations between a head thread and a speculative thread

Country Status (3)

Country Link
US (1) US7168076B2 (en)
AU (1) AU2002326378A1 (en)
WO (1) WO2003007153A2 (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003196553A (en) * 2001-12-27 2003-07-11 Seiko Epson Corp Member administration server system, program therefor, and member administration method
US20030126416A1 (en) * 2001-12-31 2003-07-03 Marr Deborah T. Suspending execution of a thread in a multi-threaded processor
US20050060517A1 (en) * 2003-09-12 2005-03-17 Morrow Michael W. Switching processor threads during long latencies
US7447829B2 (en) 2003-10-15 2008-11-04 International Business Machines Corporation Heap and stack layout for multithreaded processes in a processing system
US10296561B2 (en) * 2006-11-16 2019-05-21 James Andrews Apparatus, method and graphical user interface for providing a sound link for combining, publishing and accessing websites and audio files on the internet
US9388568B2 (en) * 2007-04-06 2016-07-12 Pacific Coast Building Products, Inc. Acoustical sound proofing material with improved fracture characteristics and methods for manufacturing same
US9387649B2 (en) * 2007-06-28 2016-07-12 Pacific Coast Building Products, Inc. Methods of manufacturing acoustical sound proofing materials with optimized fracture characteristics
CN101482831B (en) * 2008-01-08 2013-05-15 国际商业机器公司 Method and equipment for concomitant scheduling of working thread and worker thread
US8359459B2 (en) * 2008-05-27 2013-01-22 Oracle America, Inc. Using hardware support to reduce synchronization costs in multithreaded applications
US8195896B2 (en) * 2008-06-10 2012-06-05 International Business Machines Corporation Resource sharing techniques in a parallel processing computing system utilizing locks by replicating or shadowing execution contexts
US9940138B2 (en) * 2009-04-08 2018-04-10 Intel Corporation Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations
US8549523B2 (en) * 2009-11-23 2013-10-01 International Business Machines Corporation Performing runtime analysis and control of folding identified threads by assuming context of another thread and executing in lieu of another thread folding tool
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
DE112013000453B4 (en) * 2012-01-31 2023-05-17 International Business Machines Corporation Major branch instructions with transactional storage
US9280398B2 (en) 2012-01-31 2016-03-08 International Business Machines Corporation Major branch instructions
US9229722B2 (en) 2012-01-31 2016-01-05 International Business Machines Corporation Major branch instructions with transactional memory
US9122873B2 (en) 2012-09-14 2015-09-01 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
US11354486B2 (en) * 2013-05-13 2022-06-07 International Business Machines Corporation Presenting a link label for multiple hyperlinks

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0725334A1 (en) * 1995-02-03 1996-08-07 International Business Machines Corporation Executing speculative parallel instruction threads
WO2000070451A1 (en) * 1999-05-17 2000-11-23 Sun Microsystems, Inc. Parallel join operation to support space and time dimensional program execution

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049673A (en) * 1996-03-08 2000-04-11 Organicnet, Inc. Organicware applications for computer systems
US6353881B1 (en) * 1999-05-17 2002-03-05 Sun Microsystems, Inc. Supporting space-time dimensional program execution by selectively versioning memory updates
US7343602B2 (en) * 2000-04-19 2008-03-11 Hewlett-Packard Development Company, L.P. Software controlled pre-execution in a multithreaded processor
US20040154010A1 (en) * 2003-01-31 2004-08-05 Pedro Marcuello Control-quasi-independent-points guided speculative multithreading
US7181601B2 (en) * 2003-12-08 2007-02-20 Intel Corporation Method and apparatus for prediction for fork and join instructions in speculative execution

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0725334A1 (en) * 1995-02-03 1996-08-07 International Business Machines Corporation Executing speculative parallel instruction threads
WO2000070451A1 (en) * 1999-05-17 2000-11-23 Sun Microsystems, Inc. Parallel join operation to support space and time dimensional program execution

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CHEN M K ET AL: "Exploiting method-level parallelism in single-threaded Java programs", PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 1998. PROCEEDINGS. 1998 INTERNATIONAL CONFERENCE ON PARIS, FRANCE 12-18 OCT. 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 12 October 1998 (1998-10-12), pages 176 - 184, XP010312240, ISBN: 0-8186-8591-3 *
DUBEY P K ET AL: "SINGLE-PROGRAM SPECULATIVE MULTITHREADING (SPSM) ARCHITECTURE: COMPILER-ASSISTED FINE-GRAINED MULTITHREADING", PROCEEDINGS. INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, XX, XX, 27 June 1995 (1995-06-27), pages 109 - 121, XP008003494 *

Also Published As

Publication number Publication date
AU2002326378A1 (en) 2003-01-29
WO2003007153A2 (en) 2003-01-23
US20030018826A1 (en) 2003-01-23
US7168076B2 (en) 2007-01-23

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