WO2003063018A3 - Functional pipelines - Google Patents

Functional pipelines Download PDF

Info

Publication number
WO2003063018A3
WO2003063018A3 PCT/US2003/001578 US0301578W WO03063018A3 WO 2003063018 A3 WO2003063018 A3 WO 2003063018A3 US 0301578 W US0301578 W US 0301578W WO 03063018 A3 WO03063018 A3 WO 03063018A3
Authority
WO
WIPO (PCT)
Prior art keywords
functional
programming engines
functional pipeline
contexts
processing
Prior art date
Application number
PCT/US2003/001578
Other languages
French (fr)
Other versions
WO2003063018A2 (en
Inventor
Matthew Adiletta
Debra Bernstein
Myles Wilde
Gilbert Wolrich
Mark Rosenbluth
Hugh Wilkinson
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to AU2003225523A priority Critical patent/AU2003225523A1/en
Priority to EP20030731990 priority patent/EP1470496A2/en
Priority to CA002473245A priority patent/CA2473245A1/en
Priority to CN038023156A priority patent/CN1618061B/en
Priority to KR1020037017304A priority patent/KR100611860B1/en
Publication of WO2003063018A2 publication Critical patent/WO2003063018A2/en
Publication of WO2003063018A3 publication Critical patent/WO2003063018A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors

Abstract

A system and method for employing multiple hardware contexts and programming engines in a functional pipeline partitioned to facilitate high performance data processing. The system and method includes a parallel processor that assigns system functions for processing data including programming engines that support multiple contexts arranged to provide a functional pipeline by a functional pipeline control unit that passes functional data among the programming engines.
PCT/US2003/001578 2002-01-17 2003-01-16 Functional pipelines WO2003063018A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AU2003225523A AU2003225523A1 (en) 2002-01-17 2003-01-16 Functional pipelines
EP20030731990 EP1470496A2 (en) 2002-01-17 2003-01-16 Functional pipelines
CA002473245A CA2473245A1 (en) 2002-01-17 2003-01-16 Functional pipelines
CN038023156A CN1618061B (en) 2002-01-17 2003-01-16 Functional pipelines
KR1020037017304A KR100611860B1 (en) 2002-01-17 2003-01-16 Functional pipelines

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/053,172 2002-01-17
US10/053,172 US6934951B2 (en) 2002-01-17 2002-01-17 Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section

Publications (2)

Publication Number Publication Date
WO2003063018A2 WO2003063018A2 (en) 2003-07-31
WO2003063018A3 true WO2003063018A3 (en) 2004-04-08

Family

ID=21982381

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/001578 WO2003063018A2 (en) 2002-01-17 2003-01-16 Functional pipelines

Country Status (8)

Country Link
US (2) US6934951B2 (en)
EP (1) EP1470496A2 (en)
KR (1) KR100611860B1 (en)
CN (1) CN1618061B (en)
AU (1) AU2003225523A1 (en)
CA (1) CA2473245A1 (en)
TW (1) TWI265430B (en)
WO (1) WO2003063018A2 (en)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6983350B1 (en) 1999-08-31 2006-01-03 Intel Corporation SDRAM controller for parallel processor architecture
WO2001016702A1 (en) 1999-09-01 2001-03-08 Intel Corporation Register set used in multithreaded parallel processor architecture
US6532509B1 (en) 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6661794B1 (en) 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US7681018B2 (en) * 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
US20020053017A1 (en) * 2000-09-01 2002-05-02 Adiletta Matthew J. Register instructions for a multithreaded processor
US6934951B2 (en) * 2002-01-17 2005-08-23 Intel Corporation Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section
US7437724B2 (en) * 2002-04-03 2008-10-14 Intel Corporation Registers for data transfers
US7240164B2 (en) * 2003-08-14 2007-07-03 Intel Corporation Folding for a multi-threaded network processor
US7441245B2 (en) * 2003-08-14 2008-10-21 Intel Corporation Phasing for a multi-threaded network processor
US7376952B2 (en) * 2003-09-15 2008-05-20 Intel Corporation Optimizing critical section microblocks by controlling thread execution
US7418540B2 (en) * 2004-04-28 2008-08-26 Intel Corporation Memory controller with command queue look-ahead
US7733857B2 (en) * 2004-12-17 2010-06-08 Samsung Electronics Co., Ltd. Apparatus and method for sharing variables and resources in a multiprocessor routing node
US20060236011A1 (en) * 2005-04-15 2006-10-19 Charles Narad Ring management
KR20080013993A (en) * 2005-05-04 2008-02-13 에이알엠 리미티드 Use of a data engine within a data processing apparatus
US7920584B2 (en) * 2005-05-04 2011-04-05 Arm Limited Data processing system
US7630388B2 (en) * 2005-05-04 2009-12-08 Arm Limited Software defined FIFO memory for storing a set of data from a stream of source data
CN100407701C (en) * 2005-06-25 2008-07-30 华为技术有限公司 Network processor
US7853951B2 (en) * 2005-07-25 2010-12-14 Intel Corporation Lock sequencing to reorder and grant lock requests from multiple program threads
US20070044103A1 (en) * 2005-07-25 2007-02-22 Mark Rosenbluth Inter-thread communication of lock protected data
US20070094664A1 (en) * 2005-10-21 2007-04-26 Kimming So Programmable priority for concurrent multi-threaded processors
US20070124728A1 (en) * 2005-11-28 2007-05-31 Mark Rosenbluth Passing work between threads
US20070140282A1 (en) * 2005-12-21 2007-06-21 Sridhar Lakshmanamurthy Managing on-chip queues in switched fabric networks
US20070245074A1 (en) * 2006-03-30 2007-10-18 Rosenbluth Mark B Ring with on-chip buffer for efficient message passing
US8179896B2 (en) 2006-11-09 2012-05-15 Justin Mark Sobaje Network processors and pipeline optimization methods
US8059650B2 (en) * 2007-10-31 2011-11-15 Aruba Networks, Inc. Hardware based parallel processing cores with multiple threads and multiple pipeline stages
US7926013B2 (en) * 2007-12-31 2011-04-12 Intel Corporation Validating continuous signal phase matching in high-speed nets routed as differential pairs
MY155586A (en) * 2008-01-02 2015-11-03 Mimos Berhad System for increasing throughput for memory device
US8055719B2 (en) * 2008-07-16 2011-11-08 International Business Machines Corporation Performance and reduce network traffic for remote hardware data scan operations
WO2016000170A1 (en) * 2014-06-30 2016-01-07 华为技术有限公司 Data processing method executed by network apparatus, and associated device
US9804843B1 (en) 2014-09-05 2017-10-31 Altera Corporation Method and apparatus for linear function processing in pipelined storage circuits
EP3298486B1 (en) * 2015-05-21 2022-08-24 Goldman, Sachs & Co. LLC General-purpose parallel computing architecture
US11449452B2 (en) 2015-05-21 2022-09-20 Goldman Sachs & Co. LLC General-purpose parallel computing architecture
US20230071278A1 (en) * 2021-09-03 2023-03-09 International Business Machines Corporation Using a machine learning module to determine a group of execution paths of program code and a computational resource allocation to use to execute the group of execution paths

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6073159A (en) * 1996-12-31 2000-06-06 Compaq Computer Corporation Thread properties attribute vector based thread selection in multithreading processor
EP1148414A2 (en) * 2000-03-30 2001-10-24 Agere Systems Guardian Corporation Method and apparatus for allocating functional units in a multithreated VLIW processor
WO2001095101A2 (en) * 2000-06-02 2001-12-13 Sun Microsystems, Inc. Synchronizing partially pipelined instructions in vliw processors

Family Cites Families (164)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US563641A (en) * 1896-07-07 bemis
US643438A (en) * 1899-05-10 1900-02-13 Joseph Edward Wormald Heating stove or furnace.
US644337A (en) * 1900-01-11 1900-02-27 Seng Co Lid-operating mechanism for box-couches.
US726757A (en) * 1903-01-12 1903-04-28 Alexander Laughlin Gas-producer.
US3373408A (en) 1965-04-16 1968-03-12 Rca Corp Computer capable of switching between programs without storage and retrieval of the contents of operation registers
US3478322A (en) 1967-05-23 1969-11-11 Ibm Data processor employing electronically changeable control storage
BE795789A (en) 1972-03-08 1973-06-18 Burroughs Corp MICROPROGRAM CONTAINING A MICRO-RECOVERY INSTRUCTION
IT986411B (en) 1973-06-05 1975-01-30 Olivetti E C Spa SYSTEM TO TRANSFER THE CONTROL OF PROCESSING FROM A FIRST PRIORITY LEVEL TO A SECOND PRIORITY LEVEL
US4130890A (en) 1977-06-08 1978-12-19 Itt Industries, Inc. Integrated DDC memory with bitwise erase
JPS56164464A (en) 1980-05-21 1981-12-17 Tatsuo Nogi Parallel processing computer
US4400770A (en) 1980-11-10 1983-08-23 International Business Machines Corporation Cache synonym detection and handling means
CA1179069A (en) 1981-04-10 1984-12-04 Yasushi Fukunaga Data transmission apparatus for a multiprocessor system
US4745544A (en) 1985-12-12 1988-05-17 Texas Instruments Incorporated Master/slave sequencing processor with forced I/O
US5297260A (en) 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
US5142683A (en) 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
US4866664A (en) 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method
DE68913629T2 (en) 1988-03-14 1994-06-16 Unisys Corp BLOCK LOCKING PROCESSOR FOR MULTIPLE PROCESSING DATA SYSTEM.
US5155854A (en) 1989-02-03 1992-10-13 Digital Equipment Corporation System for arbitrating communication requests using multi-pass control unit based on availability of system resources
US5155831A (en) 1989-04-24 1992-10-13 International Business Machines Corporation Data processing system with fast queue store interposed between store-through caches and a main memory
US5168555A (en) 1989-09-06 1992-12-01 Unisys Corporation Initial program load control
US5263169A (en) 1989-11-03 1993-11-16 Zoran Corporation Bus arbitration and resource management for concurrent vector signal processor architecture
DE3942977A1 (en) 1989-12-23 1991-06-27 Standard Elektrik Lorenz Ag METHOD FOR RESTORING THE CORRECT SEQUENCE OF CELLS, ESPECIALLY IN AN ATM SWITCHING CENTER, AND OUTPUT UNIT THEREFOR
US5179702A (en) * 1989-12-29 1993-01-12 Supercomputer Systems Limited Partnership System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
EP0446721B1 (en) 1990-03-16 2000-12-20 Texas Instruments Incorporated Distributed processing memory
US5390329A (en) 1990-06-11 1995-02-14 Cray Research, Inc. Responding to service requests using minimal system-side context in a multiprocessor environment
US5404482A (en) 1990-06-29 1995-04-04 Digital Equipment Corporation Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills
US5347648A (en) 1990-06-29 1994-09-13 Digital Equipment Corporation Ensuring write ordering under writeback cache error conditions
US5432918A (en) 1990-06-29 1995-07-11 Digital Equipment Corporation Method and apparatus for ordering read and write operations using conflict bits in a write queue
AU630299B2 (en) 1990-07-10 1992-10-22 Fujitsu Limited A data gathering/scattering system in a parallel computer
US5367678A (en) 1990-12-06 1994-11-22 The Regents Of The University Of California Multiprocessor system having statically determining resource allocation schedule at compile time and the using of static schedule with processor signals to control the execution time dynamically
KR960001273B1 (en) * 1991-04-30 1996-01-25 가부시키가이샤 도시바 Single chip microcomputer
US5255239A (en) 1991-08-13 1993-10-19 Cypress Semiconductor Corporation Bidirectional first-in-first-out memory device with transparent and user-testable capabilities
US5623489A (en) 1991-09-26 1997-04-22 Ipc Information Systems, Inc. Channel allocation system for distributed digital switching network
US5392412A (en) 1991-10-03 1995-02-21 Standard Microsystems Corporation Data communication controller for use with a single-port data packet buffer
GB2260429B (en) 1991-10-11 1995-05-24 Intel Corp Versatile cache memory
US5392391A (en) 1991-10-18 1995-02-21 Lsi Logic Corporation High performance graphics applications controller
DE69231957T2 (en) 1991-10-21 2002-04-04 Toshiba Kawasaki Kk High speed processor capable of handling multiple interruptions
US5452437A (en) 1991-11-18 1995-09-19 Motorola, Inc. Methods of debugging multiprocessor system
US5442797A (en) 1991-12-04 1995-08-15 Casavant; Thomas L. Latency tolerant risc-based multiple processor with event driven locality managers resulting from variable tagging
JP2823767B2 (en) 1992-02-03 1998-11-11 松下電器産業株式会社 Register file
US5459842A (en) 1992-06-26 1995-10-17 International Business Machines Corporation System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory
DE4223600C2 (en) 1992-07-17 1994-10-13 Ibm Multiprocessor computer system and method for transmitting control information and data information between at least two processor units of a computer system
US5404484A (en) * 1992-09-16 1995-04-04 Hewlett-Packard Company Cache system for reducing memory latency times
KR100313261B1 (en) 1992-12-23 2002-02-28 앙드래베이너,조엘브르리아드 Low Power Multi-task Controller (Name Correction)
JPH08506198A (en) * 1993-01-22 1996-07-02 ユニバーシティ コーポレイション フォーアトモスフェリック リサーチ Multi-pipeline multi-processor system
US5404464A (en) 1993-02-11 1995-04-04 Ast Research, Inc. Bus control system and method that selectively generate an early address strobe
US5448702A (en) 1993-03-02 1995-09-05 International Business Machines Corporation Adapters with descriptor queue management capability
DE69429204T2 (en) * 1993-03-26 2002-07-25 Cabletron Systems Inc Sequence control method and device for a communication network
US5522069A (en) 1993-04-30 1996-05-28 Zenith Data Systems Corporation Symmetric multiprocessing system with unified environment and distributed system functions
CA2122182A1 (en) 1993-05-20 1994-11-21 Rene Leblanc Method for rapid prototyping of programming problems
CA2107299C (en) 1993-09-29 1997-02-25 Mehrad Yasrebi High performance machine for switched communications in a heterogenous data processing network gateway
US5446736A (en) 1993-10-07 1995-08-29 Ast Research, Inc. Method and apparatus for connecting a node to a wireless network using a standard protocol
US5450351A (en) 1993-11-19 1995-09-12 International Business Machines Corporation Content addressable memory implementation with random access memory
US5490204A (en) 1994-03-01 1996-02-06 Safco Corporation Automated quality assessment system for cellular networks
US5835755A (en) 1994-04-04 1998-11-10 At&T Global Information Solutions Company Multi-processor computer system for operating parallel client/server database processes
JP3547482B2 (en) 1994-04-15 2004-07-28 株式会社日立製作所 Information processing equipment
US5542088A (en) 1994-04-29 1996-07-30 Intergraph Corporation Method and apparatus for enabling control of task execution
US5721870A (en) 1994-05-25 1998-02-24 Nec Corporation Lock control for a shared main storage data processing system
US5544236A (en) 1994-06-10 1996-08-06 At&T Corp. Access to unsubscribed features
US5574922A (en) 1994-06-17 1996-11-12 Apple Computer, Inc. Processor with sequences of processor instructions for locked memory updates
US5781774A (en) 1994-06-29 1998-07-14 Intel Corporation Processor having operating modes for an upgradeable multiprocessor computer system
JP3810449B2 (en) 1994-07-20 2006-08-16 富士通株式会社 Queue device
JP3169779B2 (en) 1994-12-19 2001-05-28 日本電気株式会社 Multi-thread processor
US5550816A (en) 1994-12-29 1996-08-27 Storage Technology Corporation Method and apparatus for virtual switching
DE19503160A1 (en) 1995-02-01 1996-08-08 Bayer Ag Use of phenylcyclohexylcarboxylic acid amides
US5784712A (en) 1995-03-01 1998-07-21 Unisys Corporation Method and apparatus for locally generating addressing information for a memory access
US5649157A (en) 1995-03-30 1997-07-15 Hewlett-Packard Co. Memory controller with priority queues
US5886992A (en) 1995-04-14 1999-03-23 Valtion Teknillinen Tutkimuskeskus Frame synchronized ring system and method
US5758184A (en) * 1995-04-24 1998-05-26 Microsoft Corporation System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads
US5592622A (en) 1995-05-10 1997-01-07 3Com Corporation Network intermediate system with message passing architecture
JPH08320797A (en) 1995-05-24 1996-12-03 Fuji Xerox Co Ltd Program control system
US5828746A (en) 1995-06-07 1998-10-27 Lucent Technologies Inc. Telecommunications network
US5828863A (en) 1995-06-09 1998-10-27 Canon Information Systems, Inc. Interface device connected between a LAN and a printer for outputting formatted debug information about the printer to the printer
US5613071A (en) 1995-07-14 1997-03-18 Intel Corporation Method and apparatus for providing remote memory access in a distributed memory multiprocessor system
US5680641A (en) 1995-08-16 1997-10-21 Sharp Microelectronics Technology, Inc. Multiple register bank system for concurrent I/O operation in a CPU datapath
US5940612A (en) 1995-09-27 1999-08-17 International Business Machines Corporation System and method for queuing of tasks in a multiprocessing system
US5689566A (en) 1995-10-24 1997-11-18 Nguyen; Minhtam C. Network with secure communications sessions
US5809530A (en) 1995-11-13 1998-09-15 Motorola, Inc. Method and apparatus for processing multiple cache misses using reload folding and store merging
KR0150072B1 (en) 1995-11-30 1998-10-15 양승택 Device for controlling memory data path in parallel processing computer system
US5796413A (en) 1995-12-06 1998-08-18 Compaq Computer Corporation Graphics controller utilizing video memory to provide macro command capability and enhanched command buffering
US5940866A (en) 1995-12-13 1999-08-17 International Business Machines Corporation Information handling system having a local address queue for local storage of command blocks transferred from a host processing side
US5699537A (en) 1995-12-22 1997-12-16 Intel Corporation Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions
AU714679B2 (en) 1995-12-29 2000-01-06 Tixi.Com Gmbh Telecommunication Systems Process and microcomputer system for automatic, secure and direct data transfer
US6201807B1 (en) * 1996-02-27 2001-03-13 Lucent Technologies Real-time hardware method and apparatus for reducing queue processing
US5761507A (en) 1996-03-05 1998-06-02 International Business Machines Corporation Client/server architecture supporting concurrent servers within a server with a transaction manager providing server/connection decoupling
US5809235A (en) 1996-03-08 1998-09-15 International Business Machines Corporation Object oriented network event management framework
US5784649A (en) 1996-03-13 1998-07-21 Diamond Multimedia Systems, Inc. Multi-threaded FIFO pool buffer and bus transfer control system
US5797043A (en) 1996-03-13 1998-08-18 Diamond Multimedia Systems, Inc. System for managing the transfer of data between FIFOs within pool memory and peripherals being programmable with identifications of the FIFOs
US6199133B1 (en) * 1996-03-29 2001-03-06 Compaq Computer Corporation Management communication bus for networking devices
KR100219597B1 (en) 1996-03-30 1999-09-01 윤종용 Queuing control method in cd-rom drive
US5956518A (en) * 1996-04-11 1999-09-21 Massachusetts Institute Of Technology Intermediate-grain reconfigurable processing device
US5946487A (en) 1996-06-10 1999-08-31 Lsi Logic Corporation Object-oriented multi-media architecture
KR980004067A (en) 1996-06-25 1998-03-30 김광호 Data Transceiver and Method in Multiprocessor System
JP3541335B2 (en) 1996-06-28 2004-07-07 富士通株式会社 Information processing apparatus and distributed processing control method
US5937187A (en) 1996-07-01 1999-08-10 Sun Microsystems, Inc. Method and apparatus for execution and preemption control of computer process entities
US6023742A (en) 1996-07-18 2000-02-08 University Of Washington Reconfigurable computing architecture for providing pipelined data paths
US5745913A (en) 1996-08-05 1998-04-28 Exponential Technology, Inc. Multi-processor DRAM controller that prioritizes row-miss requests to stale banks
US6058465A (en) 1996-08-19 2000-05-02 Nguyen; Le Trong Single-instruction-multiple-data processing in a multimedia signal processor
JP2970553B2 (en) 1996-08-30 1999-11-02 日本電気株式会社 Multi-thread execution method
US5928736A (en) * 1996-09-09 1999-07-27 Raytheon Company Composite structure having integrated aperture and method for its preparation
US5812868A (en) 1996-09-16 1998-09-22 Motorola Inc. Method and apparatus for selecting a register file in a data processing system
US6072781A (en) * 1996-10-22 2000-06-06 International Business Machines Corporation Multi-tasking adapter for parallel network applications
US5860158A (en) 1996-11-15 1999-01-12 Samsung Electronics Company, Ltd. Cache control unit with a cache request transaction-oriented protocol
US5905876A (en) 1996-12-16 1999-05-18 Intel Corporation Queue ordering for memory and I/O transactions in a multiple concurrent transaction computer system
US6212542B1 (en) * 1996-12-16 2001-04-03 International Business Machines Corporation Method and system for executing a program within a multiscalar processor by processing linked thread descriptors
US5854922A (en) 1997-01-16 1998-12-29 Ford Motor Company Micro-sequencer apparatus and method of combination state machine and instruction memory
US5961628A (en) 1997-01-28 1999-10-05 Samsung Electronics Co., Ltd. Load and store unit for a vector processor
US6256115B1 (en) * 1997-02-21 2001-07-03 Worldquest Network, Inc. Facsimile network
US5742587A (en) 1997-02-28 1998-04-21 Lanart Corporation Load balancing port switching hub
US5905889A (en) 1997-03-20 1999-05-18 International Business Machines Corporation Resource management system using next available integer from an integer pool and returning the integer thereto as the next available integer upon completion of use
US5983274A (en) 1997-05-08 1999-11-09 Microsoft Corporation Creation and use of control information associated with packetized network data by protocol drivers and device drivers
US6006321A (en) * 1997-06-13 1999-12-21 Malleable Technologies, Inc. Programmable logic datapath that may be used in a field programmable device
US6182177B1 (en) * 1997-06-13 2001-01-30 Intel Corporation Method and apparatus for maintaining one or more queues of elements such as commands using one or more token queues
US6092158A (en) * 1997-06-13 2000-07-18 Intel Corporation Method and apparatus for arbitrating between command streams
US6067585A (en) * 1997-06-23 2000-05-23 Compaq Computer Corporation Adaptive interface controller that can operate with segments of different protocol and transmission rates in a single integrated device
KR100216371B1 (en) * 1997-06-30 1999-08-16 윤종용 Large scale atm switch with fault tolerant scheme and self routing method in 2nxn multiplexing switches
US5887134A (en) 1997-06-30 1999-03-23 Sun Microsystems System and method for preserving message order while employing both programmed I/O and DMA operations
US5938736A (en) 1997-06-30 1999-08-17 Sun Microsystems, Inc. Search engine architecture for a high performance multi-layer switch element
US6393483B1 (en) * 1997-06-30 2002-05-21 Adaptec, Inc. Method and apparatus for network interface card load balancing and port aggregation
US6247025B1 (en) * 1997-07-17 2001-06-12 International Business Machines Corporation Locking and unlocking mechanism for controlling concurrent access to objects
US6170051B1 (en) * 1997-08-01 2001-01-02 Micron Technology, Inc. Apparatus and method for program level parallelism in a VLIW processor
US6014729A (en) 1997-09-29 2000-01-11 Firstpass, Inc. Shared memory arbitration apparatus and method
US6085294A (en) * 1997-10-24 2000-07-04 Compaq Computer Corporation Distributed data dependency stall mechanism
US5915123A (en) 1997-10-31 1999-06-22 Silicon Spice Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements
US6360262B1 (en) * 1997-11-24 2002-03-19 International Business Machines Corporation Mapping web server objects to TCP/IP ports
US6070231A (en) * 1997-12-02 2000-05-30 Intel Corporation Method and apparatus for processing memory requests that require coherency transactions
US5948081A (en) 1997-12-22 1999-09-07 Compaq Computer Corporation System for flushing queued memory write request corresponding to a queued read request and all prior write requests with counter indicating requests to be flushed
JPH11203860A (en) * 1998-01-07 1999-07-30 Nec Corp Semiconductor memory device
US6415338B1 (en) * 1998-02-11 2002-07-02 Globespan, Inc. System for writing a data value at a starting address to a number of consecutive locations equal to a segment length identifier
US5970013A (en) 1998-02-26 1999-10-19 Lucent Technologies Inc. Adaptive addressable circuit redundancy method and apparatus with broadcast write
US6223238B1 (en) * 1998-03-31 2001-04-24 Micron Electronics, Inc. Method of peer-to-peer mastering over a computer bus
US6079008A (en) * 1998-04-03 2000-06-20 Patton Electronics Co. Multiple thread multiple data predictive coded parallel processing system and method
KR100280460B1 (en) * 1998-04-08 2001-02-01 김영환 Data processing device and its multiple thread processing method
US6092127A (en) * 1998-05-15 2000-07-18 Hewlett-Packard Company Dynamic allocation and reallocation of buffers in links of chained DMA operations by receiving notification of buffer full and maintaining a queue of buffers available
US6067300A (en) * 1998-06-11 2000-05-23 Cabletron Systems, Inc. Method and apparatus for optimizing the transfer of data packets between local area networks
US6373848B1 (en) * 1998-07-28 2002-04-16 International Business Machines Corporation Architecture for a multi-port adapter with a single media access control (MAC)
US6073215A (en) * 1998-08-03 2000-06-06 Motorola, Inc. Data processing system having a data prefetch mechanism and method therefor
US6347344B1 (en) * 1998-10-14 2002-02-12 Hitachi, Ltd. Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor
US6212611B1 (en) * 1998-11-03 2001-04-03 Intel Corporation Method and apparatus for providing a pipelined memory controller
US6718457B2 (en) * 1998-12-03 2004-04-06 Sun Microsystems, Inc. Multiple-thread processor for threaded software applications
US6389449B1 (en) * 1998-12-16 2002-05-14 Clearwater Networks, Inc. Interstream control and communications for multi-streaming digital processors
US6356692B1 (en) * 1999-02-04 2002-03-12 Hitachi, Ltd. Optical module, transmitter, receiver, optical switch, optical communication unit, add-and-drop multiplexing unit, and method for manufacturing the optical module
US6327650B1 (en) * 1999-02-12 2001-12-04 Vsli Technology, Inc. Pipelined multiprocessing with upstream processor concurrently writing to local register and to register of downstream processor
US6256713B1 (en) * 1999-04-29 2001-07-03 International Business Machines Corporation Bus optimization with read/write coherence including ordering responsive to collisions
US6745317B1 (en) * 1999-07-30 2004-06-01 Broadcom Corporation Three level direct communication connections between neighboring multiple context processing elements
US6606704B1 (en) * 1999-08-31 2003-08-12 Intel Corporation Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode
US6427196B1 (en) * 1999-08-31 2002-07-30 Intel Corporation SRAM controller for parallel processor architecture including address and command queue and arbiter
US6668317B1 (en) * 1999-08-31 2003-12-23 Intel Corporation Microengine for parallel processor architecture
US6532509B1 (en) * 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) * 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6560667B1 (en) * 1999-12-28 2003-05-06 Intel Corporation Handling contiguous memory references in a multi-queue system
US6324624B1 (en) * 1999-12-28 2001-11-27 Intel Corporation Read lock miss control and queue management
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6307789B1 (en) * 1999-12-28 2001-10-23 Intel Corporation Scratchpad memory
US6631430B1 (en) * 1999-12-28 2003-10-07 Intel Corporation Optimizations to receive packet status from fifo bus
US6661794B1 (en) * 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US6584522B1 (en) * 1999-12-30 2003-06-24 Intel Corporation Communication between processors
US6631462B1 (en) * 2000-01-05 2003-10-07 Intel Corporation Memory shared between processing threads
US6665755B2 (en) * 2000-12-22 2003-12-16 Nortel Networks Limited External memory engine selectable pipeline architecture
US6868476B2 (en) * 2001-08-27 2005-03-15 Intel Corporation Software controlled content addressable memory in a general purpose execution datapath
EP1436724A4 (en) * 2001-09-28 2007-10-03 Consentry Networks Inc Multi-threaded packet processing engine for stateful packet pro cessing
US7072970B2 (en) * 2001-10-05 2006-07-04 International Business Machines Corporation Programmable network protocol handler architecture
US6934951B2 (en) * 2002-01-17 2005-08-23 Intel Corporation Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section
US7181594B2 (en) * 2002-01-25 2007-02-20 Intel Corporation Context pipelines

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6073159A (en) * 1996-12-31 2000-06-06 Compaq Computer Corporation Thread properties attribute vector based thread selection in multithreading processor
EP1148414A2 (en) * 2000-03-30 2001-10-24 Agere Systems Guardian Corporation Method and apparatus for allocating functional units in a multithreated VLIW processor
WO2001095101A2 (en) * 2000-06-02 2001-12-13 Sun Microsystems, Inc. Synchronizing partially pipelined instructions in vliw processors

Also Published As

Publication number Publication date
CN1618061A (en) 2005-05-18
AU2003225523A1 (en) 2003-09-02
US7302549B2 (en) 2007-11-27
CA2473245A1 (en) 2003-07-31
US20030135351A1 (en) 2003-07-17
US20050216710A1 (en) 2005-09-29
EP1470496A2 (en) 2004-10-27
KR100611860B1 (en) 2006-08-11
WO2003063018A2 (en) 2003-07-31
TWI265430B (en) 2006-11-01
TW200402631A (en) 2004-02-16
KR20040017253A (en) 2004-02-26
US6934951B2 (en) 2005-08-23
CN1618061B (en) 2010-06-16

Similar Documents

Publication Publication Date Title
WO2003063018A3 (en) Functional pipelines
WO2007082043A3 (en) Method and apparatus for scheduling the processing of multimedia data in parallel processing systems
AU2003227411A1 (en) Processor system, task control method on computer system, computer program
WO2004015568A3 (en) Data processing method and device
EP1549055A4 (en) Data processing device, data processing method, computer program, and data processing system
EP1505765A4 (en) Data processing system, data processing device, data processing method, and computer program
AU2003223374A1 (en) Registers for data transfers within a multithreaded processor
AU2003284405A1 (en) Information processing device, server client system, method, and computer program
SG97177A1 (en) Method and system for supporting multiple operating systems on the same disk running on different computers at the same time
AU2003289109A1 (en) Information processing device, information processing method, and computer program
AU2003289110A1 (en) Information processing device, information processing method, and computer program
WO2005107241A3 (en) System and methods for using graphics hardware for real time two and three dimensional, single definition, and high definition video effects
AU2003239711A1 (en) System and method for indexing and summarizing music videos
WO2005119429A3 (en) Multiple branch predictions
AU2003225300A1 (en) Data processing system having multiple register contexts and method therefor
TW200634622A (en) Register file regions for a processing system
TW200639738A (en) Texture cache control using an adaptive missing data table in a multiple cache computer graphics environment
TW200708943A (en) Intelligent auto-archiving
TW200625101A (en) Backup/restore system and method thereof
NO20091187L (en) Electromagnetic data processing system
TW200604942A (en) Method and apparatus for compressing and decompressing instructions in a computer system
AU2003211705A1 (en) Data transmission system, data transmission apparatus, data transmission method, and computer program
TW200703145A (en) Texture cache control using a data dependent slot selection scheme
AU2003289111A1 (en) Information processing device, information processing method, and computer program
CA2549540A1 (en) A task management control apparatus and method

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2003731990

Country of ref document: EP

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 1020037017304

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 2473245

Country of ref document: CA

WWE Wipo information: entry into national phase

Ref document number: 20038023156

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 2003731990

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Ref document number: JP

WWR Wipo information: refused in national office

Ref document number: 2003731990

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 2003731990

Country of ref document: EP