WO2003063344A1 - Operational amplifier having improved input offset performance - Google Patents
Operational amplifier having improved input offset performance Download PDFInfo
- Publication number
- WO2003063344A1 WO2003063344A1 PCT/US2003/001040 US0301040W WO03063344A1 WO 2003063344 A1 WO2003063344 A1 WO 2003063344A1 US 0301040 W US0301040 W US 0301040W WO 03063344 A1 WO03063344 A1 WO 03063344A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- transistor
- current
- coupled
- input
- collector
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45484—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit
- H03F3/45596—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit by offset reduction
Definitions
- This invention relates generally to operational amplifiers, and more particularly to a low-power Class A bipolar operational amplifiers utilizing unbalanced device sizes to compensate for input-stage offset voltages and suitable for use in low-power medical devices such as hearing aids and the like.
- a Class A operational amplifier includes a balanced input circuit comprised of first and second differential input transistors that receive inverting and non-inverting inputs at their respective base electrodes.
- the input-stage provides an output signal at the collector of the second input transistor.
- first and second load transistors Associated with the first and second input transistors are first and second load transistors, the base electrodes of which are coupled to the collector of the first input transistor.
- the emitter electrodes of the input transistors are coupled to a source of supply voltage (e.g. ground) via a first current source (I b i).
- the output of the input-stage is applied to an output stage that in turn has an output terminal for coupling to a load.
- the output stage must be capable of sinking relatively large currents associated with the load and therefore generally includes a relatively large current source (I t , 2 ).
- an operational amplifier must be capable of operating at low-power with low supply voltages (e.g. 1.5 volts).
- low supply voltages e.g. 1.5 volts
- I i be relatively small, in particular less than I 2, which in turn must be large enough to drive the load.
- this difference creates non-random base current imbalances which in turn cause the currents in the collectors of the first and second input transistors to be perturbed to different degrees creating an undesirable input offset voltage.
- an emitter follower may be used as a buffer between the input and output stages.
- a higher current may be utilized in the front-end differential pair, and yet another known approach involves the use of base current cancellation techniques.
- these solutions are not completely compatible with low-power designs.
- a low-power operational amplifier comprising a differential input-stage and an output stage.
- the differential input-stage includes first and second differentially coupled input transistors each having base, emitter, and collector terminals.
- a first current mirror circuit is coupled to the first and second input transistors and produces a first current which perturbs the current flowing through the first input transistor.
- the output stage is coupled to the differential input-stage and to the current mirror circuit and produces a second larger current which perturbs the current flowing through the second input transistor.
- the ratio of the emitter areas of the first and second input transistors are selected to substantially eliminate offset voltage caused by the difference between the first and second perturbing currents.
- Figure 1 is a schematic diagram of an operational amplifier in accordance with the first embodiment of the present invention
- Figure 2 is a schematic diagram of an operational amplifier in accordance with second embodiment of the present invention.
- Figure 3 is a block diagram of a simple hearing aid capable of utilizing the operational amplifiers shown in Figures 1 and 2.
- Figure 1 is a schematic diagram of a basic operational amplifier comprising an input- stage 10 and an output stage 12.
- Input-stage 10 includes first and second differentially coupled NPN transistors Qi and Q 2 , first and second PNP load transistors Q 3 and Q 4 , and current source IBI-
- the base of transistor Qi is coupled to an inverting input IN-
- the base of transistor Q 2 is coupled to a non-inverting input terminal IN+ in the well-known manner.
- Current source I BI is coupled to the emitters of transistors of Qi and Q 2 and to a first supply voltage terminal 14 which maybe coupled to a source of supply voltage V ee (e.g. ground).
- Load transistors Q 3 and Q are coupled in a current mirror configuration between the collectors of input transistors Qi and Q 2 and a second supply voltage terminal 16 which may be coupled to a second supply voltage V cc (e.g. 1 volts-1.5 volts).
- Output stage 12 comprises PNP transistor Q 5 , compensation capacitor C, and a second current source I B2 .
- Output transistor Q 5 has a base coupled to the collectors of transistors Q and Q 4 , an emitter coupled to supply voltage terminal 16, and a collector coupled to output terminal 18.
- Compensation capacitor C is coupled between the collector of transistor Q 5 and the collectors of transistors Q 2 and Q 4 .
- current source I B2 is coupled between the collector of transistor Q 5 and supply voltage terminal 14.
- the operational amplifier shown in Figure 1 operates in the well-known manner. That is, if input signal IN+ is greater than input signal IN-, the current flowing through the collector of transistor Q 2 is greater than that flowing through the collector of transistor Qi. Since Qi's collector current is mirrored at the collector of transistor Q 4 , the voltage at the base of transistor Q 5 will fall causing transistor Q 5 to turn on thus raising the voltage at output terminal 18. If, on the other hand, input voltage IN+ is less than input voltage IN-, the current flowing in the collector of transistor Qi will be greater than that flowing in the collector of transistor Q 2 . Since the current flowing in the collector of transistor Qi is mirrored at collector at transistor Q , the voltage at the base of transistor Q 5 will rise causing transistor Q 5 to turn off. In this case, current source I ⁇ 2 will sink current from output terminal 18 causing the voltage at output terminal 18 to fall.
- the operational amplifier shown in Figure 1 amplifies the difference between the signals at inverting input IN- and non-inverting input IN+.
- the amplified signal is produced at the collector of transistor Q which in turn drives output transistor Q 5 causing current to be either supplied to or sourced from output terminal 18 in the well known manner.
- I QI current flowing through transistor Qi
- I Q2 current flowing through transistor Q 2
- the base current of load transistor Q 3 i.e. l Q3b 2Q where D is the current gain
- the base current of load transistor Q 4 i.e. l Q b /2 D
- the base current of output transistor Q 5 i.e.
- Current source I ⁇ 2 must have sufficient capacity to accommodate high currents produced by low resistance loads coupled to output terminal 18.
- low- power/low- voltage operational amplifier designs i.e. those for when the voltage difference between V ee and V cc is approximately 1 volt to 1.5 volts
- suitable for use in medical devices such as hearing aids require a relatively small I BI ; (i-e. substantially less than I B2 ). In this case, the sum of the base currents of transistors Q 3 and Q 4 (i.e. l Q3b and
- I ⁇ j4b will be substantially less than the base current of transistor Q 5 (i.e. i Q s b )- Now, more current flows through transistor Q 2 , and current I BI is no longer split equally between transistors Qi and Q 2 resulting in an offset voltage.
- the ratio of I QIC to the sum of l Q b and l Q b can be made to be substantially equal to the ratio of I Q2C to I ⁇ s b as shown in equation (1) below:
- transistor Qi is assumed to have an emitter area A l5 and transistor Q 2 is assumed to have an emitter area
- transistor Q 3 is assumed to have an emitter area A and transistor Q 4 is assumed to have an emitter area A t , then the values of A 3 and A 4 are driven by the values of Ai and A such that:
- FIG. 2 is a schematic diagram of a second embodiment of the present invention wherein like reference numerals denote like elements.
- the circuit is substantially similar except that constant current source I ⁇ 2 is replaced with a variable current source comprised of a PNP transistor Q and current source I ⁇ 3 , a second current mirror 28 comprised of PNP transistors Q and Q 8 , and a third current mirror 30 comprised of NPN transistors Q 9 and Qio.
- current source I B3 is coupled in series with the collector-emitter path of transistor Q 6> the series combination being coupled between supply voltage terminals 14 and 16.
- the base of transistor Q 6 is coupled to the collectors of transistors Q 2 and Q 4 as is the base of transistor Q 5 .
- the input of current mirror 28 i.e. the base/collector of transistor Q
- the output of current mirror 28 i.e. the collector of transistor Q 8
- the output of current mirror 30 i.e. the collector of transistor Q 10
- the operational amplifier shown and described in connection with Figure 1 does not provide for any control of the output pull-down current. That is, current I ⁇ 2 is dissipated irrespective of whether or not it is necessary to sink current from output terminal 18.
- the circuit shown in Figure 2 provides for the dynamic control of the output pulldown current; that is, the current through transistor through transistor Qio is responsive to the difference between IN- and IN+.
- the difference between current I B3 and the collector current in transistor Q 6 i.e. I Q6C ) flows through current mirror 28 and is then mirrored in current mirror 30 so as to become a dynamic pull-down current at output terminal 18.
- FIG. 3 is a block diagram of a simple hearing aid that could benefit by incorporating the inventive low-power operational amplifier. It comprises a microphone 32, an integrated circuit 34, a speaker 36, a capacitor 38, and a battery 40 (typically 1.5 volts). Due to the low voltage of battery 40, the hearing aid should draw as little current as possible. Thus, the components and circuits on integrated circuit 34 should be capable of operating at low current and low voltage.
- Integrated circuit 34 comprises a preamplifier 42 having an input coupled to receive the output of microphone and having an output coupled to a first terminal of capacitor 38, a gain control circuit 44 having an input coupled to a second terminal of capacitor 38.
- a speaker driver circuit 46 has an input coupled to the output of gain control circuit 44 and an output coupled to drive speaker 36.
- Preamplifier 42 has a gain (typically around ten), and its output is coupled to gain control circuit 44 through capacitor 38 to eliminate the effects of any DC offset voltage in preamplifier 42.
- Gain control circuit 44 has a variable gain that could be as high as twenty, and offsets in the gain control operational amplifier 48 are multiplied by this gain. This could cause premature clipping of the audio signals. Thus, it is extremely important that operational amplifier 48 be of the types previously described.
- Speaker 36 contains a coil of wire, which represents a high impedance at audio frequencies but is nearly a short circuit at DC. Any offset in the speaker driver operational amplifier 50 could cause excessive current drain from battery 40. Thus, an operational amplifier of the type described above in connection with Figures 1 and 2 would be especially suitable for use in speaker driver 46. Thus, there has been provided a low-power bipolar operational amplifier that exhibits substantially reduced input offset voltage through the proper selection of device emitter areas for use in low-power medical devices such as hearing aids.
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03705754A EP1468489B1 (en) | 2002-01-16 | 2003-01-14 | Operational amplifier having improved input offset performance |
JP2003563087A JP2005516450A (en) | 2002-01-16 | 2003-01-14 | Operational amplifier with improved input offset performance |
CA002472125A CA2472125A1 (en) | 2002-01-16 | 2003-01-14 | Operational amplifier having improved input offset performance |
DE60304028T DE60304028T2 (en) | 2002-01-16 | 2003-01-14 | OPERATIONAL AMPLIFIER WITH IMPROVED INPUT SIMILAR VOLTAGE SHIFTING AREA |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/052,035 | 2002-01-16 | ||
US10/052,035 US6549072B1 (en) | 2002-01-16 | 2002-01-16 | Operational amplifier having improved input offset performance |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003063344A1 true WO2003063344A1 (en) | 2003-07-31 |
WO2003063344B1 WO2003063344B1 (en) | 2003-09-18 |
Family
ID=21975002
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2003/001040 WO2003063344A1 (en) | 2002-01-16 | 2003-01-14 | Operational amplifier having improved input offset performance |
Country Status (6)
Country | Link |
---|---|
US (1) | US6549072B1 (en) |
EP (1) | EP1468489B1 (en) |
JP (1) | JP2005516450A (en) |
CA (1) | CA2472125A1 (en) |
DE (1) | DE60304028T2 (en) |
WO (1) | WO2003063344A1 (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7085088B2 (en) * | 2002-05-23 | 2006-08-01 | Texas Instruments Incorporated | Method of controlling reader amplifier gain variations of a HDD preamplifier, or the like |
US6593801B1 (en) * | 2002-06-07 | 2003-07-15 | Pericom Semiconductor Corp. | Power down mode signaled by differential transmitter's high-Z state detected by receiver sensing same voltage on differential lines |
US6965267B2 (en) * | 2004-02-27 | 2005-11-15 | Analog Devices, Inc. | Bipolar differential input stage with input bias current cancellation circuit |
DE102005054216B4 (en) * | 2004-11-25 | 2017-10-12 | Infineon Technologies Ag | Output stage, amplifier control loop and use of the output stage |
US7576598B2 (en) * | 2006-09-25 | 2009-08-18 | Analog Devices, Inc. | Bandgap voltage reference and method for providing same |
US8102201B2 (en) | 2006-09-25 | 2012-01-24 | Analog Devices, Inc. | Reference circuit and method for providing a reference |
US7714563B2 (en) * | 2007-03-13 | 2010-05-11 | Analog Devices, Inc. | Low noise voltage reference circuit |
US20080265860A1 (en) * | 2007-04-30 | 2008-10-30 | Analog Devices, Inc. | Low voltage bandgap reference source |
US7612606B2 (en) * | 2007-12-21 | 2009-11-03 | Analog Devices, Inc. | Low voltage current and voltage generator |
US7598799B2 (en) * | 2007-12-21 | 2009-10-06 | Analog Devices, Inc. | Bandgap voltage reference circuit |
US7750728B2 (en) * | 2008-03-25 | 2010-07-06 | Analog Devices, Inc. | Reference voltage circuit |
US7880533B2 (en) * | 2008-03-25 | 2011-02-01 | Analog Devices, Inc. | Bandgap voltage reference circuit |
US7902912B2 (en) * | 2008-03-25 | 2011-03-08 | Analog Devices, Inc. | Bias current generator |
JP2010028496A (en) * | 2008-07-22 | 2010-02-04 | Seiko Npc Corp | Oscillation detection circuit |
RU2446555C2 (en) * | 2010-05-07 | 2012-03-27 | Государственное образовательное учреждение высшего профессионального образования "Южно-Российский государственный университет экономики и сервиса" (ГОУ ВПО "ЮРГУЭС") | Differential operational amplifier |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0072082A1 (en) * | 1981-08-06 | 1983-02-16 | Precision Monolithics Inc. | Differential amplifier circuit with precision active load |
US4590435A (en) * | 1984-03-06 | 1986-05-20 | Kabushiki Kaisha Toshiba | High input impedance differential amplifier |
US5491437A (en) * | 1994-12-01 | 1996-02-13 | Texas Instruments Incorporated | Amplifier circuit and method |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4095164A (en) * | 1976-10-05 | 1978-06-13 | Rca Corporation | Voltage supply regulated in proportion to sum of positive- and negative-temperature-coefficient offset voltages |
JPS5824042B2 (en) * | 1978-02-23 | 1983-05-19 | 株式会社東芝 | voltage follower circuit |
JPS57557A (en) * | 1980-05-26 | 1982-01-05 | Toshiba Corp | Voltage comparator |
US5166636A (en) | 1991-07-09 | 1992-11-24 | Sgs-Thomson Microelectronics, Inc. | Dynamic biasing for class a amplifier |
-
2002
- 2002-01-16 US US10/052,035 patent/US6549072B1/en not_active Expired - Fee Related
-
2003
- 2003-01-14 JP JP2003563087A patent/JP2005516450A/en active Pending
- 2003-01-14 EP EP03705754A patent/EP1468489B1/en not_active Expired - Lifetime
- 2003-01-14 CA CA002472125A patent/CA2472125A1/en not_active Abandoned
- 2003-01-14 DE DE60304028T patent/DE60304028T2/en not_active Expired - Lifetime
- 2003-01-14 WO PCT/US2003/001040 patent/WO2003063344A1/en active IP Right Grant
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0072082A1 (en) * | 1981-08-06 | 1983-02-16 | Precision Monolithics Inc. | Differential amplifier circuit with precision active load |
US4590435A (en) * | 1984-03-06 | 1986-05-20 | Kabushiki Kaisha Toshiba | High input impedance differential amplifier |
US5491437A (en) * | 1994-12-01 | 1996-02-13 | Texas Instruments Incorporated | Amplifier circuit and method |
Also Published As
Publication number | Publication date |
---|---|
US6549072B1 (en) | 2003-04-15 |
EP1468489B1 (en) | 2006-03-15 |
DE60304028D1 (en) | 2006-05-11 |
CA2472125A1 (en) | 2003-07-31 |
WO2003063344B1 (en) | 2003-09-18 |
DE60304028T2 (en) | 2006-08-31 |
EP1468489A1 (en) | 2004-10-20 |
JP2005516450A (en) | 2005-06-02 |
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