WO2003067434A3 - Asf state determination using chipset-resident watchdog timer - Google Patents

Asf state determination using chipset-resident watchdog timer Download PDF

Info

Publication number
WO2003067434A3
WO2003067434A3 PCT/US2002/040625 US0240625W WO03067434A3 WO 2003067434 A3 WO2003067434 A3 WO 2003067434A3 US 0240625 W US0240625 W US 0240625W WO 03067434 A3 WO03067434 A3 WO 03067434A3
Authority
WO
WIPO (PCT)
Prior art keywords
watchdog timer
microcontroller
chipset
integrated circuit
state determination
Prior art date
Application number
PCT/US2002/040625
Other languages
French (fr)
Other versions
WO2003067434A2 (en
Inventor
Dale E Gulick
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to AU2002367605A priority Critical patent/AU2002367605A1/en
Publication of WO2003067434A2 publication Critical patent/WO2003067434A2/en
Publication of WO2003067434A3 publication Critical patent/WO2003067434A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

An integrated circuit (212), a client computer system (200A-B), and a method for operating the integrated circuit (212) in the client computer system (200A-B). The integrated circuit (212) includes a first bus interface logic (216) for coupling to a first external bus (215), a microcontroller (320) configured as an Alert Standard Format management engine, and a watchdog timer (310) coupled to the microcontroller (320). The microcontroller (320) is further configured to receive Alert Standard Format sensor data over the first external bus (215). The watchdog timer (310) is coupled to receive a reset input upon a predetermined change in a system state. The watchdog timer (310) is further configured to provide an indication to the microcontroller (320) in response to an expiration of the watchdog timer (310).
PCT/US2002/040625 2002-02-04 2002-12-18 Asf state determination using chipset-resident watchdog timer WO2003067434A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002367605A AU2002367605A1 (en) 2002-02-04 2002-12-18 Asf state determination using chipset-resident watchdog timer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/066,879 US7194665B2 (en) 2001-11-01 2002-02-04 ASF state determination using chipset-resident watchdog timer
US10/066,879 2002-02-04

Publications (2)

Publication Number Publication Date
WO2003067434A2 WO2003067434A2 (en) 2003-08-14
WO2003067434A3 true WO2003067434A3 (en) 2004-06-24

Family

ID=27732217

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/040625 WO2003067434A2 (en) 2002-02-04 2002-12-18 Asf state determination using chipset-resident watchdog timer

Country Status (3)

Country Link
US (1) US7194665B2 (en)
AU (1) AU2002367605A1 (en)
WO (1) WO2003067434A2 (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7003607B1 (en) * 2002-03-20 2006-02-21 Advanced Micro Devices, Inc. Managing a controller embedded in a bridge
EP1351145A1 (en) * 2002-04-04 2003-10-08 Hewlett-Packard Company Computer failure recovery and notification system
US7168007B2 (en) * 2002-05-17 2007-01-23 Sun Microsystems, Inc. Field replaceable unit (FRU) identification system tool
US7010724B1 (en) * 2002-06-05 2006-03-07 Nvidia Corporation Operating system hang detection and methods for handling hang conditions
US7178014B2 (en) * 2002-09-04 2007-02-13 Intel Corporation Method and apparatus for using a memory region to pass parameters between a run time environment and SMM handler
US20050050385A1 (en) * 2003-08-26 2005-03-03 Chih-Wei Chen Server crash recovery reboot auto activation method and system
US7668941B1 (en) * 2004-06-29 2010-02-23 American Megatrends, Inc. Systems and methods for implementing a TCP/IP stack and web interface within a management module
US7707282B1 (en) 2004-06-29 2010-04-27 American Megatrends, Inc. Integrated network and management controller
US7636797B2 (en) * 2005-05-04 2009-12-22 Atmel Corporation LPC configuration sharing method
US20070118658A1 (en) * 2005-11-23 2007-05-24 Broyles Paul J User selectable management alert format
TW200725301A (en) * 2005-12-27 2007-07-01 Univ Yuan Ze Distributed data server and method thereof
TWI317062B (en) * 2006-10-13 2009-11-11 Asustek Comp Inc Computer system combining web-phone
JP2008225858A (en) * 2007-03-13 2008-09-25 Nec Corp Device, method and program for recovery from bios stall failure
CN101271413B (en) * 2007-03-21 2011-12-14 鸿富锦精密工业（深圳）有限公司 Computer operation condition detecting and processing method and system
US7877645B2 (en) * 2007-07-30 2011-01-25 Hewlett-Packard Development Company, L.P. Use of operational configuration parameters to predict system failures
US20100088542A1 (en) * 2008-10-06 2010-04-08 Texas Instruments Incorporated Lockup recovery for processors
US8448029B2 (en) * 2009-03-11 2013-05-21 Lsi Corporation Multiprocessor system having multiple watchdog timers and method of operation
JP5335552B2 (en) * 2009-05-14 2013-11-06 キヤノン株式会社 Information processing apparatus, control method therefor, and computer program
CN102360315B (en) * 2011-09-30 2014-05-28 中国航空工业集团公司第六三一研究所 Management method of watchdog circuit of fault-tolerant control system
TW201430581A (en) * 2013-01-22 2014-08-01 Hon Hai Prec Ind Co Ltd Notebook computer
TWI510910B (en) * 2013-11-11 2015-12-01 Wistron Corp Computer system and remote control method thereof
US20150339178A1 (en) * 2014-05-21 2015-11-26 Freescale Semiconductor, Inc. Processing system and method of operating a processing system
US10528358B2 (en) 2015-01-23 2020-01-07 Hewlett-Packard Development Company, L.P. Initialize port
US10296434B2 (en) * 2017-01-17 2019-05-21 Quanta Computer Inc. Bus hang detection and find out

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5673389A (en) * 1995-08-31 1997-09-30 Ford Motor Company Methods and apparatus for resetting a monitored system using a gray code with alternating check bits
US20010042198A1 (en) * 1997-09-18 2001-11-15 David I. Poisner Method for recovering from computer system lockup condition

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6012154A (en) * 1997-09-18 2000-01-04 Intel Corporation Method and apparatus for detecting and recovering from computer system malfunction
US6393589B1 (en) * 1998-09-16 2002-05-21 Microchip Technology Incorporated Watchdog timer control circuit with permanent and programmable enablement
DE19847986C2 (en) * 1998-10-17 2000-10-26 Daimler Chrysler Ag Single processor system
US7451335B2 (en) * 2001-04-24 2008-11-11 Broadcom Corporation Selectively disabling a portion of ASF operations when ASF device is powered by auxiliary power
US20030079007A1 (en) * 2001-10-22 2003-04-24 Merkin Cynthia M. Redundant source event log

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5673389A (en) * 1995-08-31 1997-09-30 Ford Motor Company Methods and apparatus for resetting a monitored system using a gray code with alternating check bits
US20010042198A1 (en) * 1997-09-18 2001-11-15 David I. Poisner Method for recovering from computer system lockup condition

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
K. CLINE: "Alert Standard Format (ASF) Specification Version 1.03", DMTF STANDARD, 20 June 2001 (2001-06-20), XP002278032, Retrieved from the Internet <URL:http://www.dmtf.org/standards/documents/ASF/DSP0114.pdf> [retrieved on 20040421] *

Also Published As

Publication number Publication date
AU2002367605A1 (en) 2003-09-02
WO2003067434A2 (en) 2003-08-14
US20030084381A1 (en) 2003-05-01
US7194665B2 (en) 2007-03-20

Similar Documents

Publication Publication Date Title
WO2003067434A3 (en) Asf state determination using chipset-resident watchdog timer
CN107092568B (en) Data communication interface for processing data in low power system
US7330926B2 (en) Interruption control system
WO2002054212A3 (en) Computer peripheral device that remains operable when central processor operations are suspended
WO2004063889A3 (en) Interfacing a battery-powered device to a computer using a bus interface
TW327684B (en) A method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge
WO1998011693A3 (en) Low power serial protocol translator for use in multi-circuit board electronic systems
WO2004025435A8 (en) Method and system for managing token image replacement
US20080151452A1 (en) Circuit for protecting computer
WO2003038646A3 (en) Microcomputer bridge architecture with an embedded microcontroller
WO2002003182A3 (en) A method and apparatus for power management
CN100535834C (en) Method and system for reset processing system power supply state of computer platform power supply restored
TWI266176B (en) Power management state control method
US7185212B2 (en) Method for PCI express power management using a PCI PM mechanism in a computer system
CN201383075Y (en) PC104-plus controller based on PowerPC processor
CN214670566U (en) Computer wake-up circuit and computer
US7363408B2 (en) Interruption control system and method
US7206883B2 (en) Interruption control system and method
JP4503851B2 (en) Method and apparatus for disabling a graphics device once an upgrade device is installed
CN102486675B (en) Control device, control method and image processing system
US7185213B2 (en) Method for PCI Express power management using a PCI PM mechanism in a computer system
WO2007114960A3 (en) Communication between secondary processor and auxiliary display subsystem
JP7300667B2 (en) Energy saving hub
US20120303992A1 (en) Display and power management method thereof
TW201310215A (en) Computer

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LU MC NL PT SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP