WO2003098688A3 - Structural design of under bump metallurgy for high reliability bumped packages - Google Patents

Structural design of under bump metallurgy for high reliability bumped packages Download PDF

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Publication number
WO2003098688A3
WO2003098688A3 PCT/US2003/014807 US0314807W WO03098688A3 WO 2003098688 A3 WO2003098688 A3 WO 2003098688A3 US 0314807 W US0314807 W US 0314807W WO 03098688 A3 WO03098688 A3 WO 03098688A3
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WO
WIPO (PCT)
Prior art keywords
under bump
high reliability
structural design
bump metallurgy
die
Prior art date
Application number
PCT/US2003/014807
Other languages
French (fr)
Other versions
WO2003098688A2 (en
Inventor
Vijay Sarihan
Owen Fay
Lizabeth Ann Kesser
Original Assignee
Motorola Inc
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Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to AU2003234390A priority Critical patent/AU2003234390A1/en
Publication of WO2003098688A2 publication Critical patent/WO2003098688A2/en
Publication of WO2003098688A3 publication Critical patent/WO2003098688A3/en

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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

A method for creating an under bump metallization layer (37) is provided. In accordance with the method, a die (33) is provided which has a die pad (35) disposed thereon. A photo-definable polymer (51 or 71) is deposited on the die pad, and an aperture (66) is created in the photo-definable polymer. Finally, an under bump metallization layer (37) is deposited in the aperture. A die package is also provided comprising a die having a die pad (35) disposed thereon, and having an under bump metallization layer (37) disposed on the die pad. The structure has a depression or receptacle (57) therein and has a thickness of at least about 20 microns.
PCT/US2003/014807 2002-05-14 2003-05-12 Structural design of under bump metallurgy for high reliability bumped packages WO2003098688A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003234390A AU2003234390A1 (en) 2002-05-14 2003-05-12 Structural design of under bump metallurgy for high reliability bumped packages

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/145,500 2002-05-14
US10/145,500 US6930032B2 (en) 2002-05-14 2002-05-14 Under bump metallurgy structural design for high reliability bumped packages

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WO2003098688A2 WO2003098688A2 (en) 2003-11-27
WO2003098688A3 true WO2003098688A3 (en) 2004-07-08

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US (1) US6930032B2 (en)
AU (1) AU2003234390A1 (en)
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WO (1) WO2003098688A2 (en)

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US6930032B2 (en) 2005-08-16
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US20030214036A1 (en) 2003-11-20
TWI279869B (en) 2007-04-21
TW200400572A (en) 2004-01-01

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