WO2003100837A3 - Large substrate test system - Google Patents

Large substrate test system Download PDF

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Publication number
WO2003100837A3
WO2003100837A3 PCT/US2003/015903 US0315903W WO03100837A3 WO 2003100837 A3 WO2003100837 A3 WO 2003100837A3 US 0315903 W US0315903 W US 0315903W WO 03100837 A3 WO03100837 A3 WO 03100837A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
test
load lock
test station
test system
Prior art date
Application number
PCT/US2003/015903
Other languages
French (fr)
Other versions
WO2003100837A2 (en
Inventor
Matthias Brunner
Shinichi Kurita
Wendell T Blonigan
Edgar Kehrberg
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Priority to KR1020047018827A priority Critical patent/KR100990002B1/en
Priority to JP2004508394A priority patent/JP4620453B2/en
Priority to EP03734094A priority patent/EP1506571A2/en
Priority to CN038117223A priority patent/CN1656598B/en
Publication of WO2003100837A2 publication Critical patent/WO2003100837A2/en
Publication of WO2003100837A3 publication Critical patent/WO2003100837A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682—Mask-wafer alignment
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/01—Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station

Abstract

A system and method for testing substrates is generally provided. In one embodiment, a test system for testing a substrate includes a load lock chamber, a transfer chamber and a test station. The load lock chamber and the test station are disposed on top of one another and coupled to the transfer chamber. The transfer chamber includes a robot adapted to transfer a substrate between the load lock chamber, which is at a first elevation, and the test station, which is at a second elevation. In another embodiment, a test station is provided having a turntable adapted to rotate the substrate. The turntable enables the range of motion required to test the substrate to be substantially reduced while facilitating full test and/or inspection of the substrate.
PCT/US2003/015903 2002-05-23 2003-05-21 Large substrate test system WO2003100837A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020047018827A KR100990002B1 (en) 2002-05-23 2003-05-21 Large substrate test system
JP2004508394A JP4620453B2 (en) 2002-05-23 2003-05-21 Large board inspection system
EP03734094A EP1506571A2 (en) 2002-05-23 2003-05-21 Large substrate test system
CN038117223A CN1656598B (en) 2002-05-23 2003-05-21 Large substrate test system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/155,796 US7129694B2 (en) 2002-05-23 2002-05-23 Large substrate test system
US10/155,796 2002-05-23

Publications (2)

Publication Number Publication Date
WO2003100837A2 WO2003100837A2 (en) 2003-12-04
WO2003100837A3 true WO2003100837A3 (en) 2004-03-04

Family

ID=29549167

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/015903 WO2003100837A2 (en) 2002-05-23 2003-05-21 Large substrate test system

Country Status (7)

Country Link
US (1) US7129694B2 (en)
EP (1) EP1506571A2 (en)
JP (1) JP4620453B2 (en)
KR (1) KR100990002B1 (en)
CN (1) CN1656598B (en)
TW (1) TWI315555B (en)
WO (1) WO2003100837A2 (en)

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US10714364B2 (en) * 2017-08-31 2020-07-14 Taiwan Semiconductor Manufacturing Co., Ltd. Apparatus and method for inspecting wafer carriers
KR102648517B1 (en) * 2018-03-20 2024-03-15 도쿄엘렉트론가부시키가이샤 Self-aware and compensating heterogeneous platform including integrated semiconductor process module, and method for using the same
CN110238547B (en) * 2019-05-09 2020-12-18 西安理工大学 System and method for measuring position of high-power laser focus
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Also Published As

Publication number Publication date
US20030218456A1 (en) 2003-11-27
JP2005528786A (en) 2005-09-22
KR20040111682A (en) 2004-12-31
KR100990002B1 (en) 2010-10-26
EP1506571A2 (en) 2005-02-16
TW200402826A (en) 2004-02-16
WO2003100837A2 (en) 2003-12-04
TWI315555B (en) 2009-10-01
US7129694B2 (en) 2006-10-31
CN1656598B (en) 2011-12-07
CN1656598A (en) 2005-08-17
JP4620453B2 (en) 2011-01-26

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