WO2003107382A2 - Plasma method and apparatus for processing a substrate - Google Patents

Plasma method and apparatus for processing a substrate Download PDF

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Publication number
WO2003107382A2
WO2003107382A2 PCT/US2003/018784 US0318784W WO03107382A2 WO 2003107382 A2 WO2003107382 A2 WO 2003107382A2 US 0318784 W US0318784 W US 0318784W WO 03107382 A2 WO03107382 A2 WO 03107382A2
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WIPO (PCT)
Prior art keywords
plasma
nitrogen
chamber
substrate
coil
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PCT/US2003/018784
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French (fr)
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WO2003107382A3 (en
Inventor
Philip Allan Kraus
Tai Cheng Chua
John Holland
James P. Cruse
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Applied Materials, Inc.
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Filing date
Publication date
Priority claimed from US10/170,925 external-priority patent/US6660659B1/en
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to JP2004514108A priority Critical patent/JP2005530341A/en
Priority to KR1020047018470A priority patent/KR101044366B1/en
Priority to EP03737087A priority patent/EP1512165A2/en
Publication of WO2003107382A2 publication Critical patent/WO2003107382A2/en
Publication of WO2003107382A3 publication Critical patent/WO2003107382A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/321Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/3143Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • HELECTRICITY
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/318Inorganic layers composed of nitrides
    • H01L21/3185Inorganic layers composed of nitrides of siliconnitrides
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers

Definitions

  • This invention generally relates to a plasma reactor and a method of processing a substrate with a plasma generated in the reactor. More particularly, the invention relates to utilizing a pulsed plasma processing apparatus and method configured to generate a plasma having a lower temperature than conventional plasma processing reactors.
  • the manufacture of integrated circuits involves the manufacture of field effect transistors in and on silicon or other semiconductor substrates.
  • the manufacture of a field effect transistor includes the formation of a gate dielectric layer.
  • the dielectric layer is typically grown by exposing silicon of the substrate to oxygen, thereby forming silicon dioxide gate dielectric layers.
  • nitrogen is often incorporated by creating a plasma of nitrogen ions within a chamber and implanting the nitrogen ions into the gate dielectric layer.
  • the plasma is typically created utilizing a radio frequency (RF) source, with either an electrode plate (capacitative coupling) or a coil (inductive coupling).
  • the RF source creates an RF field within a gas in the chamber, and this coupling creates the plasma.
  • a method is provided of processing a substrate, including locating the substrate in a processing chamber, creating a nitrogen plasma in the chamber, the plasma having an ion density of at least 10 10 cm -3 , and a potential of less than 20 V, and exposing a layer on the substrate to the plasma to incorporate nitrogen from the plasma into the layer.
  • a method of processing a substrate wherein the substrate is located in a plasma processing chamber, a nitrogen-containing gas flows into the chamber, an RF current is provided through a coil to generate an RF field in the chamber, the RF field creating a nitrogen-containing RF plasma out of the gas, the RF current being pulsed, and incorporating nitrogen ions and excited neutrals from the plasma into a gate dielectric layer formed on the substrate.
  • a plasma reactor including a chamber having an opening to transfer a substrate into an internal volume of the chamber, a substrate holder in the chamber for holding the substrate, an RF coil externally and adjacent to a wall of the chamber, and a grounded electrode plate between the wall and the RF coil.
  • Embodiments of the invention further provide a method of forming a nitride gate dielectric layer.
  • the method includes generating a nitrogen- containing plasma in a processing chamber via introduction of a nitrogen- containing processing gas into the processing chamber and the application of an ionizing energy to the processing gas, and pulsing the ionizing energy to maintain a mean temperature of electrons in the nitrogen-containing plasma of less than about 0.7 eV.
  • Embodiments of the invention further provide a method of controlling a mean energy of constituents of a nitrogen-containing plasma used to nitridate a gate dielectric layer, comprising pulsing an ionizing source used to maintain the nitrogen-containing plasma for a first duration sufficient to energize the nitrogen-containing plasma and turning off the ionizing source and allowing the constituents of the nitrogen-containing plasma to dissipate for a second duration, the second duration being longer than the first duration, and the second duration being calculated to generate a mean energy of the constituents of a nitrogen-containing plasma of less than about 0.7 eV.
  • Figure 1 is a perspective view of a plasma reactor according to an embodiment of the invention.
  • Figure 2 is a cross-sectional side view of upper components of the plasma reactor
  • Figure 3 is a cross-sectional side view illustrating nitrogen ion incorporation into a silicon dioxide gate dielectric layer
  • Figure 4 is a graph illustrating plasma potential as a function of pressure for various RF source powers and electrode plate configuration as measured with a Langmuir probe;
  • Figure 5 is a graph illustrating the floating voltages as a function of pressure for the electrode plate configuration as measured with a Langmuir probe
  • Figure 6 is a graph illustrating electron density as a function of pressure for the electrode plate configuration as measured with a Langmuir probe
  • Figure 7 is a graph illustrating ion density as a function of pressure for the electrode plate configuration as measured with a Langmuir probe
  • Figure 8 is a graph illustrating electron temperature as a function of pressure for the electrode plate configuration as measured with a Langmuir probe
  • Figure 9 is a bottom view of laminate, including an electrode plate, according to an embodiment of the invention.
  • Figure 10 is a cross-sectional side view illustrating the laminate in an installed position
  • Figure 11 is a graph illustrating pulsing of RF power to an RF coil with a 30% duty cycle
  • Figure 12 is a graph similar to Figure 11 at a 50% duty cycle
  • Figure 13 is a graph illustrating thickness change before and after nitrogen plasma treatment with pulsed RF power, and provides a measure of incorporated nitrogen;
  • Figure 14 is a graph illustrating thickness change for different samples processed at different continuous RF power settings
  • Figure 15 is a graph illustrating thickness change as a function of RF source peak power for two pulsing frequencies
  • Figure 16 is a graph illustrating thickness change as a function of duty cycles for two pulsing frequencies
  • Figure 17 is a graph illustrating optical emissions spectra for 500 W peak power at various pulsing frequencies and duty cycles
  • Figure 18 illustrates optical emission spectra for a 50% duty cycle at various pulsing frequencies and peak powers
  • Figure 19 is a graph of effective power versus peak intensity
  • Figure 20 is another graph of effective power versus peak intensity
  • Figure 21 is a graph of the electron temperature versus the frequency of a power supplied to an ionizing source;
  • Figure 22 is a graph of the gate transconductance versus nitrogen content for an NMOS device;
  • Figure 23 is a graph of the gate transconductance versus nitrogen content for a PMOS device.
  • FIGS 1 and 2 illustrate a plasma reactor 10, according to an embodiment of the invention, including a chamber 12, a substrate holder 14, an RF coil 16, and an electrode plate 18.
  • the electrode plate 18 is connected through a body of the chamber 12 to ground 20.
  • grounding the electrode plate 18 a capacitive coupling between the RF coil 16 and a plasma 22 in an internal volume 24 of the chamber 12 is eliminated.
  • the elimination of the capacitive couple reduces the potential of the plasma 22 without dramatically altering other properties of the plasma 22, such as ion density and electron density.
  • the inductive coupling from the RF coil 16 is not eliminated, and this coupling creates and maintains the plasma 22.
  • the plasma reactor 10 further includes a lower transfer chamber 26 and a transfer mechanism 28.
  • the chamber 12 is positioned on top of the transfer chamber 26.
  • An internal volume 30 of the transfer chamber 26 is placed in communication with the internal volume 24 of the chamber 12 through a circular opening 32 in a base of the chamber 12.
  • the substrate holder 14 is secured on top of the transfer mechanism 28, and the transfer mechanism 28 can be used to elevate or lower the substrate holder 14.
  • the transfer mechanism 28 is operated so that the substrate holder 14 is lowered into the internal volume 30 of the transfer chamber 26.
  • a wafer substrate, positioned on a blade attached to a robot arm, is then transferred through a slit-valve opening in a wall of the transfer chamber 26 into the internal volume 30.
  • the transfer mechanism 28 is then operated to elevate the substrate holder 14 so that the substrate holder 14 contacts a lower surface of the wafer substrate and elevates the wafer substrate off the blade.
  • the blade is then removed from the transfer chamber 26, whereafter the transfer mechanism 28 is again operated to elevate the substrate holder 14 into the opening 32.
  • the wafer substrate, located on the substrate holder 14 then has an upper surface which is exposed to the internal volume 24 of the chamber 12.
  • the chamber 12 includes primarily a conductive body 36 and a dielectric quartz upper wall 38.
  • the conductive body 36 forms a lower portion of the chamber 12, and the upper wall 38 forms an upper portion of the chamber 12.
  • the conductive body 36 and the upper wall 38 jointly define the internal volume 24.
  • gas nozzle ports 40 are formed through the conductive body 36 into the internal volume 24.
  • the gas nozzle ports 40 are positioned at 90° intervals around the substrate holder 14.
  • the conductive body 36 also defines a vacuum pumping channel 42 on one side thereof.
  • the gas nozzle ports 40 are connected through valves to a gas manifold, and the vacuum pumping channel 42 is connected to a pump. When the pump is operated, gases are extracted from the internal volume 24 through the vacuum pumping channel 42 to reduce a pressure within the internal volume 24.
  • the valves can be operated to allow gases from the manifold through the valves and the gas nozzle ports 40 into the internal volume 24.
  • the upper wall 38 has a dome shape
  • the electrode plate 18 has a dome shape that conforms to an outer surface of the upper wall 38.
  • the electrode plate 18 is in fact located directly on the upper wall 38.
  • the electrode plate 18 defines a circular opening 44 over a center of the upper wall 38.
  • the upper wall 38 and the electrode plate 18 are symmetrical around a vertical axis 46.
  • the coil 16 spirals around the vertical axis 46 and the opening 44.
  • the coil 16 is positioned on and conforms to the dome shape of the electrode plate 18.
  • One end of the coil 16 is connected to an RF source 50, and an opposing end of the coil 16 is connected to ground 52.
  • An epitaxial silicon layer 54 is formed on an upper surface of a wafer substrate before the wafer substrate is inserted into the plasma reactor 10 positioned on an upper surface of the substrate holder 14.
  • a thin silicon dioxide layer 58 is grown on the silicon layer 54, also before the wafer substrate is inserted into the plasma reactor 10.
  • the silicon dioxide layer 58 is on the order of a few angstroms (e.g., 40 A) thick, and is later used as a gate dielectric layer in a finally manufactured transistor.
  • the purpose of inserting the wafer substrate into the plasma reactor 10 is to incorporate nitrogen (N) into the silicon dioxide layer 58 for purposes of modifying or improving its dielectric properties.
  • the plasma 22 of nitrogen ions (N2 + ) is created within the internal volume 24. The nitrogen ions have energies defined by the properties of the plasma which leads to their being incorporated into the silicon dioxide layer 58.
  • the plasma is created by first reducing the pressure within the internal volume 24 to a predetermined level.
  • a nitrogen-containing gas is then introduced into the internal volume 24.
  • the nitrogen-containing gas may, for example, be pure nitrogen (N 2 ), a mixture of nitrogen and helium gases (N2/He), a mixture of nitrogen and neon gases (N 2 /Ne), or a mixture of nitrogen and argon gases (N 2 /Ar).
  • N 2 pure nitrogen
  • N2/He a mixture of nitrogen and helium gases
  • N 2 /Ne mixture of nitrogen and neon gases
  • N 2 /Ar mixture of nitrogen and argon gases
  • a "reservoir" of ions is so created within the internal volume 24, and the voltage potential of the plasma 22 assists in incorporating ions from this reservoir into the silicon dioxide layer 58.
  • the potential of the substrate and the substrate holder 14 float freely during the entire process, but there is a difference in the voltage of the plasma 22 and that of the substrate holder 14, the difference driving the incorporation of the ions.
  • the difference is proportional to the instantaneous electron temperature, and the nitrogen incorporation is driven by the time-averaged electron temperature.
  • Reference herein to "electron temperature” should be understood to mean “time- averaged electron temperature” over many (e.g., thousands) of cycles of pulsing.
  • the RF coil 16 couples capacitively to the plasma 22. Such a capacitive couple between the RF coil 16 and the plasma 22 increases the voltage of the plasma 22. Conversely, by grounding the electrode plate 18, the capacitive coupling is substantially reduced, and the voltage of the plasma 22 is reduced. The plasma potential and the electron temperature are reduced, but ion density remains relatively high.
  • plasma potential is preferably less than 10 N. Electron temperatures are preferably near or less than 2 eN. Ion density is preferably at least 10 10 cm" 3 .
  • Figure 8 illustrates electron temperature. It can be seen that at lower pressures there is relatively little difference in electron temperatures when using a grounded, ungrounded, or no electrode plate. However, at higher pressures, typically above 40 mT, it can be seen that electron temperature is much higher when an ungrounded electrode plate is used, or when no electrode plate is used, than when a grounded electrode plate is used.
  • the electrode plate 18 is laminated between two dielectric sheets 60 and 62. The electrode plate 18 and the dielectric sheets 60 and 62 are formed in strips 64 that, when folded toward one another, collectively define a dome shape. The dielectric sheet 60 is positioned at the top between the electrode plate 18 and the RF coil 16.
  • the dielectric sheet 62 is located between the electrode plate 18 and the upper wall 38. Ends of the electrode plate are not covered by the dielectric sheet 62, to leave exposed lands 66. The exposed lands 66 contact a conductive portion of the conductive body 36, to ground the electrode plate 18 to the conductive body 36. The lands 66 are disposed on a perimeter of the electrode plate 18, so that the electrode plate 18 is peripherally grounded. Peripheral grounding of the electrode plate 18 ensures that the entire electrode plate 18 is as close to zero volts as possible. [0050] The plasma voltage can also be reduced by pulsing the RF power provided to the RF coil 16. In the examples that are now provided, the electrode plate 18 was not grounded, although it should be understood that the electrode plate 18 may be grounded in addition to pulsing of the RF power provided to the RF coil 16.
  • RF power having a frequency of 13.56 MHz and a predetermined peak power is provided to the RF coil 16.
  • the RF power may be automatically switched on and off, i.e., "pulsed.”
  • the RF power is automatically pulsed at a frequency of 10 kHz.
  • the RF power may be pulsed at frequencies between 1 kHz and 100 kHz.
  • the composition of the nitrogen plasma is continuously varied by varying the RF current between high and low states.
  • the duty cycle i.e., the total amount of time that the RF power is on, is 30%, and in Figure 12, the duty cycle is 50%.
  • the RF source 50 is pulsing-enabled, and both the pulsing frequency and duty cycle are manually adjustable.
  • the effective delivered power is the peak power times the duty cycle.
  • the duty cycle may be between 10% and 90%.
  • the amplitude of the RF power is continually altered between 0% and 100%, but in another example, the amplitude may, for example, be altered between 10% and 100%.
  • Figures 13 to 16 indicate that on-wafer nitrogen incorporation similar to the incorporation of continuous RF power is possible with pulsed-RF plasmas.
  • Figures 17 and 18 indicate that plasmas of similar ion density to continuous-RF power plasmas can be achieved with pulsed-RF power.
  • a nitrogen-containing plasma may be generated in a processing chamber via an ionizing source in communication with the processing chamber.
  • the nitrogen-containing plasma may be used in a transistor gate nitridation process, i.e., the nitrogen- containing plasma may be used to nitridate a transistor gate dielectric layer.
  • the ionizing source may, for example, include an inductive coil-type antenna configuration, as generally discussed above, a slotted line microwave-type ionizing source, which is also generally known as a radial line antenna source, an electronic cyclotron resonance source (ECR source), magnetron or modified magnetron-type sources, or other ionizing sources that may generally be used to facilitate plasma generation in a processing chamber.
  • ECR source electronic cyclotron resonance source
  • the nitrogen-containing plasma may be controlled via a plasma-pulsing sequence to generate lower electron temperatures than provided by conventional plasma processing chambers.
  • the pulsed plasma control provided by the present embodiment of the invention may be used to specifically control the mean energy of the constituents of the plasma, which is generally referred to herein as the electron temperature.
  • the control over the plasma is configured to provide a lower electron temperature, which, for example, may be used in gate nitridation processes to improve device characteristics, i.e., to provide less degradation in transconductance and improved channel mobility in gate dielectric-type devices.
  • the plasma pulsing sequence of the present invention generally operates to energize the nitrogen-containing plasma for a short period of time, and then allow the plasma to relax or dissipate for a period of time.
  • the dissipation time period allows the electron temperature to decrease, while maintaining the nitrogen-containing plasma.
  • embodiments of the invention will generally operate to pulse the ionizing source energy in an amount sufficient to maintain the plasma through the upcoming off or relax time, i.e., the pulse-on time is calculated to provide sufficient energy to the plasma to maintain the plasma through an upcoming off or relax time where energy is not being provided to the plasma.
  • the off or relax portion of the ionizing source pulses the electrons in the plasma diffuse freely.
  • the duty cycle of the pulses provided by the ionized source also has an effect upon the mean temperature of the constituents of the plasma.
  • greater duty cycles which correspond to longer pulse-on times, generate hotter plasmas, as the electrons in the plasma are being excited for a longer period of time during the pulse-on time.
  • the duty cycle of the plasma ionizing pulses may be between about 5% and about 90%. More particularly, the duty cycle may be between about 10% and about 80%, between about 25% and about 60%, and between about 30% and about 50%, for example, in order to generate the desired mean temperature of the constituents of the plasma.
  • the ionized plasma source may be used in a pseudo-pulsing manner to control the electron temperature. For example, as an alternative to pulsing, the output of the ionized source may be varied between about 5% and about 100% to control the plasma temperature.
  • embodiments of the invention contemplate optimizing the on and off time of the pulse to control the electron temperature.
  • Figure 21 illustrates a plot of the electron temperature versus the pulsed RF frequency for a plasma-processing chamber utilizing an ionizing source to generate the plasma.
  • the date was obtained using an inductive coil configuration ionizing source, as discussed above, using matched ion densities, power applications, chamber pressures, and processing gas flows.
  • a first data point 1901 generally represents the electron temperature at the time of plasma initiation with no pulsing.
  • the power supplied to the ionizing source is constant and does not vary or pulse, and therefore, the electron temperature was measured to be 2 eV once the plasma was stabilized.
  • a second data point 1902 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 500 kHz. At this frequency, the electron temperature was measured to be approximately 0.6 eV.
  • a third data point 1903 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 5 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV.
  • a fourth data point 1904 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 10 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV.
  • a fourth data point 1904 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 10 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV.
  • a fifth data point 1905 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 30 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV.
  • a sixth data point 1906 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 50 kHz. At this frequency, the electron temperature was measured to be approximately 1.25 eV.
  • Figure 21 generally illustrates that the implementation of a pulsed plasma operates to control the electron temperature of the plasma. Further, Figure 21 generally illustrates that the frequency of the power applied to the ionizing source may be varied between about 500 Hz and about 50 kHz, while still maintaining an electron temperature of less than 0.6 eV ("broadcasting problems" occur at approximately 100 kHz). Further still, when the frequency is increased up to about 50 kHz, the electron temperature is still less than about 1.25 eV. As such, embodiments of the present invention generally use an ionizing source to pulse the plasma in order to control the electron temperature of the plasma, and more specifically, in order to maintain the electron temperature of the plasma at less than about 0.7 eN.
  • embodiments of the present invention provide an ionizing source configured to pulse a plasma in a processing chamber at a frequency of between about 1 kHz and about 30 kHz, while maintaining an electron temperature of less than about 0.6 eN.
  • a frequency of between about 1 kHz and about 30 kHz while maintaining an electron temperature of less than about 0.6 eN.
  • the relationship between the electron temperature using continuous-wave plasma and the electron temperature using a pulsed plasma is such that the electron temperature for the pulsed plasma is always less than the electron temperature for a continuous-wave plasma, regardless of the ancillary parameters.
  • Figure 22 illustrates data representative of a change in the maximum channel transconductance (gmmax) as a function of the percentage of nitrogen in the film.
  • Gmmax maximum channel transconductance
  • nitrogen is generally introduced into the transistor fabrication process, as it is known to reduce transistor gate leakage, prevent diffusion of boron from the polysilicon gate electrode, and reduce the electrical thickness, which provides improved off- state control. Therefore, although the maximum channel transconductance shift may be reduced by eliminating the nitrogen, the elimination of the nitrogen would adversely affect the gate leakage, diffusion, and the off-state control dramatically. As such, the present invention operates to reduce the maximum channel transconductance shift, while maintaining the nitrogen and the benefits provided by the nitrogen content.
  • Figure 22 illustrates the difference in maximum channel transconductance for a nitrogen-containing plasma generated via a continuous- wave configuration versus an ionizing source configured to pulse the nitrogen- containing plasma.
  • Each of the data points for the continuous-wave configuration and the ionizing source configured to pulse the plasma were collected using matching pressures, powers, durations, and duty cycles (50%), as indicated by the graph legend.
  • data points 2001 represent the relationship between the maximum channel transconductance shift and the nitrogen percentage for a continuous-wave configuration.
  • Data points 2001 illustrate a maximum channel transconductance shift of between about 18.5 and about 19.5 for a nitrogen content of about 12.8 percent.

Abstract

Embodiments of the invention generally provide a method of forming a nitride gate dielectric layer. The method includes generating a nitrogen-containing plasma in a processing chamber via introduction of a nitrogen-containing processing gas into the processing chamber and the application of an ionizing energy to the processing gas, and pulsing the ionizing energy to maintain a mean temperature of electrons in the nitrogen-containing plasma of less than about 0.7 eV.

Description

PLASMA METHOD AND APPARATUS FOR PROCESSING A SUBSTRATE
BACKGROUND OF THE INVENTION
1). Field of the Invention
[0001] This invention generally relates to a plasma reactor and a method of processing a substrate with a plasma generated in the reactor. More particularly, the invention relates to utilizing a pulsed plasma processing apparatus and method configured to generate a plasma having a lower temperature than conventional plasma processing reactors.
2). Discussion of Related Art
[0002] The manufacture of integrated circuits involves the manufacture of field effect transistors in and on silicon or other semiconductor substrates. The manufacture of a field effect transistor includes the formation of a gate dielectric layer. The dielectric layer is typically grown by exposing silicon of the substrate to oxygen, thereby forming silicon dioxide gate dielectric layers. [0003] As logic devices have become smaller, it has become advantageous to include nitrogen into the silicon dioxide gate dielectric layers. Nitrogen is often incorporated by creating a plasma of nitrogen ions within a chamber and implanting the nitrogen ions into the gate dielectric layer. The plasma is typically created utilizing a radio frequency (RF) source, with either an electrode plate (capacitative coupling) or a coil (inductive coupling). The RF source creates an RF field within a gas in the chamber, and this coupling creates the plasma.
[0004] Independent of the type of RF source (plate or coil), there can be significant capacitative coupling from the source to the plasma, which creates a relatively large plasma potential, on the order of tens of volts. Such a large plasma potential may cause excessive bombardment of the silicon dioxide layer with nitrogen ions, which can cause damage to the silicon dioxide layer and even incorporation of nitrogen into the underlying silicon. Damage to the silicon dioxide layer or incorporation of nitrogen into the underlying silicon diminishes the advantages of nitrogen incorporation.
SUMMARY OF THE INVENTION
[0005] According to one aspect of the invention, a method is provided of processing a substrate, including locating the substrate in a processing chamber, creating a nitrogen plasma in the chamber, the plasma having an ion density of at least 1010 cm-3, and a potential of less than 20 V, and exposing a layer on the substrate to the plasma to incorporate nitrogen from the plasma into the layer.
[0006] According to another aspect of the invention, a method of processing a substrate is provided, wherein the substrate is located in a plasma processing chamber, a nitrogen-containing gas flows into the chamber, an RF current is provided through a coil to generate an RF field in the chamber, the RF field creating a nitrogen-containing RF plasma out of the gas, the RF current being pulsed, and incorporating nitrogen ions and excited neutrals from the plasma into a gate dielectric layer formed on the substrate.
[0007] According to a further aspect of the invention, a plasma reactor is provided, including a chamber having an opening to transfer a substrate into an internal volume of the chamber, a substrate holder in the chamber for holding the substrate, an RF coil externally and adjacent to a wall of the chamber, and a grounded electrode plate between the wall and the RF coil. [0008] Embodiments of the invention further provide a method of forming a nitride gate dielectric layer. The method includes generating a nitrogen- containing plasma in a processing chamber via introduction of a nitrogen- containing processing gas into the processing chamber and the application of an ionizing energy to the processing gas, and pulsing the ionizing energy to maintain a mean temperature of electrons in the nitrogen-containing plasma of less than about 0.7 eV.
[0009] Embodiments of the invention further provide a method of controlling a mean energy of constituents of a nitrogen-containing plasma used to nitridate a gate dielectric layer, comprising pulsing an ionizing source used to maintain the nitrogen-containing plasma for a first duration sufficient to energize the nitrogen-containing plasma and turning off the ionizing source and allowing the constituents of the nitrogen-containing plasma to dissipate for a second duration, the second duration being longer than the first duration, and the second duration being calculated to generate a mean energy of the constituents of a nitrogen-containing plasma of less than about 0.7 eV.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The invention is further described by way of examples with reference to the accompanying drawings, wherein:
[0011] Figure 1 is a perspective view of a plasma reactor according to an embodiment of the invention;
[0012] Figure 2 is a cross-sectional side view of upper components of the plasma reactor;
[0013] Figure 3 is a cross-sectional side view illustrating nitrogen ion incorporation into a silicon dioxide gate dielectric layer;
[0014] Figure 4 is a graph illustrating plasma potential as a function of pressure for various RF source powers and electrode plate configuration as measured with a Langmuir probe;
[0015] Figure 5 is a graph illustrating the floating voltages as a function of pressure for the electrode plate configuration as measured with a Langmuir probe;
[0016] Figure 6 is a graph illustrating electron density as a function of pressure for the electrode plate configuration as measured with a Langmuir probe;
[0017] Figure 7 is a graph illustrating ion density as a function of pressure for the electrode plate configuration as measured with a Langmuir probe;
[0018] Figure 8 is a graph illustrating electron temperature as a function of pressure for the electrode plate configuration as measured with a Langmuir probe;
[0019] Figure 9 is a bottom view of laminate, including an electrode plate, according to an embodiment of the invention;
[0020] Figure 10 is a cross-sectional side view illustrating the laminate in an installed position;
[0021] Figure 11 is a graph illustrating pulsing of RF power to an RF coil with a 30% duty cycle;
[0022] Figure 12 is a graph similar to Figure 11 at a 50% duty cycle;
[0023] Figure 13 is a graph illustrating thickness change before and after nitrogen plasma treatment with pulsed RF power, and provides a measure of incorporated nitrogen;
[0024] Figure 14 is a graph illustrating thickness change for different samples processed at different continuous RF power settings;
[0025] Figure 15 is a graph illustrating thickness change as a function of RF source peak power for two pulsing frequencies;
[0026] Figure 16 is a graph illustrating thickness change as a function of duty cycles for two pulsing frequencies;
[0027] Figure 17 is a graph illustrating optical emissions spectra for 500 W peak power at various pulsing frequencies and duty cycles;
[0028] Figure 18 illustrates optical emission spectra for a 50% duty cycle at various pulsing frequencies and peak powers;
[0029] Figure 19 is a graph of effective power versus peak intensity;
[0030] Figure 20 is another graph of effective power versus peak intensity;
[0031] Figure 21 is a graph of the electron temperature versus the frequency of a power supplied to an ionizing source; [0032] Figure 22 is a graph of the gate transconductance versus nitrogen content for an NMOS device; and
[0033] Figure 23 is a graph of the gate transconductance versus nitrogen content for a PMOS device.
DETAILED DESCRIPTION OF THE INVENTION
[0034] Figures 1 and 2 illustrate a plasma reactor 10, according to an embodiment of the invention, including a chamber 12, a substrate holder 14, an RF coil 16, and an electrode plate 18. The electrode plate 18 is connected through a body of the chamber 12 to ground 20. By grounding the electrode plate 18, a capacitive coupling between the RF coil 16 and a plasma 22 in an internal volume 24 of the chamber 12 is eliminated. The elimination of the capacitive couple reduces the potential of the plasma 22 without dramatically altering other properties of the plasma 22, such as ion density and electron density. The inductive coupling from the RF coil 16 is not eliminated, and this coupling creates and maintains the plasma 22.
[0035] Referring specifically to Figure 1, the plasma reactor 10 further includes a lower transfer chamber 26 and a transfer mechanism 28. The chamber 12 is positioned on top of the transfer chamber 26. An internal volume 30 of the transfer chamber 26 is placed in communication with the internal volume 24 of the chamber 12 through a circular opening 32 in a base of the chamber 12. The substrate holder 14 is secured on top of the transfer mechanism 28, and the transfer mechanism 28 can be used to elevate or lower the substrate holder 14.
[0036] In use, the transfer mechanism 28 is operated so that the substrate holder 14 is lowered into the internal volume 30 of the transfer chamber 26. A wafer substrate, positioned on a blade attached to a robot arm, is then transferred through a slit-valve opening in a wall of the transfer chamber 26 into the internal volume 30. The transfer mechanism 28 is then operated to elevate the substrate holder 14 so that the substrate holder 14 contacts a lower surface of the wafer substrate and elevates the wafer substrate off the blade. The blade is then removed from the transfer chamber 26, whereafter the transfer mechanism 28 is again operated to elevate the substrate holder 14 into the opening 32. The wafer substrate, located on the substrate holder 14, then has an upper surface which is exposed to the internal volume 24 of the chamber 12.
[0037] The chamber 12 includes primarily a conductive body 36 and a dielectric quartz upper wall 38. The conductive body 36 forms a lower portion of the chamber 12, and the upper wall 38 forms an upper portion of the chamber 12. The conductive body 36 and the upper wall 38 jointly define the internal volume 24.
[0038] Four gas nozzle ports 40 are formed through the conductive body 36 into the internal volume 24. The gas nozzle ports 40 are positioned at 90° intervals around the substrate holder 14. The conductive body 36 also defines a vacuum pumping channel 42 on one side thereof. The gas nozzle ports 40 are connected through valves to a gas manifold, and the vacuum pumping channel 42 is connected to a pump. When the pump is operated, gases are extracted from the internal volume 24 through the vacuum pumping channel 42 to reduce a pressure within the internal volume 24. The valves can be operated to allow gases from the manifold through the valves and the gas nozzle ports 40 into the internal volume 24.
[0039] Referring more specifically to Figure 2, the upper wall 38 has a dome shape, and the electrode plate 18 has a dome shape that conforms to an outer surface of the upper wall 38. The electrode plate 18 is in fact located directly on the upper wall 38. The electrode plate 18 defines a circular opening 44 over a center of the upper wall 38. The upper wall 38 and the electrode plate 18 are symmetrical around a vertical axis 46.
[0040] The coil 16 spirals around the vertical axis 46 and the opening 44. The coil 16 is positioned on and conforms to the dome shape of the electrode plate 18. One end of the coil 16 is connected to an RF source 50, and an opposing end of the coil 16 is connected to ground 52.
[0041] Reference is now made to Figures 2 and 3 in combination. An epitaxial silicon layer 54 is formed on an upper surface of a wafer substrate before the wafer substrate is inserted into the plasma reactor 10 positioned on an upper surface of the substrate holder 14. A thin silicon dioxide layer 58 is grown on the silicon layer 54, also before the wafer substrate is inserted into the plasma reactor 10. The silicon dioxide layer 58 is on the order of a few angstroms (e.g., 40 A) thick, and is later used as a gate dielectric layer in a finally manufactured transistor. The purpose of inserting the wafer substrate into the plasma reactor 10 is to incorporate nitrogen (N) into the silicon dioxide layer 58 for purposes of modifying or improving its dielectric properties. The plasma 22 of nitrogen ions (N2+) is created within the internal volume 24. The nitrogen ions have energies defined by the properties of the plasma which leads to their being incorporated into the silicon dioxide layer 58.
[0042] The plasma is created by first reducing the pressure within the internal volume 24 to a predetermined level. A nitrogen-containing gas is then introduced into the internal volume 24. The nitrogen-containing gas may, for example, be pure nitrogen (N2), a mixture of nitrogen and helium gases (N2/He), a mixture of nitrogen and neon gases (N2/Ne), or a mixture of nitrogen and argon gases (N2/Ar). For purposes of further discussion, examples are given where the gas is pure nitrogen gas.
[0043] The RF source 50 is then operated to provide RF current to the coil 16 at a frequency of 13.56 MHz. The RF coil 16 generates an RF field which is spread by the electrode plate 18 across the upper wall 38. The circular opening 44 permits the RF field to enter through the upper wall 38 into the internal volume 24. The RF field then couples with the nitrogen gas in the internal volume 24. The RF field initially excites a small number of free electrons. The free electrons then collide with other atoms to release more electrons from these atoms. The process is continued until a steady-state condition is achieved, where the plasma 22 has a steady amount of free electrons and free ions, a steady electron temperature, and a constant voltage relative to ground. A "reservoir" of ions is so created within the internal volume 24, and the voltage potential of the plasma 22 assists in incorporating ions from this reservoir into the silicon dioxide layer 58. The potential of the substrate and the substrate holder 14 float freely during the entire process, but there is a difference in the voltage of the plasma 22 and that of the substrate holder 14, the difference driving the incorporation of the ions. The difference is proportional to the instantaneous electron temperature, and the nitrogen incorporation is driven by the time-averaged electron temperature. Reference herein to "electron temperature" should be understood to mean "time- averaged electron temperature" over many (e.g., thousands) of cycles of pulsing.
[0044] Without grounding the electrode plate 18, the RF coil 16 couples capacitively to the plasma 22. Such a capacitive couple between the RF coil 16 and the plasma 22 increases the voltage of the plasma 22. Conversely, by grounding the electrode plate 18, the capacitive coupling is substantially reduced, and the voltage of the plasma 22 is reduced. The plasma potential and the electron temperature are reduced, but ion density remains relatively high. To prevent excessive incorporation of nitrogen through the Si02 and into the silicon substrate, plasma potential is preferably less than 10 N. Electron temperatures are preferably near or less than 2 eN. Ion density is preferably at least 1010 cm"3.
[0045] Figure 4 illustrates experimental results utilizing no electrode plate, a regular ungrounded electrode plate, and a grounded electrode plate, respectively. In each case, experimental results were obtained when applying 300 W, 500 W, and 900 W of power to the RF coil 16. Larger blocks or triangles indicate larger power magnitudes. At a given power provided to the RF coil 16, the plasma voltage (Np) is the smallest for a grounded electrode plate, higher for an ungrounded electrode plate, and even higher when there is no electrode plate. In other examples, effective RF power supplied to the RF coil 16 may be between 160 and 3000 W. Potentials below 10 N are not achievable without the grounded electrode plate. What should also be noted is that the potentials do not substantially increase with an increase in power provided to the RF coil. Even very large power magnitudes above 1000 W (e.g., 1400 W), create plasma voltages below 20 V at pressures above 5 milliTorr (mT), and plasma voltages below 10 V at pressures above 40 mT.
[0046] Figure 5 illustrates the floating voltage of the plasma for the condition of Figure 4. The potential at which the wafer resides is at or near Vf . Again, it can be seen that the substrate voltage (Vs) is the smallest for a grounded electrode plate, higher for an ungrounded electrode plate, and even higher when there is no electrode plate.
[0047] Figures 6 and 7 illustrate electron density and ion density, respectively. For a given magnitude of power applied to the RF coil 16, there is very little difference between the electron density (or the ion density), when using a grounded electrode plate and when using an ungrounded electrode plate. Although not shown, ion densities above 50 x 109 cm-3 are achievable when RF power above 1000 W is provided to the RF coil.
[0048] Figure 8 illustrates electron temperature. It can be seen that at lower pressures there is relatively little difference in electron temperatures when using a grounded, ungrounded, or no electrode plate. However, at higher pressures, typically above 40 mT, it can be seen that electron temperature is much higher when an ungrounded electrode plate is used, or when no electrode plate is used, than when a grounded electrode plate is used. [0049] Referring to Figures 9 and 10, the electrode plate 18 is laminated between two dielectric sheets 60 and 62. The electrode plate 18 and the dielectric sheets 60 and 62 are formed in strips 64 that, when folded toward one another, collectively define a dome shape. The dielectric sheet 60 is positioned at the top between the electrode plate 18 and the RF coil 16. The dielectric sheet 62 is located between the electrode plate 18 and the upper wall 38. Ends of the electrode plate are not covered by the dielectric sheet 62, to leave exposed lands 66. The exposed lands 66 contact a conductive portion of the conductive body 36, to ground the electrode plate 18 to the conductive body 36. The lands 66 are disposed on a perimeter of the electrode plate 18, so that the electrode plate 18 is peripherally grounded. Peripheral grounding of the electrode plate 18 ensures that the entire electrode plate 18 is as close to zero volts as possible. [0050] The plasma voltage can also be reduced by pulsing the RF power provided to the RF coil 16. In the examples that are now provided, the electrode plate 18 was not grounded, although it should be understood that the electrode plate 18 may be grounded in addition to pulsing of the RF power provided to the RF coil 16.
[0051] As illustrated in Figures 11 and 12, RF power having a frequency of 13.56 MHz and a predetermined peak power is provided to the RF coil 16. The RF power may be automatically switched on and off, i.e., "pulsed." In the examples that are provided, the RF power is automatically pulsed at a frequency of 10 kHz. In other examples, the RF power may be pulsed at frequencies between 1 kHz and 100 kHz. The composition of the nitrogen plasma is continuously varied by varying the RF current between high and low states. In Figure 11, the duty cycle, i.e., the total amount of time that the RF power is on, is 30%, and in Figure 12, the duty cycle is 50%. The RF source 50 is pulsing-enabled, and both the pulsing frequency and duty cycle are manually adjustable. The effective delivered power is the peak power times the duty cycle. In other examples, the duty cycle may be between 10% and 90%. In the given example, the amplitude of the RF power is continually altered between 0% and 100%, but in another example, the amplitude may, for example, be altered between 10% and 100%.
[0052] One way to measure incorporation of nitrogen is by measuring the thickness change ("optical delta") before and after a nitrogen plasma treatment. A larger thickness change indicates more nitrogen incorporation. As shown in Figure 13, the amount of incorporated nitrogen using continuous power can also be achieved using pulsed power, with the amount of incorporated nitrogen scaling approximately with the effective delivered power. The change in optical thickness is relatively insensitive to pulsing frequency. [0053] Figure 14 illustrates optical delta for samples prepared with continuous RF source power; the saturation in incorporated nitrogen with power is observed for both pulsed and continuous power. [0054] Figures 15 and 16 show the same data as in Figure 13, plotted against source power and duty cycle, showing the same trends as Figure 13. [0055] In Figures 17 and 18, optical emission spectra are captured with an optical emission spectrometer. As one increases the duty cycle at fixed-peak RF power (500 W), the spectra approach the 500 W continuous power spectra (top line), as can be seen in Figure 17. Pulsing frequency has a small effect on the observed intensity. Figure 18 shows that the pulsed RF emission level can be restored to the continuous-power emission level (top line) by increasing peak RF power. Again, the emission is relatively insensitive to pulsing frequency.
[0056] Figures 13 to 16 indicate that on-wafer nitrogen incorporation similar to the incorporation of continuous RF power is possible with pulsed-RF plasmas. Figures 17 and 18 indicate that plasmas of similar ion density to continuous-RF power plasmas can be achieved with pulsed-RF power. These data, coupled with the effect of pulsed-RF power to reduce the electron temperature and plasma potential relative to continuous power, indicate that the pulsing of RF power provides a method for incorporation of nitrogen into gate dielectric oxides at lower energy levels. While incorporating the same amount of nitrogen in the oxide, nitrogen ions in the pulsed plasmas are accelerated into the wafer less than ions in the continuous-power plasmas because of the lower plasma potentials of the pulsed plasmas. Because of this reduced acceleration, the nitrogen will not penetrate as far into the oxide and the underlying silicon. [0057] The simulation of ion implantation into silicon, specifically into Si(100), at various ion energies (10 eV to 30 eV), through a thin oxide layer shows less penetration for lower energy, as can be readily expected. Achieving nitrogen incorporation in such a low-energy fashion with the pulsed-nitrogen plasmas may provide for an improved dielectric that will lead directly to improvements in transistor performance.
[0058] In another embodiment of the invention, a nitrogen-containing plasma may be generated in a processing chamber via an ionizing source in communication with the processing chamber. The nitrogen-containing plasma may be used in a transistor gate nitridation process, i.e., the nitrogen- containing plasma may be used to nitridate a transistor gate dielectric layer. The ionizing source may, for example, include an inductive coil-type antenna configuration, as generally discussed above, a slotted line microwave-type ionizing source, which is also generally known as a radial line antenna source, an electronic cyclotron resonance source (ECR source), magnetron or modified magnetron-type sources, or other ionizing sources that may generally be used to facilitate plasma generation in a processing chamber. Further, in the present embodiment of the invention, the nitrogen-containing plasma may be controlled via a plasma-pulsing sequence to generate lower electron temperatures than provided by conventional plasma processing chambers. Specifically, the pulsed plasma control provided by the present embodiment of the invention may be used to specifically control the mean energy of the constituents of the plasma, which is generally referred to herein as the electron temperature. The control over the plasma is configured to provide a lower electron temperature, which, for example, may be used in gate nitridation processes to improve device characteristics, i.e., to provide less degradation in transconductance and improved channel mobility in gate dielectric-type devices.
[0059] The plasma pulsing sequence of the present invention generally operates to energize the nitrogen-containing plasma for a short period of time, and then allow the plasma to relax or dissipate for a period of time. The dissipation time period allows the electron temperature to decrease, while maintaining the nitrogen-containing plasma. Thus, embodiments of the invention will generally operate to pulse the ionizing source energy in an amount sufficient to maintain the plasma through the upcoming off or relax time, i.e., the pulse-on time is calculated to provide sufficient energy to the plasma to maintain the plasma through an upcoming off or relax time where energy is not being provided to the plasma. During the off or relax portion of the ionizing source pulses, the electrons in the plasma diffuse freely. However, it is known that how fast the electrons diffuse is directly related to the electron energy. Therefore, the higher energy electrons, i.e., the hotter electrons, will diffuse more rapidly out of the plasma than electrons having lower energy, which results in a lower mean energy of the constituents of the plasma, i.e., a lower electron temperature and a lower-temperature plasma. [0060] Therefore, the duty cycle of the pulses provided by the ionized source also has an effect upon the mean temperature of the constituents of the plasma. In particular, greater duty cycles, which correspond to longer pulse-on times, generate hotter plasmas, as the electrons in the plasma are being excited for a longer period of time during the pulse-on time. Therefore, embodiments of the invention generally contemplate that the duty cycle of the plasma ionizing pulses may be between about 5% and about 90%. More particularly, the duty cycle may be between about 10% and about 80%, between about 25% and about 60%, and between about 30% and about 50%, for example, in order to generate the desired mean temperature of the constituents of the plasma. Further, embodiments of the invention contemplate that the ionized plasma source may be used in a pseudo-pulsing manner to control the electron temperature. For example, as an alternative to pulsing, the output of the ionized source may be varied between about 5% and about 100% to control the plasma temperature. Generally, embodiments of the invention contemplate optimizing the on and off time of the pulse to control the electron temperature. [0061] As an example of an embodiment of the present invention, Figure 21 illustrates a plot of the electron temperature versus the pulsed RF frequency for a plasma-processing chamber utilizing an ionizing source to generate the plasma. The date was obtained using an inductive coil configuration ionizing source, as discussed above, using matched ion densities, power applications, chamber pressures, and processing gas flows. A first data point 1901 generally represents the electron temperature at the time of plasma initiation with no pulsing. At the first data point 1901, the power supplied to the ionizing source is constant and does not vary or pulse, and therefore, the electron temperature was measured to be 2 eV once the plasma was stabilized. A second data point 1902 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 500 kHz. At this frequency, the electron temperature was measured to be approximately 0.6 eV. A third data point 1903 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 5 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV. A fourth data point 1904 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 10 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV. A fourth data point 1904 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 10 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV. A fifth data point 1905 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 30 kHz. At this frequency, the electron temperature was measured to be approximately 0.55 eV. A sixth data point 1906 illustrates the electron temperature of the plasma when the power to the ionizing source was pulsed at a frequency of 50 kHz. At this frequency, the electron temperature was measured to be approximately 1.25 eV.
[0062] Therefore, Figure 21 generally illustrates that the implementation of a pulsed plasma operates to control the electron temperature of the plasma. Further, Figure 21 generally illustrates that the frequency of the power applied to the ionizing source may be varied between about 500 Hz and about 50 kHz, while still maintaining an electron temperature of less than 0.6 eV ("broadcasting problems" occur at approximately 100 kHz). Further still, when the frequency is increased up to about 50 kHz, the electron temperature is still less than about 1.25 eV. As such, embodiments of the present invention generally use an ionizing source to pulse the plasma in order to control the electron temperature of the plasma, and more specifically, in order to maintain the electron temperature of the plasma at less than about 0.7 eN. In particular, embodiments of the present invention provide an ionizing source configured to pulse a plasma in a processing chamber at a frequency of between about 1 kHz and about 30 kHz, while maintaining an electron temperature of less than about 0.6 eN. However, it is noted that although the data points in Figure 21 were obtained using specific parameters, i.e., RF power, pressure, gas flow, etc., the relationship between the electron temperature using continuous-wave plasma and the electron temperature using a pulsed plasma is such that the electron temperature for the pulsed plasma is always less than the electron temperature for a continuous-wave plasma, regardless of the ancillary parameters.
[0063] Figure 22 illustrates data representative of a change in the maximum channel transconductance (gmmax) as a function of the percentage of nitrogen in the film. It should be noted that in transistor fabrication the lowest possible change or shift transconductance is desired; however, nitrogen is generally introduced into the transistor fabrication process, as it is known to reduce transistor gate leakage, prevent diffusion of boron from the polysilicon gate electrode, and reduce the electrical thickness, which provides improved off- state control. Therefore, although the maximum channel transconductance shift may be reduced by eliminating the nitrogen, the elimination of the nitrogen would adversely affect the gate leakage, diffusion, and the off-state control dramatically. As such, the present invention operates to reduce the maximum channel transconductance shift, while maintaining the nitrogen and the benefits provided by the nitrogen content.
[0064] Specifically, Figure 22 illustrates the difference in maximum channel transconductance for a nitrogen-containing plasma generated via a continuous- wave configuration versus an ionizing source configured to pulse the nitrogen- containing plasma. Each of the data points for the continuous-wave configuration and the ionizing source configured to pulse the plasma were collected using matching pressures, powers, durations, and duty cycles (50%), as indicated by the graph legend. For example, data points 2001 represent the relationship between the maximum channel transconductance shift and the nitrogen percentage for a continuous-wave configuration. Data points 2001 illustrate a maximum channel transconductance shift of between about 18.5 and about 19.5 for a nitrogen content of about 12.8 percent. Data points 2002, which generally represent an ionized source used to pulse the nitrogen- containing plasma at a frequency of about 5 kHz, generally illustrate maximum channel transconductance shift values between about 17.5 and about 18.25 and a nitrogen content of about 13.2 percent. Data points 2003, which generally represent an ionized source used to pulse the nitrogen-containing plasma at a frequency of about 10 kHz, generally illustrate maximum channel transconductance shift values between about 18.0 and 18.25 and a nitrogen content of about 13.9 percent. Data points 2004, which generally represent an ionized source used to pulse the nitrogen-containing plasma at a frequency of about 20 kHz, generally illustrate maximum channel transconductance shift values between about 17.25 and 17.75 and a nitrogen content of about 13.8 percent. Data points 2005, which generally represent an ionized source used to pulse the nitrogen-containing plasma at a frequency of about 100 kHz, generally illustrate maximum channel transconductance shift values between about 16.25 and 17.0 and a nitrogen content of about 13.3 percent. Generally, the data points utilizing the ionized source configured to pulse the nitrogen- containing plasma, i.e., data points 2002, 2003, 2004, and 2005, provide improved maximum channel transconductance characteristics over nitrogen- containing plasmas generated via a continuous wave-type configuration. [0065] Similar improvements to the improvements in the change in gmmax represented in Figure 22 are also obtained for threshold voltage shift and saturation drain current. Figure 22 illustrates results for an NMOS transistor. As illustrated in Figure 23, similar improvements can be obtained for a PMOS transistor.
[0066] It should be noted that although nitrogen incorporation into a thin gate silicon dioxide has been described, the described processes may have applications for nitrogen incorporation in other gate dielectric materials, in particular, high-k dielectric materials such as Hfθ2, Hfι-X, or Six02. [0067] Further, although pulsing of ion energy has been described with respect to an inductive coil ionizing source, another embodiment may, for example make use of a radial line slotted antenna ionizing source, a magnetron-type source, or an electron cyclotron resonance ionizing source. [0068] While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive of the current invention, and that this invention is not restricted to the specific constructions and arrangements shown and described since modifications may occur to those ordinarily skilled in the art.

Claims

CLAIMSWhat is claimed:
1. A method of processing a substrate, comprising: creating a nitrogen-containing plasma in the chamber, the plasma having an ion density of at least 1010 cm:3 and a plasma potential of less than 20 N; and exposing a layer on the substrate to the plasma to incorporate nitrogen of the plasma into the layer on the substrate.
2. The method of claim 1, wherein the plasma has an electron temperature of less than 2 eN.
3. The method of claim 1, wherein the layer is silicon dioxide.
4. The method of claim 1, wherein RF current is provided to a coil located externally adjacent to a dielectric wall of the chamber, the coil creating an RF field in the chamber, the RF field creating the plasma.
5. The method of claim 4, wherein an electrode is positioned between the coil and the dielectric wall, the electrode being grounded.
6. The method of claim 5, wherein the electrode reduces the plasma potential to less than 10 V.
7. The method of claim 6, wherein the wall is dome-shaped, the coil spirals around an axis through the wall, and the electrode has an opening therein.
8. The method of claim 7, wherein the opening is within the perimeter described by the coil.
9. The method of claim 4, wherein the amplitude of the RF current is varied between high and low states.
10. The method of claim 9, wherein effective RF power applied to the coil is between 100 and 3000 W.
11. The method of claim 10, wherein a pressure in the chamber is at least 5 mT, RF power is at least 1000W, and ion density is at least 5 x 1010 cm-3.
12. The method of claim 11, wherein the pressure is at least 40 mT and the plasma voltage is less than 10 V.
13. The method of claim 9, wherein the RF current is pulsed at a duty cycle of between 10 and 90%.
14. The method of claim 9, wherein the RF current is pulsed at a frequency between 1 kHz and 100 kHz.
15. A method of processing a substrate, comprising: locating the substrate in a plasma-processing chamber; flowing a nitrogen-containing gas into the chamber; providing RF current to a coil to generate an RF field in the chamber, the RF field creating a nitrogen-containing RF plasma out of the gas, the amplitude of the RF current being varied between high and low states; and incorporating nitrogen from the plasma into a layer formed on the substrate.
16. The method of claim 15, wherein the composition of the nitrogen- containing plasma is varied by pulsing of the RF current.
17. A method of processing a substrate, comprising: locating the substrate in a plasma-processing chamber; flowing a nitrogen-containing gas into the chamber; providing RF current to a coil located externally adjacent to a dielectric wall of the chamber, an electrode plate being located between the coil and the dielectric wall and being at a voltage below 20 V, the RF field creating an RF plasma out of the gas; and incorporating nitrogen ions of the plasma into a layer on the substrate.
18. The method of claim 17, wherein the electrode plate is grounded.
19. The method of claim 17, wherein a pressure in the chamber is at least 5 mT, RF power applied to the coil is at least 1000 W, a potential of the plasma is less than 20 V, and ion density is at least 5 x 1010 cm-3.
20. The method of claim 19, wherein the pressure is at least 40 mT, and the potential of the plasma is less than 10 V.
21. A plasma reactor, comprising: a chamber, having an opening to transfer a substrate into an internal volume of the chamber; a substrate holder in the chamber for holding the substrate; an RF coil externally and adjacent to a nonconductive wall of the chamber; and an electrode plate between the wall and the RF coil, the electrode plate being at a voltage below 20 V when RF current is provided to the RF coil.
22. The plasma reactor of claim 21, wherein the electrode plate is grounded.
23. The plasma reactor of claim 22, wherein the electrode plate is grounded through the chamber.
24. The plasma reactor of claim 23, wherein the wall is made of quartz.
25. The plasma reactor of claim 22, wherein the electrode plate is peripherally grounded.
26. The plasma reactor of claim 25, wherein the wall has a dome shape and the electrode plate has a dome shape positioned over the dome shape of the wall.
27. The plasma reactor of claim 26, wherein the electrode plate has a plurality of fingers, each contacting a conductive portion of the chamber.
28. A plasma reactor, comprising: a chamber, having an opening to transfer a substrate into an internal volume of the chamber; a substrate holder in the chamber for holding the substrate; an RF coil externally and adjacent to a nonconductive wall of the chamber; and an RF source connected to the RF coil, the RF source being capable of automatically varying an amplitude of RF current provided to the RF coil.
29. A plasma reactor, comprising: a chamber, having an opening to transfer a substrate into an internal volume of the chamber; a substrate holder in the chamber for holding the substrate; an RF coil externally and adjacent to a wall of the chamber; and a grounded electrode plate between the wall and the RF coil.
30. A method of forming a nitride gate dielectric layer, comprising: generating a nitrogen-containing plasma in a processing chamber via introduction of a nitrogen-containing processing gas or gas mixtures into the processing chamber and the application of an ionizing energy to the processing gas; and pulsing the ionizing energy to maintain a mean temperature of electrons in the nitrogen-containing plasma of less than about 0.7 eV.
31. The method of claim 30, wherein pulsing the ionizing energy comprises at least one of varying a duty cycle of the pulses between about 5% and about 50% and varying an ionizing power between about 5% and about 100%.
32. The method of claim 30, wherein pulsing the ionizing energy comprises using at least one of an inductive coil ionizing source, a radial line slotted antenna ionizing source, modified magnetron-type sources, and an electron cyclotron resonance ionizing source.
33. A method of controlling a mean energy of constituents of a nitrogen- containing plasma used to nitridate a gate dielectric layer, comprising pulsing an ionizing source used to maintain the nitrogen-containing plasma for a first duration sufficient to energize the nitrogen-containing plasma and turning off the ionizing source; and allowing the constituents of the nitrogen-containing plasma to dissipate for a second duration, and the second duration being calculated to generate an electron temperature of the nitrogen-containing plasma of less than about 0.7 eV.
34. The method of claim 33, wherein pulsing the ionizing energy comprises at least one of varying a duty cycle of the pulses between about 5% and about 50% and varying an ionizing power between about 5% and about 100%.
35. The method of claim 33, wherein pulsing the ionizing energy comprises using at least one of an inductive coil ionizing source, a radial line slotted antenna ionizing source, modified magnetron-type sources, and an electron cyclotron resonance ionizing source.
36. A method of processing a substrate, comprising: inserting the substrate into a processing chamber; generating a nitrogen-containing plasma in a processing chamber via introduction of a nitrogen-containing processing gas or gas mixtures into the processing chamber and the application of an ionizing energy to the processing gas; pulsing the ionizing energy to maintain a mean temperature of electrons in the nitrogen-containing plasma of less than about 0.7 eV, nitrogen of the plasma incorporating into a gate dielectric layer on the substrate; and removing the substrate from the processing chamber.
PCT/US2003/018784 2002-06-12 2003-06-12 Plasma method and apparatus for processing a substrate WO2003107382A2 (en)

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Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7067439B2 (en) * 2002-06-14 2006-06-27 Applied Materials, Inc. ALD metal oxide deposition process using direct oxidation
JP2004095918A (en) * 2002-08-30 2004-03-25 Fasl Japan Ltd Semiconductor memory device and its manufacturing method
WO2004044898A2 (en) * 2002-11-08 2004-05-27 Aviza Technology, Inc. Nitridation of high-k dielectrics
US7179754B2 (en) * 2003-05-28 2007-02-20 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
TW200511430A (en) * 2003-05-29 2005-03-16 Tokyo Electron Ltd Plasma processing apparatus and plasma processing method
US20050205211A1 (en) * 2004-03-22 2005-09-22 Vikram Singh Plasma immersion ion implantion apparatus and method
US20050252449A1 (en) * 2004-05-12 2005-11-17 Nguyen Son T Control of gas flow and delivery to suppress the formation of particles in an MOCVD/ALD system
US8119210B2 (en) * 2004-05-21 2012-02-21 Applied Materials, Inc. Formation of a silicon oxynitride layer on a high-k dielectric material
US7464271B2 (en) * 2004-10-04 2008-12-09 Sony Corporation Systems and methods of providing content protection for digital video products
US7235492B2 (en) * 2005-01-31 2007-06-26 Applied Materials, Inc. Low temperature etchant for treatment of silicon-containing surfaces
US7214628B2 (en) * 2005-02-02 2007-05-08 Applied Materials, Inc. Plasma gate oxidation process using pulsed RF source power
US7141514B2 (en) * 2005-02-02 2006-11-28 Applied Materials, Inc. Selective plasma re-oxidation process using pulsed RF source power
US7429538B2 (en) * 2005-06-27 2008-09-30 Applied Materials, Inc. Manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric
US20070010103A1 (en) * 2005-07-11 2007-01-11 Applied Materials, Inc. Nitric oxide reoxidation for improved gate leakage reduction of sion gate dielectrics
US20070020890A1 (en) * 2005-07-19 2007-01-25 Applied Materials, Inc. Method and apparatus for semiconductor processing
US7402534B2 (en) * 2005-08-26 2008-07-22 Applied Materials, Inc. Pretreatment processes within a batch ALD reactor
US20080011426A1 (en) * 2006-01-30 2008-01-17 Applied Materials, Inc. Plasma reactor with inductively coupled source power applicator and a high temperature heated workpiece support
US7964514B2 (en) 2006-03-02 2011-06-21 Applied Materials, Inc. Multiple nitrogen plasma treatments for thin SiON dielectrics
US7678710B2 (en) 2006-03-09 2010-03-16 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7645710B2 (en) * 2006-03-09 2010-01-12 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7837838B2 (en) * 2006-03-09 2010-11-23 Applied Materials, Inc. Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
US20070252299A1 (en) * 2006-04-27 2007-11-01 Applied Materials, Inc. Synchronization of precursor pulsing and wafer rotation
US7798096B2 (en) * 2006-05-05 2010-09-21 Applied Materials, Inc. Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool
WO2008039845A2 (en) * 2006-09-26 2008-04-03 Applied Materials, Inc. Fluorine plasma treatment of high-k gate stack for defect passivation
US20080230008A1 (en) * 2007-03-21 2008-09-25 Alexander Paterson Plasma species and uniformity control through pulsed vhf operation
US7846793B2 (en) * 2007-10-03 2010-12-07 Applied Materials, Inc. Plasma surface treatment for SI and metal nanocrystal nucleation
US7871942B2 (en) 2008-03-27 2011-01-18 Applied Materials, Inc. Methods for manufacturing high dielectric constant film
US7659158B2 (en) 2008-03-31 2010-02-09 Applied Materials, Inc. Atomic layer deposition processes for non-volatile memory devices
WO2009141982A1 (en) * 2008-05-19 2009-11-26 株式会社 東芝 Linear white light source, and backlight and liquid crystal display device using linear white light source
US8491967B2 (en) * 2008-09-08 2013-07-23 Applied Materials, Inc. In-situ chamber treatment and deposition process
US20100062149A1 (en) 2008-09-08 2010-03-11 Applied Materials, Inc. Method for tuning a deposition rate during an atomic layer deposition process
KR101139824B1 (en) * 2009-12-11 2012-04-30 최대규 Plasma reactor for generating large size plasma
US8880227B2 (en) * 2010-05-27 2014-11-04 Applied Materials, Inc. Component temperature control by coolant flow control and heater duty cycle control
CN103165431B (en) * 2011-12-19 2016-08-31 中芯国际集成电路制造(上海)有限公司 Gate dielectric layer and the forming method of MOS transistor
US9837562B2 (en) * 2013-02-28 2017-12-05 Nanyang Technological University Capacitively coupled electrodeless plasma apparatus and a method using capacitively coupled electrodeless plasma for processing a silicon substrate
US9177787B2 (en) * 2013-03-15 2015-11-03 Applied Materials, Inc. NH3 containing plasma nitridation of a layer of a three dimensional structure on a substrate
US10510545B2 (en) 2016-06-20 2019-12-17 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
US10103027B2 (en) 2016-06-20 2018-10-16 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
US10276411B2 (en) 2017-08-18 2019-04-30 Applied Materials, Inc. High pressure and high temperature anneal chamber
US10170322B1 (en) * 2017-11-16 2019-01-01 Taiwan Semiconductor Manufacturing Co., Ltd. Atomic layer deposition based process for contact barrier layer
SG11202008268RA (en) 2018-03-19 2020-10-29 Applied Materials Inc Methods for depositing coatings on aerospace components
EP3784815A4 (en) 2018-04-27 2021-11-03 Applied Materials, Inc. Protection of components from corrosion
US11009339B2 (en) 2018-08-23 2021-05-18 Applied Materials, Inc. Measurement of thickness of thermal barrier coatings using 3D imaging and surface subtraction methods for objects with complex geometries
WO2020219332A1 (en) 2019-04-26 2020-10-29 Applied Materials, Inc. Methods of protecting aerospace components against corrosion and oxidation
US11794382B2 (en) 2019-05-16 2023-10-24 Applied Materials, Inc. Methods for depositing anti-coking protective coatings on aerospace components
US11697879B2 (en) 2019-06-14 2023-07-11 Applied Materials, Inc. Methods for depositing sacrificial coatings on aerospace components
US11466364B2 (en) 2019-09-06 2022-10-11 Applied Materials, Inc. Methods for forming protective coatings containing crystallized aluminum oxide
WO2021150625A1 (en) 2020-01-23 2021-07-29 Applied Materials, Inc. Method of cleaning a structure and method of depositiing a capping layer in a structure
US11519066B2 (en) 2020-05-21 2022-12-06 Applied Materials, Inc. Nitride protective coatings on aerospace components and methods for making the same
WO2022005696A1 (en) 2020-07-03 2022-01-06 Applied Materials, Inc. Methods for refurbishing aerospace components

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5928528A (en) * 1996-09-03 1999-07-27 Matsushita Electric Industrial Co., Ltd. Plasma treatment method and plasma treatment system
US6110842A (en) * 1996-06-07 2000-08-29 Texas Instruments Incorporated Method of forming multiple gate oxide thicknesses using high density plasma nitridation
US6136654A (en) * 1996-06-07 2000-10-24 Texas Instruments Incorporated Method of forming thin silicon nitride or silicon oxynitride gate dielectrics
EP1071120A2 (en) * 1999-07-23 2001-01-24 Applied Materials, Inc. Method for providing pulsed plasma during a portion of a semiconductor wafer process
WO2001013403A1 (en) * 1999-07-12 2001-02-22 Applied Materials, Inc. Inductively coupled plasma process chamber with shield electrode interposed between antenna and dielectric window
US6251761B1 (en) * 1998-11-24 2001-06-26 Texas Instruments Incorporated Process for polycrystalline silicon gates and high-K dielectric compatibility
US6309978B1 (en) * 1998-07-22 2001-10-30 Micron Technology, Inc. Beat frequency modulation for plasma generation
US20030075522A1 (en) * 2001-09-28 2003-04-24 Unaxis Balzers Aktiengesellschaft Procedure and device for the production of a plasma

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5020411A (en) * 1989-03-06 1991-06-04 Larry Rowan Mobile assault logistic kinetmatic engagement device
EP0847079A3 (en) * 1996-12-05 1999-11-03 Texas Instruments Incorporated Method of manufacturing an MIS electrode
JPH11102895A (en) * 1997-09-29 1999-04-13 Fujitsu Ltd Manufacture of semiconductor device
KR100265866B1 (en) * 1998-07-11 2000-12-01 황철주 Apparatus for manufacturing semiconductor device
JP4255563B2 (en) * 1999-04-05 2009-04-15 東京エレクトロン株式会社 Semiconductor manufacturing method and semiconductor manufacturing apparatus
JP2001044419A (en) * 1999-07-14 2001-02-16 Texas Instr Inc <Ti> Formation method for gate lamination having high k dielectric
TW480554B (en) * 1999-07-22 2002-03-21 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
US6541294B1 (en) * 1999-07-22 2003-04-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
EP1912253A3 (en) * 2000-03-13 2009-12-30 OHMI, Tadahiro Method of forming a dielectric film

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6110842A (en) * 1996-06-07 2000-08-29 Texas Instruments Incorporated Method of forming multiple gate oxide thicknesses using high density plasma nitridation
US6136654A (en) * 1996-06-07 2000-10-24 Texas Instruments Incorporated Method of forming thin silicon nitride or silicon oxynitride gate dielectrics
US5928528A (en) * 1996-09-03 1999-07-27 Matsushita Electric Industrial Co., Ltd. Plasma treatment method and plasma treatment system
US6309978B1 (en) * 1998-07-22 2001-10-30 Micron Technology, Inc. Beat frequency modulation for plasma generation
US6251761B1 (en) * 1998-11-24 2001-06-26 Texas Instruments Incorporated Process for polycrystalline silicon gates and high-K dielectric compatibility
WO2001013403A1 (en) * 1999-07-12 2001-02-22 Applied Materials, Inc. Inductively coupled plasma process chamber with shield electrode interposed between antenna and dielectric window
EP1071120A2 (en) * 1999-07-23 2001-01-24 Applied Materials, Inc. Method for providing pulsed plasma during a portion of a semiconductor wafer process
US20030075522A1 (en) * 2001-09-28 2003-04-24 Unaxis Balzers Aktiengesellschaft Procedure and device for the production of a plasma

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 09, 30 July 1999 (1999-07-30) & JP 11 102895 A (FUJITSU LTD), 13 April 1999 (1999-04-13) *

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