WO2004001807B1 - Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs - Google Patents

Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs

Info

Publication number
WO2004001807B1
WO2004001807B1 PCT/US2003/019963 US0319963W WO2004001807B1 WO 2004001807 B1 WO2004001807 B1 WO 2004001807B1 US 0319963 W US0319963 W US 0319963W WO 2004001807 B1 WO2004001807 B1 WO 2004001807B1
Authority
WO
WIPO (PCT)
Prior art keywords
probe
test apparatus
substrate
chip substrate
probe chip
Prior art date
Application number
PCT/US2003/019963
Other languages
French (fr)
Other versions
WO2004001807A2 (en
WO2004001807A3 (en
Inventor
Sammy Mok
Fu-Chiung Chong
Frank Swiatowiec
Syamal Kumar Lahiri
Joseph Michael Haemer
Original Assignee
Nanonexus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanonexus Inc filed Critical Nanonexus Inc
Priority to KR10-2004-7021199A priority Critical patent/KR20050014885A/en
Priority to AU2003272205A priority patent/AU2003272205A1/en
Priority to JP2004516216A priority patent/JP2006507479A/en
Priority to EP03754376A priority patent/EP1549962A4/en
Publication of WO2004001807A2 publication Critical patent/WO2004001807A2/en
Publication of WO2004001807A3 publication Critical patent/WO2004001807A3/en
Publication of WO2004001807B1 publication Critical patent/WO2004001807B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06716—Elastic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/10—Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1053—Plug-in assemblages of components, e.g. IC sockets having interior leads
    • H05K7/1061—Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by abutting
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06716—Elastic
    • G01R1/06727—Cantilever beams
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889—Interfaces, e.g. between probe and tester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S439/00—Electrical connectors
    • Y10S439/912—Electrical connectors with testing means

Abstract

Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates. Alternate card assembly structures comprise a compliant carrier structure, such as a decal or screen, which is adhesively attached to the probe chip substrate.

Claims

87AMENDED CLAIMS[(received by the International Bureau on 10 December 2004 (10.12.04); original claims 1-179 replaced by new claims 1-30 (5 pages)]
1. A test apparatus for at least one integrated circuit device, comprising: a m otherboard substrate h aving a bottom surface and a top s urface, and a plurality of electrical conductors extending from the bottom surface to the top surface; a probe chip substrate comprising a probe surface and a connector surface, a plurality of probe springs on the probe surface, a. plurality of electrical contacts on the connector surface, and a plurality of probe chip electrical connections, wherein each of the probe springs is electrically connected to at least one contact through at least one probe chip electrical connection; at least one intermediate connector located between the motherboard substrate and the probe chip substrate, the intermediate connector comprising at least one electrically conductive connection between each of the plurality of electrical contacts on the probe chip substrate and each of the electrical conductors on the bottom surface of the motherboard substrate; wherein the probe chip substrate is supported from the connector surface and positioned in relation to the motherboard substrate.
2. The test apparatus of Claim 1 , wherein the plurality of probe springs comprises a fixed portion attached to the probe chip substrate and a free portion, initially attached to the probe chip substrate, which upon release, extend away from the probe chip substrate as a result of an inherent stress gradient between a plurality of layers within each of the probe springs.
3. The test apparatus of Claim 1 , wherein the plurality of probe springs comprises probe tips fabricated using batch mode thin film or MEMS processes.
4. The test apparatus of Claim 1 , wherein the plurality of probe springs comprises flexible, compliant, electrically conductive contact structures. 88
5. T he test apparatus of Claim 1 , wherein the p lurality of p robe springs i s photolithographically patterned.
6. The test apparatus of claim 1 , wherein the probe chip substrate is supported from the connector surface and positioned in relation to the motherboard substrate by fixedly attaching the contacts on the connector surface of the probe chip substrate to the at least one intermediate connector.
7. The test apparatus of Claim 6, wherein the means for fixedly attaching the contacts on the connector surface of the probe chip substrate to the at least one intermediate connector comprises a solder ball array.
8. The test apparatus of Claim 6, wherein the means for fixedly attaching the contacts on the connector surface of the probe chip substrate to the at least one intermediate connector comprises solder joints.
9. The test apparatus of claim 1 , wherein the probe chip substrate is supported from the connector surface and positioned relative to the motherboard substrate by a probe chip carrier comprising a compliant member fixedly attached to the outer periphery of the connector surface of the probe chip substrate.
10. The test apparatus of Claim 9, wherein the compliant member is a film.
1 1. The test apparatus of Claim 10, wherein the film comprises polyimide.
12. The test apparatus of Claim 1 , further comprising: a stiffener plate, fabricated from a rigid material, fixedly attached to the top surface of the motherboard substrate.
13. The test apparatus of Claim 12, wherein the stiffener plate comprises stainless steel. 89
14. The test apparatus of Claim 12, wherein at least one component recess is defined in the stiffener plate proximate the top surface of the motherboard substrate, and wherein the apparatus further comprises: at least one component extending from the motherboard substrate within the component recess.
15. The test apparatus of Claim 1 , wherein the at least one intermediate connector comprises an interposer having a first plurality of compliant electrical contacts on a first surface and a second plurality of compliant electrical contacts on a second surface opposite the first surface.
16. The test apparatus of Claim 1 , further comprising: at least one standoff fixedly a ttached to the connector surface of the probe chip substrate.
17. The test apparatus of Claim 1 , further comprising: at least one component incorporated as an assembled component on the probe chip substrate.
18. The test apparatus of Claim 17, wherein the at least one component is mounted on either t he connector surface o r t he p robe s urface of t he p robe chip substrate.
19. The test a pparatus of C laim 14 or C laim 1 7, wherein the at least one component is a capacitor.
20. The test apparatus of Claim 1 , further comprising: a planarity adjustment mechanism in which the planarity of the probe spring contact tips on the probe chip is adjustable relative to the motherboard substrate.
21. The test apparatus of Claim 1 , wherein the at least one intermediate connector comprises a printed wiring board, and wherein the plurality of electrically conductive connections comprise vias having means for electrical 90
connection to the probe chip substrate and means for electrical connection to the motherboard substrate.
22. The test apparatus of Claim 1 or Claim 21 , wherein the means for electrical connection to any of the motherboard substrate and the probe chip substrate comprises an interposer.
23. The test apparatus of Claim 1 , wherein the at least one intermediate connector comprises a Z-block, comprising a vertical translation substrate having a lower surface and an upper surface, and a plurality of electrically conductive connections which extend from the lower surface to the upper surface thereof, each of the electrically conductive connections comprising at least one electrically conductive via.
24. The test apparatus of Claim 23, further comprising an interposer between the Z-block and any of the probe chip substrate and the motherboard substrate.
25. The test apparatus of Claim 1 , wherein the probe chip substrate is attached to the at least one intermediate connector, thereby providing mechanical structural support for the plurality of probe springs on the probe chip substrate.
26. The test apparatus of Claim 1 or Claim 25, wherein any of the probe chip substrate and the at least one intermediate connector is fabricated at least in part from a material selected from a group consisting of ceramic, glass, quartz, silicon, organic board, multi-layer ceramic or combinations thereof.
27. The test apparatus of Claim 1 , Claim 25, or Claim 26, wherein any of the probe chip substrate and the at least one intermediate connector further comprises a plurality of holes therethrough, and wherein each connection of the plurality of probe chip substrate and intermediate connector electrical connections is at least one electrically conductive via located within at least one hole of the plurality of holes. 91
28. The test apparatus of Claim 27, wherein the plurality of holes through the probe chip substrate or the at least one intermediate connector are fabricated using laser or mechanical drilling processes.
29. The test apparatus of Claim 1 , wherein any of the motherboard substrate, the at least one intermediate connector, and the probe chip substrate further comprises at least one electrically conducting path with matched impedance.
30. The test apparatus of Claim 1 , wherein the at least one intermediate connector is a standardized component and wherein the probe chip substrate is produced based on a received interconnection specification containing electrical interconnection locations for the at least one device, the plurality of probe springs on the probe surface corresponding to the electrical interconnection locations.
PCT/US2003/019963 2002-06-24 2003-06-23 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs WO2004001807A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR10-2004-7021199A KR20050014885A (en) 2002-06-24 2003-06-23 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs
AU2003272205A AU2003272205A1 (en) 2002-06-24 2003-06-23 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs
JP2004516216A JP2006507479A (en) 2002-06-24 2003-06-23 Structure and manufacturing process of probe card assembly and package with wafer level spring
EP03754376A EP1549962A4 (en) 2002-06-24 2003-06-23 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/178,103 US6917525B2 (en) 2001-11-27 2002-06-24 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs
US10/178,103 2002-06-24

Publications (3)

Publication Number Publication Date
WO2004001807A2 WO2004001807A2 (en) 2003-12-31
WO2004001807A3 WO2004001807A3 (en) 2004-12-23
WO2004001807B1 true WO2004001807B1 (en) 2005-02-03

Family

ID=29999116

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/019963 WO2004001807A2 (en) 2002-06-24 2003-06-23 Construction structures and manufacturing processes for probe card assemblies and packages having wafer level springs

Country Status (8)

Country Link
US (1) US6917525B2 (en)
EP (1) EP1549962A4 (en)
JP (1) JP2006507479A (en)
KR (1) KR20050014885A (en)
CN (1) CN1662820A (en)
AU (1) AU2003272205A1 (en)
TW (1) TW200409582A (en)
WO (1) WO2004001807A2 (en)

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