WO2004003755A3 - A method and apparatus for interconnecting content addressable memory devices - Google Patents

A method and apparatus for interconnecting content addressable memory devices Download PDF

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Publication number
WO2004003755A3
WO2004003755A3 PCT/CA2003/000968 CA0300968W WO2004003755A3 WO 2004003755 A3 WO2004003755 A3 WO 2004003755A3 CA 0300968 W CA0300968 W CA 0300968W WO 2004003755 A3 WO2004003755 A3 WO 2004003755A3
Authority
WO
WIPO (PCT)
Prior art keywords
cam
host controller
send signal
memory devices
addressable memory
Prior art date
Application number
PCT/CA2003/000968
Other languages
French (fr)
Other versions
WO2004003755A2 (en
Inventor
Oswald Becca
Alan Roth
Robert Mckenzie
Original Assignee
Mosaid Technologies Inc
Oswald Becca
Alan Roth
Robert Mckenzie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mosaid Technologies Inc, Oswald Becca, Alan Roth, Robert Mckenzie filed Critical Mosaid Technologies Inc
Priority to AU2003280472A priority Critical patent/AU2003280472A1/en
Publication of WO2004003755A2 publication Critical patent/WO2004003755A2/en
Publication of WO2004003755A3 publication Critical patent/WO2004003755A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/903—Querying
    • G06F16/90335—Query processing
    • G06F16/90339—Query processing by using parallel associative memories or content-addressable memories

Abstract

A cam system comprising a plurality of CAM devices connected in a serial cascade arrangement, the CAMS in the cascade being connected to an adjacent CAM by a respective forwarding bus, with at most a first CAM in the cascade being connected to a receive data signals from a host controller and at most a last CAM devices being coupled to forward results back to the host controller; and a send signal generation means for supplying a SEND signal to the last CAM; the SEND signal for co-ordinating transfer of the search result from the last CAM to the host controller, the serial cascade arrangement minimising the number of CAMs being connected to a common forwarding bus.
PCT/CA2003/000968 2002-06-28 2003-06-26 A method and apparatus for interconnecting content addressable memory devices WO2004003755A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003280472A AU2003280472A1 (en) 2002-06-28 2003-06-26 A method and apparatus for interconnecting content addressable memory devices

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US39194102P 2002-06-28 2002-06-28
US60/391,941 2002-06-28
US10/430,378 US7062601B2 (en) 2002-06-28 2003-05-07 Method and apparatus for interconnecting content addressable memory devices
US10/430,378 2003-05-07

Publications (2)

Publication Number Publication Date
WO2004003755A2 WO2004003755A2 (en) 2004-01-08
WO2004003755A3 true WO2004003755A3 (en) 2004-05-13

Family

ID=29782651

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CA2003/000968 WO2004003755A2 (en) 2002-06-28 2003-06-26 A method and apparatus for interconnecting content addressable memory devices

Country Status (3)

Country Link
US (2) US7062601B2 (en)
AU (1) AU2003280472A1 (en)
WO (1) WO2004003755A2 (en)

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US20070165457A1 (en) * 2005-09-30 2007-07-19 Jin-Ki Kim Nonvolatile memory system
US7652922B2 (en) 2005-09-30 2010-01-26 Mosaid Technologies Incorporated Multiple independent serial link memory
US7610441B2 (en) 2005-11-10 2009-10-27 Broadcom Corporation Multiple mode content-addressable memory
US7346731B2 (en) * 2006-03-20 2008-03-18 Texas Instruments Incorporated High performance and scalable width expansion architecture for fully parallel CAMs
US8335868B2 (en) * 2006-03-28 2012-12-18 Mosaid Technologies Incorporated Apparatus and method for establishing device identifiers for serially interconnected devices
US8364861B2 (en) * 2006-03-28 2013-01-29 Mosaid Technologies Incorporated Asynchronous ID generation
TWI448901B (en) * 2006-03-28 2014-08-11 Mosaid Technologies Inc Nonvolatile memory system
US8069328B2 (en) * 2006-03-28 2011-11-29 Mosaid Technologies Incorporated Daisy chain cascade configuration recognition technique
US7551492B2 (en) 2006-03-29 2009-06-23 Mosaid Technologies, Inc. Non-volatile semiconductor memory with page erase
JP5214587B2 (en) 2006-03-31 2013-06-19 モスエイド テクノロジーズ インコーポレイテッド Flash memory system control scheme
EP2487794A3 (en) 2006-08-22 2013-02-13 Mosaid Technologies Incorporated Modular command structure for memory and memory system
US7904639B2 (en) 2006-08-22 2011-03-08 Mosaid Technologies Incorporated Modular command structure for memory and memory system
US8700818B2 (en) * 2006-09-29 2014-04-15 Mosaid Technologies Incorporated Packet based ID generation for serially interconnected devices
US7817470B2 (en) 2006-11-27 2010-10-19 Mosaid Technologies Incorporated Non-volatile memory serial core architecture
US8271758B2 (en) 2006-12-06 2012-09-18 Mosaid Technologies Incorporated Apparatus and method for producing IDS for interconnected devices of mixed type
US7752364B2 (en) * 2006-12-06 2010-07-06 Mosaid Technologies Incorporated Apparatus and method for communicating with semiconductor devices of a serial interconnection
US7818464B2 (en) * 2006-12-06 2010-10-19 Mosaid Technologies Incorporated Apparatus and method for capturing serial input data
US7853727B2 (en) 2006-12-06 2010-12-14 Mosaid Technologies Incorporated Apparatus and method for producing identifiers regardless of mixed device type in a serial interconnection
US8331361B2 (en) 2006-12-06 2012-12-11 Mosaid Technologies Incorporated Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
US8010709B2 (en) 2006-12-06 2011-08-30 Mosaid Technologies Incorporated Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
US7529149B2 (en) * 2006-12-12 2009-05-05 Mosaid Technologies Incorporated Memory system and method with serial and parallel modes
US8984249B2 (en) * 2006-12-20 2015-03-17 Novachips Canada Inc. ID generation apparatus and method for serially interconnected devices
US8010710B2 (en) 2007-02-13 2011-08-30 Mosaid Technologies Incorporated Apparatus and method for identifying device type of serially interconnected devices
US8122202B2 (en) * 2007-02-16 2012-02-21 Peter Gillingham Reduced pin count interface
KR101494065B1 (en) * 2007-02-16 2015-02-23 컨버전트 인텔렉츄얼 프로퍼티 매니지먼트 인코포레이티드 Semiconductor device and method for reducing power consumption in a system having interconnected devices
US7796462B2 (en) 2007-02-22 2010-09-14 Mosaid Technologies Incorporated Data flow control in multiple independent port
US8086785B2 (en) 2007-02-22 2011-12-27 Mosaid Technologies Incorporated System and method of page buffer operation for memory devices
WO2008101316A1 (en) 2007-02-22 2008-08-28 Mosaid Technologies Incorporated Apparatus and method for using a page buffer of a memory device as a temporary cache
US7728619B1 (en) * 2007-03-30 2010-06-01 Cypress Semiconductor Corporation Circuit and method for cascading programmable impedance matching in a multi-chip system
US8645620B2 (en) * 2007-06-29 2014-02-04 International Business Machines Corporation Apparatus and method for accessing a memory device
US7688652B2 (en) * 2007-07-18 2010-03-30 Mosaid Technologies Incorporated Storage of data in memory via packet strobing
US7558151B1 (en) * 2007-09-25 2009-07-07 Integrated Device Technology, Inc. Methods and circuits for DDR-2 memory device read data resynchronization
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US7913128B2 (en) * 2007-11-23 2011-03-22 Mosaid Technologies Incorporated Data channel test apparatus and method thereof
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US7593288B2 (en) * 2007-12-19 2009-09-22 International Business Machines Corporation System for providing read clock sharing between memory devices
US7940572B2 (en) 2008-01-07 2011-05-10 Mosaid Technologies Incorporated NAND flash memory having multiple cell substrates
US8594110B2 (en) 2008-01-11 2013-11-26 Mosaid Technologies Incorporated Ring-of-clusters network topologies
US8139390B2 (en) * 2008-07-08 2012-03-20 Mosaid Technologies Incorporated Mixed data rates in memory devices and systems
US7957173B2 (en) 2008-10-14 2011-06-07 Mosaid Technologies Incorporated Composite memory having a bridging device for connecting discrete memory devices to a system
US8134852B2 (en) 2008-10-14 2012-03-13 Mosaid Technologies Incorporated Bridge device architecture for connecting discrete memory devices to a system
US20100115172A1 (en) * 2008-11-04 2010-05-06 Mosaid Technologies Incorporated Bridge device having a virtual page buffer
US8549209B2 (en) * 2008-11-04 2013-10-01 Mosaid Technologies Incorporated Bridging device having a configurable virtual page size
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US6317350B1 (en) * 2000-06-16 2001-11-13 Netlogic Microsystems, Inc. Hierarchical depth cascading of content addressable memory devices

Also Published As

Publication number Publication date
US7062601B2 (en) 2006-06-13
US20040001380A1 (en) 2004-01-01
WO2004003755A2 (en) 2004-01-08
AU2003280472A8 (en) 2004-01-19
US20070008759A1 (en) 2007-01-11
US7478193B2 (en) 2009-01-13
AU2003280472A1 (en) 2004-01-19

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