WO2004034557A3 - Pwm controller with integrated pll - Google Patents

Pwm controller with integrated pll Download PDF

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Publication number
WO2004034557A3
WO2004034557A3 PCT/US2003/031316 US0331316W WO2004034557A3 WO 2004034557 A3 WO2004034557 A3 WO 2004034557A3 US 0331316 W US0331316 W US 0331316W WO 2004034557 A3 WO2004034557 A3 WO 2004034557A3
Authority
WO
WIPO (PCT)
Prior art keywords
error
signal
operable
pll
phase
Prior art date
Application number
PCT/US2003/031316
Other languages
French (fr)
Other versions
WO2004034557A2 (en
Inventor
James William Leith
Mark Dickmann
Original Assignee
Intersil Inc
James William Leith
Mark Dickmann
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intersil Inc, James William Leith, Mark Dickmann filed Critical Intersil Inc
Priority to AU2003277251A priority Critical patent/AU2003277251A1/en
Priority to JP2004543104A priority patent/JP2006502656A/en
Publication of WO2004034557A2 publication Critical patent/WO2004034557A2/en
Publication of WO2004034557A3 publication Critical patent/WO2004034557A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Abstract

A pulse-width modulation (PWM) controller to supply power to electronic components using a phase lock loop (PLL) is presented. A PWM controller comprises an input node operable to receive a reference signal and a phase-locked loop (PLL). The PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a. frequency that is related to the error-correction signal, a phase-frequency detector (PFD) coupled to the oscillator and operable to receive the reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal, and a suppression circuit coupled to the PFD and operable to periodically enable the PFD to generate the error-correction signal.
PCT/US2003/031316 2002-10-04 2003-10-01 Pwm controller with integrated pll WO2004034557A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003277251A AU2003277251A1 (en) 2002-10-04 2003-10-01 Pwm controller with integrated pll
JP2004543104A JP2006502656A (en) 2002-10-04 2003-10-01 PWM controller with integrated PLL

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/264,359 2002-10-04
US10/264,359 US7269217B2 (en) 2002-10-04 2002-10-04 PWM controller with integrated PLL

Publications (2)

Publication Number Publication Date
WO2004034557A2 WO2004034557A2 (en) 2004-04-22
WO2004034557A3 true WO2004034557A3 (en) 2004-06-24

Family

ID=32042203

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/031316 WO2004034557A2 (en) 2002-10-04 2003-10-01 Pwm controller with integrated pll

Country Status (7)

Country Link
US (1) US7269217B2 (en)
JP (3) JP2006502656A (en)
KR (1) KR101010084B1 (en)
CN (1) CN100474778C (en)
AU (1) AU2003277251A1 (en)
TW (1) TWI257542B (en)
WO (1) WO2004034557A2 (en)

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US7514909B2 (en) * 2005-09-30 2009-04-07 Voiterra Semiconductor Corporation Voltage regulator with communication ring scheme
US7688607B2 (en) * 2005-09-30 2010-03-30 Volterra Semiconductor Corporation Voltage regulator with inductor banks
US7616463B2 (en) * 2005-09-30 2009-11-10 Volterra Semiconductor Corporation Voltage regulator with common s-phase signals and phase lock loops
US7522436B2 (en) 2005-09-30 2009-04-21 Volterra Semiconductor Corporation Master-slave with adaptation control including slave current checking
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US7684751B2 (en) * 2006-09-26 2010-03-23 Intel Corporation Radio frequency identification apparatus, system and method adapted for self-jammer cancellation
JP5171010B2 (en) * 2006-10-27 2013-03-27 東京エレクトロン株式会社 Power supply device, microwave generator using the same, and computer program
US8760141B2 (en) * 2008-01-04 2014-06-24 The Hong Kong University Of Science And Technology Frequency-hopping pulse-width modulator for switching regulators
US8094769B2 (en) 2008-07-25 2012-01-10 Freescale Semiconductor, Inc. Phase-locked loop system with a phase-error spreading circuit
US8004258B2 (en) * 2008-08-15 2011-08-23 Infineon Technologies Ag Regulation of a current through an inductive load
US8207773B2 (en) * 2009-01-15 2012-06-26 Linear Technology Corporation Pulse-width modulation (PWM) with independently adjustable duty cycle and frequency using two adjustable delays
US8984321B2 (en) * 2009-05-20 2015-03-17 Chronologic Pty, Ltd. Jitter reduction method and apparatus for synchronised USB devices
CN102014017B (en) 2010-09-30 2013-10-09 华为技术有限公司 Signal detection circuit, method and system
US8564375B2 (en) * 2011-12-30 2013-10-22 Fairchild Semiconductor Corporation Methods and apparatus for self-trim calibration of an oscillator
CN102594309A (en) * 2012-03-31 2012-07-18 中国科学院上海应用物理研究所 Synchronization method for pulse width modulation
US9348358B2 (en) * 2014-04-18 2016-05-24 Fujitsu Limited Clock multiplication and distribution
CN104122936B (en) * 2014-07-21 2017-06-13 深圳市芯海科技有限公司 A kind of MCU chip frequency-dividing clock means for correcting and method
CN105871213B (en) * 2015-01-21 2020-02-21 南京航空航天大学 Control method and device in non-contact electric energy transmission system
US20160269016A1 (en) * 2015-03-12 2016-09-15 Microchip Technology Incorporated Combinatorial/sequential pulse width modulation
US10560109B2 (en) * 2017-12-29 2020-02-11 Texas Instruments Incorporated Phased locked loop integrated circuit
CN108390562A (en) * 2018-03-16 2018-08-10 西安电子科技大学 A kind of switching frequency correcting circuit for DC/DC

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US6222745B1 (en) * 1999-10-19 2001-04-24 Texas Instruments Incorporated Digitally synthesized multiple phase pulse width modulation

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Also Published As

Publication number Publication date
US20040066845A1 (en) 2004-04-08
AU2003277251A1 (en) 2004-05-04
JP2010178374A (en) 2010-08-12
CN100474778C (en) 2009-04-01
CN1711692A (en) 2005-12-21
TWI257542B (en) 2006-07-01
AU2003277251A8 (en) 2004-05-04
US7269217B2 (en) 2007-09-11
KR101010084B1 (en) 2011-01-24
JP4954311B2 (en) 2012-06-13
WO2004034557A2 (en) 2004-04-22
JP2012090301A (en) 2012-05-10
TW200406660A (en) 2004-05-01
KR20050052526A (en) 2005-06-02
JP2006502656A (en) 2006-01-19

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