WO2004053650A3 - Data-aware data flow manager - Google Patents

Data-aware data flow manager Download PDF

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Publication number
WO2004053650A3
WO2004053650A3 PCT/US2003/039223 US0339223W WO2004053650A3 WO 2004053650 A3 WO2004053650 A3 WO 2004053650A3 US 0339223 W US0339223 W US 0339223W WO 2004053650 A3 WO2004053650 A3 WO 2004053650A3
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WO
WIPO (PCT)
Prior art keywords
data
flow manager
data flow
cache
aware
Prior art date
Application number
PCT/US2003/039223
Other languages
French (fr)
Other versions
WO2004053650A2 (en
Inventor
Wei Liu
Steven H Kahle
Original Assignee
Infabric Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infabric Technologies Inc filed Critical Infabric Technologies Inc
Priority to AU2003297816A priority Critical patent/AU2003297816A1/en
Publication of WO2004053650A2 publication Critical patent/WO2004053650A2/en
Publication of WO2004053650A3 publication Critical patent/WO2004053650A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device

Abstract

A system for reducing the bottleneck to storage by implementing a data-aware data flow manager (120) between a storage device (125) and a process or device (105) requesting access to the storage. The data flow manager determines which data to cache and which data should bypass the cache. Through intelligent management and caching of data, the data flow manager is able to avoid some of the latencies created by the use of cache memory associated with the storage device. The data flow manager may determine caching policies based on the type of data requested, the state of the cache, user policies, or system policies.
PCT/US2003/039223 2002-12-09 2003-12-09 Data-aware data flow manager WO2004053650A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003297816A AU2003297816A1 (en) 2002-12-09 2003-12-09 Data-aware data flow manager

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43153102P 2002-12-09 2002-12-09
US60/431,531 2002-12-09

Publications (2)

Publication Number Publication Date
WO2004053650A2 WO2004053650A2 (en) 2004-06-24
WO2004053650A3 true WO2004053650A3 (en) 2004-07-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/039223 WO2004053650A2 (en) 2002-12-09 2003-12-09 Data-aware data flow manager

Country Status (3)

Country Link
US (1) US6922754B2 (en)
AU (1) AU2003297816A1 (en)
WO (1) WO2004053650A2 (en)

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