WO2004061462B1 - Power monitoring integrated circuit with communication interface - Google Patents

Power monitoring integrated circuit with communication interface

Info

Publication number
WO2004061462B1
WO2004061462B1 PCT/US2003/039702 US0339702W WO2004061462B1 WO 2004061462 B1 WO2004061462 B1 WO 2004061462B1 US 0339702 W US0339702 W US 0339702W WO 2004061462 B1 WO2004061462 B1 WO 2004061462B1
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
power management
management integrated
power
operative
Prior art date
Application number
PCT/US2003/039702
Other languages
French (fr)
Other versions
WO2004061462A1 (en
Inventor
Martin A Hancock
J Bradford Forth
Simon H Lightbody
Benedikt T Huber
Michael E Teachman
Original Assignee
Power Measurement Ltd
Martin A Hancock
J Bradford Forth
Simon H Lightbody
Benedikt T Huber
Michael E Teachman
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Power Measurement Ltd, Martin A Hancock, J Bradford Forth, Simon H Lightbody, Benedikt T Huber, Michael E Teachman filed Critical Power Measurement Ltd
Priority to CA2511004A priority Critical patent/CA2511004C/en
Priority to AU2003303583A priority patent/AU2003303583A1/en
Priority to EP03814760A priority patent/EP1583976A1/en
Publication of WO2004061462A1 publication Critical patent/WO2004061462A1/en
Publication of WO2004061462B1 publication Critical patent/WO2004061462B1/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2513—Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00—Arrangements for measuring electric power or power factor
    • G01R21/133—Arrangements for measuring electric power or power factor by using digital technique

Abstract

A power management integrated circuit for monitoring at least one parameter of a power system is disclosed. The integrated circuit comprises first logic operative to receive digital signals and produce at least one power parameter. The first logic comprises at least one processor core. The integrated circuit further comprises at least one random access memory coupled with the first logic. The at least one random access memory is operative to store the at least one power parameter. The integrated circuit further comprises second logic coupled with the first logic and operative to process at least one incoming communication packet and generate at least one outgoing communication packet encapsulating the at least one power parameter. The integrated circuit further comprises a communications interface operative to receive the at least one incoming communication packet from outside the power management integrated circuit and transmit the at least one outgoing communication packet out of the power management integrated circuit. Power monitoring devices incorporating the integrated circuit are also disclosed.

Claims

25
AMENDED CLAIMS
[received by the International Bureau on 05 August 2004 (05.08.04);
Claims: 2-12, 14-39, 41-72 unchanged; claims: 1, 13, 40 replaced by amended claims bearing the same numbers; claims 73, 74 are added (5 pages)]
1. A power management integrated circuit for use in an intelligent electronic device for monitoring at least one parameter of an AC power system, the power management integrated circuit comprising: a single semiconductor substrate; first means for receiving and at least one of amplifying, attenuating, filtering and storing signals representative of voltage and current in athe AC power system to provide modified signals; second means for producing digital signals representative of said modified signals; third means for receiving said digital signals and producing at least one power parameter; said third means comprising at least one processing means; fourth means for storing said at least one power parameter in said integrated circuit; fifth means for processing at least one incoming communication packet and generating at least one outgoing communication packet encapsulating said at least one power parameter; sixth means for receiving said at least one incoming communication packet from outside said power management integrated circuit and transmitting said at least one outgoing communication packet out of said power management integrated circuit; an wherein said first, second, third, fourth, fifth and sixth means are formed on the single semiconductor substrate; and wherein at least one of said incoming and outgoing communication packets comprise an indication of at least one of a source and a destination of said communication packet.
2 The power management integrated circuit of claim 1 wherein said at least one outgoing communication packet comprises a fieldbus packet and said at least one incoming communication packet comprises a fieldbus packet.
3 The power management integrated circuit of either of claims 1 or 2 wherein said at least one outgoing communication packet comprises a TCP/IP packet and said at least one incoming communication packet comprises a TCP/IP packet.
4. The power management integrated circuit of any of claims 1 , 2 or 3 further comprising: seventh means for providing a variable clock signal to said third means.
5. The power management integrated circuit of any of claims 1 , 2, 3 or 4 wherein said fourth means comprises: volatile means for providing temporary storage during operation of at least one of said third and fifth means; and non-volatile means for containing configuration information for said power management integrated circuit.
6. The power management integrated circuit of any of claims 1 , 2, 3, 4 or 5 wherein said at leasr one power parameter comprises at least one of voltage, current, power, energy, harmonic distortion, frequency and power factor.
7. The power management integrated circuit of any of claims 1 , 2, 3, 4 or 5 wherein said at least one power parameter comprises a sample of at least one of a voltage waveform, a current waveform and a power waveform.
8. The power management integrated circuit of any of claims 1, 2, 3, 4, 5, 6 or 7 further comprising a control means formed on said substrate coupled with said first means for controlling a power supply which supplies operating power to said power management integrated circuit.
9. The power management integrated circuit of any of claims 1, 2, 3, 4, 5, 6, 7 or 8 further comprising means formed on said substrate for implementing at least one setpoint indicative of when said at least one power parameter is outside a determined range and means for controlling a device external to said power management integrated circuit based on said at least one setpoint.
10. The power management integrated circuit of any of claims 1, 2, 3, 4, 5, 6, 7, 8 or 9 further comprising means formed on said substrate for monitoring a voltage level from a supply of power to said power management integrated circuit.
11. The power management integrated circuit of any of claims 1, 2, 3, 4, 5, 6, 7, 8, 9 or 10 further comprising means coupled with said third means for driving a display external to said power management integrated circuit.
12. The power management integrated circuit of any of claims 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 or 11 further comprising means coupled with said fifth means for securing data transmitted through said sixth means.
13. A power management integrated circuit for use in an intelligent electronic device for monitoring at least one parameter of an AC power system, the power management integrated circuit comprising: an analog front end formed as part of said power management integrated circuit operative to receive and at least one of amplify, attenuate and filter analog signals representative of voltage and current in athe AC power system to produce modified analog signals; at least one analog to digital converter formed as part of said power management integrated circuit coupled with said analog front end, wherein said at least one analog to digital converter is operative to produce digital signals representative of said modified analog signals; first logic formed as part of said power management integrated circuit coupled with said analog to digital converter, operative to receive said digital signals and produce at least one power parameter; said first logic comprising at least one processor core; 27
at least one random access memory formed as part of said power management integrated circuit coupled with said first logic, wherein said at least one random access memory is operative to store said at least one power parameter; second logic formed as part of said power management integrated circuit coupled with said first logic and operative to process at least one incoming communication packet and generate at least one outgoing communication packet encapsulating said at least one power parameter; and a communications interface formed as part of said power management integrated circuit operative to receive said at least one incoming communication packet from outside said power management integrated circuit and transmit said at least one outgoing communication packet out of said power management integrated circuit: and wherein at least one of said incoming communication packet and said outgoing communication packet comprises an indicator of at least one of a source and a destination of said communication packet.
14. The power management integrated circuit of claim 13 wherein said at least one outgoing communication packet comprises a fieldbus packet and said at least one incoming communication packet comprises a fieldbus packet.
15. The power management integrated circuit of claim 14 wherein said at least one incoming and outgoing fieldbus packets comprise at least one of a Modbus® protocol, a Profibus protocol and a DNP protocol.
16. The power management integrated circuit of any of claims 13, 14, or 15 wherein said at least one outgoing communication packet comprises a TCP/IP packet and said at least one incoming communication packet comprises a TCP/IP packet.
17 The power management integrated circuit of claim 16 wherein at least one of said at least one incoming TCP/IP packet and said at least one outgoing TCP/IP packet comprises at least one of an SMTP packet, an HTTP packet, a SOAP packet, a POP packet, an SNMP packet and a PPP packet.
18. The power management integrated circuit of any of claims 13, 14, 15, 16 or 17 further comprising: a phase lock loop clock circuit formed as part of said power management integrated circuit operative to provide a variable clock signal to said processor core.
19. The power management integrated circuit of any of claims 13, 14, 15, 16, 17 or 18 wherein said at least one random access memory comprises: a volatile section operative to provide temporary storage during operation of at least one of said first and second logic; and a non-volatile section operative to contain configuration information for said power management integrated circuit.
20. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18 or 19 wherein said at least one power parameter comprises at least one of rms voltage, rms current, power, energy, harmonic distortion, frequency and power factor. 28
power management integrated circuit coupled with said first logic, said display driver operative to drive a display external to said power management integrated circuit.
33. The power management integrated circuit of claim 32 wherein said display is a graphical display.
34. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32 or 33 further comprising circuitry formed as part of said power management integrated circuit operative to convert at least one of said analog signals to a digital signal indicative of the fundamental frequency of said at least one of said analog signals.
35. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33 or 34 further comprising a JTAG interface formed as part of said power management integrated circuit coupled with said first logic.
36. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34 or 35 wherein said communications interface comprises a wireless interface.
37. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34 or 35 wherein said communications interface comprises a powerline carrier interface.
38. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36 or 37 wherein said second logic is operative to secure data transmitted through said communications interface.
39. The power management integrated circuit of any of claims 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37 or 38 further comprising at least one status input coupled with said first logic; wherein said first logic is operative to perform at least one consumption calculation based on said at least one status input.
40. A power management integrated circuit for use in an intelligent electronic device for monitoring at least one parameter of an AC power system, the power management integrated circuit comprising: a digital interface formed as part of said power management integrated circuit operative to receive digital signals from a digital sensor, wherein said digital signals are representative of at least one of voltage and current in athe AC power system; first logic formed as part of said power management integrated circuit, coupled with said digital interface, operative to receive said digital signals and produce at least one power parameter; said first logic comprising at least one processor core; 29
73. The power management integrated circuit of any of claims 13, 14, 15, 16. 17, 18, 19. 20. 21. 22. 23. 24. 25. 26. 27, 28, 29. 30. 31, 32. 33. 34. 35. 36. 37. 38 or 39 further comprising compensation circuitry operative to drive an active current transformer.
74. The power management integrated circuit of any of claims 13, 14, 15. 16, 17, 18, 19, 20, 21, 22, 23. 24. 25. 26. 27, 28, 29. 30. 31. 32. 33. 34. 35. 36. 37. 38, 39 or 73 wherein a first of said at least one analog to digital converter and a second of said at least one analog to digital converter are operative to simultaneously sample at least two of said modified analog signals to produce said digital signals representative of said modified analog signals.
PCT/US2003/039702 2002-12-23 2003-12-12 Power monitoring integrated circuit with communication interface WO2004061462A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CA2511004A CA2511004C (en) 2002-12-23 2003-12-12 Power monitoring integrated circuit with communication interface
AU2003303583A AU2003303583A1 (en) 2002-12-23 2003-12-12 Power monitoring integrated circuit with communication interface
EP03814760A EP1583976A1 (en) 2002-12-23 2003-12-12 Power monitoring integrated circuit with communication interface

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43618702P 2002-12-23 2002-12-23
US60/436,187 2002-12-23

Publications (2)

Publication Number Publication Date
WO2004061462A1 WO2004061462A1 (en) 2004-07-22
WO2004061462B1 true WO2004061462B1 (en) 2004-09-23

Family

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Family Applications (1)

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PCT/US2003/039702 WO2004061462A1 (en) 2002-12-23 2003-12-12 Power monitoring integrated circuit with communication interface

Country Status (5)

Country Link
US (2) US7010438B2 (en)
EP (1) EP1583976A1 (en)
AU (1) AU2003303583A1 (en)
CA (1) CA2511004C (en)
WO (1) WO2004061462A1 (en)

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US7010438B2 (en) 2006-03-07
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US20060052958A1 (en) 2006-03-09
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US7072779B2 (en) 2006-07-04
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