WO2004099971A3 - Methods and systems for efficiently integrating a cryptographic co-processor - Google Patents

Methods and systems for efficiently integrating a cryptographic co-processor Download PDF

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Publication number
WO2004099971A3
WO2004099971A3 PCT/US2004/013541 US2004013541W WO2004099971A3 WO 2004099971 A3 WO2004099971 A3 WO 2004099971A3 US 2004013541 W US2004013541 W US 2004013541W WO 2004099971 A3 WO2004099971 A3 WO 2004099971A3
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WO
WIPO (PCT)
Prior art keywords
cryptographic
processor
systems
methods
packet
Prior art date
Application number
PCT/US2004/013541
Other languages
French (fr)
Other versions
WO2004099971A2 (en
Inventor
Gregory F Grohoski
Paul J Jordan
Michael K Wong
Leslie D Kohn
Original Assignee
Sun Microsystems Inc
Gregory F Grohoski
Paul J Jordan
Michael K Wong
Leslie D Kohn
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc, Gregory F Grohoski, Paul J Jordan, Michael K Wong, Leslie D Kohn filed Critical Sun Microsystems Inc
Priority to GB0500668A priority Critical patent/GB2416224B/en
Priority to DE112004000015T priority patent/DE112004000015T5/en
Publication of WO2004099971A2 publication Critical patent/WO2004099971A2/en
Publication of WO2004099971A3 publication Critical patent/WO2004099971A3/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
    • H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
    • H04L63/0485—Networking architectures for enhanced packet encryption processing, e.g. offloading of IPsec packet processing or efficient security association look-up
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/16—Implementing security features at a particular protocol layer
    • H04L63/164—Implementing security features at a particular protocol layer at the network layer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/16—Implementing security features at a particular protocol layer
    • H04L63/166—Implementing security features at a particular protocol layer at the transport layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Advance Control (AREA)
  • Storage Device Security (AREA)

Abstract

A method and system of processing a cryptographic packet includes receiving a first cryptographic packet in a host CPU. A first set of data required to execute the first cryptographic packet is identified. The first cryptographic packet and the required first set of data is transferred to a cryptographic co-processor. The first cryptographic packet is executed in the cryptographic co­processor. The host CPU is notified that the execution of the first cryptographic packet is complete. The executed first cryptographic packet is received in the host CPU.
PCT/US2004/013541 2003-05-05 2004-04-29 Methods and systems for efficiently integrating a cryptographic co-processor WO2004099971A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB0500668A GB2416224B (en) 2003-05-05 2004-04-29 Methods and systems for efficiently integrating a cryptographic co-processor
DE112004000015T DE112004000015T5 (en) 2003-05-05 2004-04-29 Methods and systems for efficiently integrating a cryptographic coprocessor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/430,614 US7392399B2 (en) 2003-05-05 2003-05-05 Methods and systems for efficiently integrating a cryptographic co-processor
US10/430,614 2003-05-05

Publications (2)

Publication Number Publication Date
WO2004099971A2 WO2004099971A2 (en) 2004-11-18
WO2004099971A3 true WO2004099971A3 (en) 2006-01-19

Family

ID=33416282

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/013541 WO2004099971A2 (en) 2003-05-05 2004-04-29 Methods and systems for efficiently integrating a cryptographic co-processor

Country Status (5)

Country Link
US (1) US7392399B2 (en)
DE (1) DE112004000015T5 (en)
GB (1) GB2416224B (en)
TW (1) TWI238945B (en)
WO (1) WO2004099971A2 (en)

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Also Published As

Publication number Publication date
TWI238945B (en) 2005-09-01
DE112004000015T5 (en) 2006-04-20
GB2416224A (en) 2006-01-18
US7392399B2 (en) 2008-06-24
GB2416224B (en) 2007-02-14
WO2004099971A2 (en) 2004-11-18
TW200504525A (en) 2005-02-01
GB0500668D0 (en) 2005-02-23
US20040225885A1 (en) 2004-11-11

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