WO2004109526A3 - Memory channel with bit lane fail-over - Google Patents

Memory channel with bit lane fail-over Download PDF

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Publication number
WO2004109526A3
WO2004109526A3 PCT/US2004/016116 US2004016116W WO2004109526A3 WO 2004109526 A3 WO2004109526 A3 WO 2004109526A3 US 2004016116 W US2004016116 W US 2004016116W WO 2004109526 A3 WO2004109526 A3 WO 2004109526A3
Authority
WO
WIPO (PCT)
Prior art keywords
over
memory channel
bit lane
bit lanes
lane fail
Prior art date
Application number
PCT/US2004/016116
Other languages
French (fr)
Other versions
WO2004109526A2 (en
Inventor
Pete Vogt
Warren Morrow
Dennis Brzezinski
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to EP04753015A priority Critical patent/EP1629389A2/en
Priority to JP2006514926A priority patent/JP4519839B2/en
Publication of WO2004109526A2 publication Critical patent/WO2004109526A2/en
Publication of WO2004109526A3 publication Critical patent/WO2004109526A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.
PCT/US2004/016116 2003-06-05 2004-05-20 Memory channel with bit lane fail-over WO2004109526A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04753015A EP1629389A2 (en) 2003-06-05 2004-05-20 Memory channel with bit lane fail-over
JP2006514926A JP4519839B2 (en) 2003-06-05 2004-05-20 Memory channel with bit lane failover

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/456,353 US7386768B2 (en) 2003-06-05 2003-06-05 Memory channel with bit lane fail-over
US10/456,353 2003-06-05

Publications (2)

Publication Number Publication Date
WO2004109526A2 WO2004109526A2 (en) 2004-12-16
WO2004109526A3 true WO2004109526A3 (en) 2005-04-14

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/016116 WO2004109526A2 (en) 2003-06-05 2004-05-20 Memory channel with bit lane fail-over

Country Status (7)

Country Link
US (7) US7386768B2 (en)
EP (1) EP1629389A2 (en)
JP (1) JP4519839B2 (en)
KR (1) KR100806446B1 (en)
CN (1) CN100511192C (en)
TW (1) TWI246081B (en)
WO (1) WO2004109526A2 (en)

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Publication number Publication date
TW200502955A (en) 2005-01-16
US8020056B2 (en) 2011-09-13
CN100511192C (en) 2009-07-08
US8135999B2 (en) 2012-03-13
US20040250181A1 (en) 2004-12-09
US20100281315A1 (en) 2010-11-04
US20120102256A1 (en) 2012-04-26
KR20060023985A (en) 2006-03-15
TWI246081B (en) 2005-12-21
US20130097371A1 (en) 2013-04-18
KR100806446B1 (en) 2008-02-21
US8286039B2 (en) 2012-10-09
JP2006526849A (en) 2006-11-24
EP1629389A2 (en) 2006-03-01
CN1799035A (en) 2006-07-05
JP4519839B2 (en) 2010-08-04
US7386768B2 (en) 2008-06-10
US8489944B2 (en) 2013-07-16
WO2004109526A2 (en) 2004-12-16
US20090013211A1 (en) 2009-01-08
US20110131370A1 (en) 2011-06-02
US7761753B2 (en) 2010-07-20
US20120331356A1 (en) 2012-12-27
US8510612B2 (en) 2013-08-13

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