WO2005010670A3 - Apparatus and method for direct memory access in a hub-based memory system - Google Patents

Apparatus and method for direct memory access in a hub-based memory system Download PDF

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Publication number
WO2005010670A3
WO2005010670A3 PCT/US2004/021993 US2004021993W WO2005010670A3 WO 2005010670 A3 WO2005010670 A3 WO 2005010670A3 US 2004021993 W US2004021993 W US 2004021993W WO 2005010670 A3 WO2005010670 A3 WO 2005010670A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
hub
access
device interface
devices
Prior art date
Application number
PCT/US2004/021993
Other languages
French (fr)
Other versions
WO2005010670A2 (en
Inventor
Joseph M Jeddeloh
Original Assignee
Micron Technology Inc
Joseph M Jeddeloh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc, Joseph M Jeddeloh filed Critical Micron Technology Inc
Priority to KR1020067001578A priority Critical patent/KR100887526B1/en
Priority to JP2006521099A priority patent/JP4560646B2/en
Priority to CN200480027307A priority patent/CN100595720C/en
Priority to AT04756816T priority patent/ATE479138T1/en
Priority to DE602004028831T priority patent/DE602004028831D1/de
Priority to EP04756816A priority patent/EP1646925B1/en
Publication of WO2005010670A2 publication Critical patent/WO2005010670A2/en
Publication of WO2005010670A3 publication Critical patent/WO2005010670A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring

Abstract

A memory hub (200) for a memory module having a DMA engine (286) for performing DMA operations in system memory. The memory hub (200) includes a link interface (210 and 212) for receiving memory requests for access at least one of the memory devices of the system memory (240), and further including a memory device interface (270) for coupling to the memory devices, the memory device interface (270) coupling memory requests to the memory devices for access to at least one of the memory devices. A switch (260) for selectively coupling the link interface (210 and 212) and the memory device interface (270) is further included in the memory hub. Additionally, a direct memory access (DMA) engine (286) is coupled through the switch (260) to the memory device interface to generate memory requests for access to at least one of the memory devices to perform DMA operations.
PCT/US2004/021993 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system WO2005010670A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020067001578A KR100887526B1 (en) 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system
JP2006521099A JP4560646B2 (en) 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system
CN200480027307A CN100595720C (en) 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system
AT04756816T ATE479138T1 (en) 2003-07-22 2004-07-08 APPARATUS AND METHOD FOR DIRECT MEMORY ACCESS IN A HUB-BASED STORAGE SYSTEM
DE602004028831T DE602004028831D1 (en) 2003-07-22 2004-07-08
EP04756816A EP1646925B1 (en) 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/625,132 2003-07-22
US10/625,132 US7389364B2 (en) 2003-07-22 2003-07-22 Apparatus and method for direct memory access in a hub-based memory system

Publications (2)

Publication Number Publication Date
WO2005010670A2 WO2005010670A2 (en) 2005-02-03
WO2005010670A3 true WO2005010670A3 (en) 2006-11-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/021993 WO2005010670A2 (en) 2003-07-22 2004-07-08 Apparatus and method for direct memory access in a hub-based memory system

Country Status (10)

Country Link
US (4) US7389364B2 (en)
EP (2) EP2256587A1 (en)
JP (1) JP4560646B2 (en)
KR (1) KR100887526B1 (en)
CN (1) CN100595720C (en)
AT (1) ATE479138T1 (en)
DE (1) DE602004028831D1 (en)
SG (1) SG129443A1 (en)
TW (1) TW200517848A (en)
WO (1) WO2005010670A2 (en)

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