WO2005029406A3 - High quality and high performance three-dimensional graphics architecture for portable handheld devices - Google Patents

High quality and high performance three-dimensional graphics architecture for portable handheld devices Download PDF

Info

Publication number
WO2005029406A3
WO2005029406A3 PCT/US2004/030608 US2004030608W WO2005029406A3 WO 2005029406 A3 WO2005029406 A3 WO 2005029406A3 US 2004030608 W US2004030608 W US 2004030608W WO 2005029406 A3 WO2005029406 A3 WO 2005029406A3
Authority
WO
WIPO (PCT)
Prior art keywords
handheld devices
graphics architecture
portable handheld
quality
performance
Prior art date
Application number
PCT/US2004/030608
Other languages
French (fr)
Other versions
WO2005029406A2 (en
Inventor
Bruce Holmer
Original Assignee
Nvidia Corp
Bruce Holmer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nvidia Corp, Bruce Holmer filed Critical Nvidia Corp
Priority to EP04784466A priority Critical patent/EP1671273B1/en
Priority to JP2006527085A priority patent/JP4799409B2/en
Publication of WO2005029406A2 publication Critical patent/WO2005029406A2/en
Publication of WO2005029406A3 publication Critical patent/WO2005029406A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942Significance control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3293Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/003D [Three Dimensional] image rendering
    • G06T15/005General purpose rendering architectures
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A high quality and performance 3D graphics architecture (101) suitable for portable handheld devices is provided (100). The 3D graphics architecture incorporates a module to classify polygons by size and other characteristics. In general, small and well-behaved triangles (400) can be processed using 'lower-precision' units with power efficient circuitry without any quality and performance sacrifice (e.g., realism, resolution, etc.). By classifying the primitives and selecting the more power-efficient processing unit to process the primitive, power consumption can be reduced without quality and performance sacrifice.
PCT/US2004/030608 2003-09-18 2004-09-17 High quality and high performance three-dimensional graphics architecture for portable handheld devices WO2005029406A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04784466A EP1671273B1 (en) 2003-09-18 2004-09-17 High quality and high performance three-dimensional graphics architecture for portable handheld devices
JP2006527085A JP4799409B2 (en) 2003-09-18 2004-09-17 High quality, high performance 3D graphics architecture for handheld portable devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/667,098 US7418606B2 (en) 2003-09-18 2003-09-18 High quality and high performance three-dimensional graphics architecture for portable handheld devices
US10/677,098 2003-09-18

Publications (2)

Publication Number Publication Date
WO2005029406A2 WO2005029406A2 (en) 2005-03-31
WO2005029406A3 true WO2005029406A3 (en) 2009-02-19

Family

ID=34313263

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/030608 WO2005029406A2 (en) 2003-09-18 2004-09-17 High quality and high performance three-dimensional graphics architecture for portable handheld devices

Country Status (6)

Country Link
US (3) US7418606B2 (en)
EP (1) EP1671273B1 (en)
JP (1) JP4799409B2 (en)
KR (1) KR101017828B1 (en)
TW (1) TWI368869B (en)
WO (1) WO2005029406A2 (en)

Families Citing this family (80)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9330060B1 (en) 2003-04-15 2016-05-03 Nvidia Corporation Method and device for encoding and decoding video image data
US8660182B2 (en) 2003-06-09 2014-02-25 Nvidia Corporation MPEG motion estimation based on dual start points
WO2005037388A1 (en) * 2003-10-21 2005-04-28 Sony Computer Entertainment Inc. Electronic device
US7868890B2 (en) * 2004-02-24 2011-01-11 Qualcomm Incorporated Display processor for a wireless device
US7079156B1 (en) 2004-05-14 2006-07-18 Nvidia Corporation Method and system for implementing multiple high precision and low precision interpolators for a graphics pipeline
US8411105B1 (en) 2004-05-14 2013-04-02 Nvidia Corporation Method and system for computing pixel parameters
US7538773B1 (en) * 2004-05-14 2009-05-26 Nvidia Corporation Method and system for implementing parameter clamping to a valid range in a raster stage of a graphics pipeline
US7190366B2 (en) * 2004-05-14 2007-03-13 Nvidia Corporation Method and system for a general instruction raster stage that generates programmable pixel packets
US8416242B1 (en) 2004-05-14 2013-04-09 Nvidia Corporation Method and system for interpolating level-of-detail in graphics processors
US8432394B1 (en) 2004-05-14 2013-04-30 Nvidia Corporation Method and system for implementing clamped z value interpolation in a raster stage of a graphics pipeline
US7595806B1 (en) 2004-08-03 2009-09-29 Nvidia Corporation Method and system for implementing level of detail filtering in a cube mapping application
JP2006195945A (en) * 2004-12-14 2006-07-27 Matsushita Electric Ind Co Ltd Electronic device and peak power control method therefor
KR100652705B1 (en) * 2004-12-30 2006-12-01 엘지전자 주식회사 Apparatus and method for enhancing image quality of mobile communication terminal
US8773328B2 (en) * 2005-02-12 2014-07-08 Broadcom Corporation Intelligent DMA in a mobile multimedia processor supporting multiple display formats
US7725519B2 (en) * 2005-10-05 2010-05-25 Qualcom Incorporated Floating-point processor with selectable subprecision
US8731071B1 (en) 2005-12-15 2014-05-20 Nvidia Corporation System for performing finite input response (FIR) filtering in motion estimation
JP4355705B2 (en) * 2006-02-23 2009-11-04 エヌイーシーコンピュータテクノ株式会社 Multiplier and arithmetic unit
US8595279B2 (en) * 2006-02-27 2013-11-26 Qualcomm Incorporated Floating-point processor with reduced power requirements for selectable subprecision
US8724702B1 (en) 2006-03-29 2014-05-13 Nvidia Corporation Methods and systems for motion estimation used in video coding
US7843468B2 (en) 2006-07-26 2010-11-30 Nvidia Corporation Accellerated start tile search
US8009172B2 (en) * 2006-08-03 2011-08-30 Qualcomm Incorporated Graphics processing unit with shared arithmetic logic unit
KR100829561B1 (en) * 2006-08-24 2008-05-15 삼성전자주식회사 Method for rendering 3D graphic data and apparatus therefore
US8660380B2 (en) 2006-08-25 2014-02-25 Nvidia Corporation Method and system for performing two-dimensional transform on data value array with reduced power consumption
KR101272335B1 (en) * 2006-10-20 2013-06-07 삼성디스플레이 주식회사 Display device and driving method thereof
US20080117223A1 (en) * 2006-11-21 2008-05-22 Peter Mayer Display with memory for storing picture data
US8421794B2 (en) * 2007-03-23 2013-04-16 Qualcomm Incorporated Processor with adaptive multi-shader
KR100919236B1 (en) * 2007-05-22 2009-09-30 한국전자통신연구원 A method for 3D Graphic Geometric Transformation using Parallel Processor
US8756482B2 (en) 2007-05-25 2014-06-17 Nvidia Corporation Efficient encoding/decoding of a sequence of data frames
US20080291209A1 (en) * 2007-05-25 2008-11-27 Nvidia Corporation Encoding Multi-media Signals
US9118927B2 (en) 2007-06-13 2015-08-25 Nvidia Corporation Sub-pixel interpolation and its application in motion compensated encoding of a video signal
US8873625B2 (en) 2007-07-18 2014-10-28 Nvidia Corporation Enhanced compression in representing non-frame-edge blocks of image frames
US8441497B1 (en) 2007-08-07 2013-05-14 Nvidia Corporation Interpolation of vertex attributes in a graphics processor
JP4935619B2 (en) 2007-10-23 2012-05-23 ヤマハ株式会社 Digital signal processor
US20090109996A1 (en) * 2007-10-29 2009-04-30 Hoover Russell D Network on Chip
US20090125706A1 (en) * 2007-11-08 2009-05-14 Hoover Russell D Software Pipelining on a Network on Chip
US20090125703A1 (en) * 2007-11-09 2009-05-14 Mejdrich Eric O Context Switching on a Network On Chip
TWI334798B (en) * 2007-11-14 2010-12-21 Generalplus Technology Inc Method for increasing speed in virtual third dimensional application
US8526422B2 (en) * 2007-11-27 2013-09-03 International Business Machines Corporation Network on chip with partitions
US8473667B2 (en) * 2008-01-11 2013-06-25 International Business Machines Corporation Network on chip that maintains cache coherency with invalidation messages
US8010750B2 (en) * 2008-01-17 2011-08-30 International Business Machines Corporation Network on chip that maintains cache coherency with invalidate commands
CN101925952B (en) * 2008-01-21 2012-06-06 松下电器产业株式会社 Sound reproducing device
TWI364724B (en) * 2008-02-12 2012-05-21 Generalplus Technology Inc Method for increasing operation speed in virtual three dimensional (3d) application and operational method thereof
US8490110B2 (en) * 2008-02-15 2013-07-16 International Business Machines Corporation Network on chip with a low latency, high bandwidth application messaging interconnect
JP5309636B2 (en) * 2008-03-21 2013-10-09 富士通株式会社 Arithmetic processing device and control method of arithmetic processing device
US20090260013A1 (en) * 2008-04-14 2009-10-15 International Business Machines Corporation Computer Processors With Plural, Pipelined Hardware Threads Of Execution
US8633936B2 (en) * 2008-04-21 2014-01-21 Qualcomm Incorporated Programmable streaming processor with mixed precision instruction execution
US8078850B2 (en) * 2008-04-24 2011-12-13 International Business Machines Corporation Branch prediction technique using instruction for resetting result table pointer
US8494833B2 (en) * 2008-05-09 2013-07-23 International Business Machines Corporation Emulating a computer run time environment
US8392664B2 (en) * 2008-05-09 2013-03-05 International Business Machines Corporation Network on chip
US7991978B2 (en) * 2008-05-09 2011-08-02 International Business Machines Corporation Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processor
US8020168B2 (en) * 2008-05-09 2011-09-13 International Business Machines Corporation Dynamic virtual software pipelining on a network on chip
US8214845B2 (en) * 2008-05-09 2012-07-03 International Business Machines Corporation Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message data
US7958340B2 (en) * 2008-05-09 2011-06-07 International Business Machines Corporation Monitoring software pipeline performance on a network on chip
US8230179B2 (en) * 2008-05-15 2012-07-24 International Business Machines Corporation Administering non-cacheable memory load instructions
US8438578B2 (en) * 2008-06-09 2013-05-07 International Business Machines Corporation Network on chip with an I/O accelerator
US20100138677A1 (en) * 2008-12-01 2010-06-03 International Business Machines Corporation Optimization of data distribution and power consumption in a data center
US8666181B2 (en) 2008-12-10 2014-03-04 Nvidia Corporation Adaptive multiple engine image motion detection system and method
US20100309094A1 (en) * 2009-06-08 2010-12-09 Castleman Mark Methos and apparatus for remote interaction using a partitioned display
US8286084B2 (en) * 2009-06-08 2012-10-09 Swakker Llc Methods and apparatus for remote interaction using a partitioned display
US20100309196A1 (en) * 2009-06-08 2010-12-09 Castleman Mark Methods and apparatus for processing related images of an object based on directives
US8860781B2 (en) * 2009-06-30 2014-10-14 Qualcomm Incorporated Texture compression in a video decoder for efficient 2D-3D rendering
US8482574B2 (en) * 2009-10-06 2013-07-09 Nvidia Corporation System, method, and computer program product for calculating statistics associated with a surface to be rendered utilizing a graphics processor
EP2616954B1 (en) * 2010-09-18 2021-03-31 Google LLC A method and mechanism for rendering graphics remotely
US8918446B2 (en) 2010-12-14 2014-12-23 Intel Corporation Reducing power consumption in multi-precision floating point multipliers
US9652016B2 (en) * 2011-04-27 2017-05-16 Nvidia Corporation Techniques for degrading rendering quality to increase operating time of a computing platform
US8671299B2 (en) 2011-05-26 2014-03-11 Google Inc. Delaying the initiation of transitioning to a lower power mode by placing a computer system into an intermediate power mode between a normal power mode and the lower power mode
US9128697B1 (en) * 2011-07-18 2015-09-08 Apple Inc. Computer numerical storage format with precision type indicator
US9019280B2 (en) 2011-07-22 2015-04-28 Qualcomm Incorporated Area-based rasterization techniques for a graphics processing system
WO2013019517A1 (en) 2011-08-02 2013-02-07 Ciinow, Inc. A method and mechanism for efficiently delivering visual data across a network
US9105112B2 (en) 2013-02-21 2015-08-11 Apple Inc. Power management for image scaling circuitry
US9324127B2 (en) * 2014-02-14 2016-04-26 Qualcomm Incorporated Techniques for conservative rasterization
KR102444240B1 (en) 2015-07-29 2022-09-16 삼성전자주식회사 Method and apparatus for processing texture
CN106708499B (en) 2015-11-13 2020-10-27 财团法人工业技术研究院 Analysis method and analysis system of drawing processing program
US20170322808A1 (en) * 2016-05-05 2017-11-09 Cirrus Logic International Semiconductor Ltd. Low-power processor with support for multiple precision modes
US20170337728A1 (en) * 2016-05-17 2017-11-23 Intel Corporation Triangle Rendering Mechanism
US10042774B2 (en) * 2016-09-19 2018-08-07 Advanced Micro Devices, Inc. Method and apparatus for masking and transmitting data
US10467796B2 (en) * 2017-04-17 2019-11-05 Intel Corporation Graphics system with additional context
US11010659B2 (en) * 2017-04-24 2021-05-18 Intel Corporation Dynamic precision for neural network compute operations
US10726514B2 (en) * 2017-04-28 2020-07-28 Intel Corporation Compute optimizations for low precision machine learning operations
US11263291B2 (en) * 2020-06-26 2022-03-01 Intel Corporation Systems and methods for combining low-mantissa units to achieve and exceed FP64 emulation of matrix multiplication

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6831617B1 (en) * 1999-11-09 2004-12-14 Matsushita Electric Industrial Co., Ltd. Display unit and portable information terminal

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0876949A (en) * 1994-08-31 1996-03-22 Canon Inc Image forming device
US6160557A (en) * 1996-10-17 2000-12-12 International Business Machines Corporation Method and apparatus providing efficient rasterization with data dependent adaptations
JPH10269377A (en) * 1997-03-27 1998-10-09 Toshiba Corp Display control system, and display control method for three-dimensional graphics data
US6473089B1 (en) * 1998-03-02 2002-10-29 Ati Technologies, Inc. Method and apparatus for a video graphics circuit having parallel pixel processing
JP3586369B2 (en) * 1998-03-20 2004-11-10 インターナショナル・ビジネス・マシーンズ・コーポレーション Method and computer for reducing video clock frequency
US6222550B1 (en) * 1998-12-17 2001-04-24 Neomagic Corp. Multiple triangle pixel-pipelines with span-range pixel interlock for processing separate non-overlapping triangles for superscalar 3D graphics engine
US6384833B1 (en) * 1999-08-10 2002-05-07 International Business Machines Corporation Method and parallelizing geometric processing in a graphics rendering pipeline
JP2002189539A (en) * 2000-10-02 2002-07-05 Fujitsu Ltd Software processor, program and recording medium
KR100408021B1 (en) * 2000-12-29 2003-12-01 엘지전자 주식회사 Interface apparatus and method for lcd system
US6720969B2 (en) * 2001-05-18 2004-04-13 Sun Microsystems, Inc. Dirty tag bits for 3D-RAM SRAM
US6778179B2 (en) * 2001-05-18 2004-08-17 Sun Microsystems, Inc. External dirty tag bits for 3D-RAM SRAM
JP4052831B2 (en) * 2001-12-19 2008-02-27 株式会社ルネサステクノロジ Rendering processing apparatus and rendering processing method
EP1391812A1 (en) * 2002-08-20 2004-02-25 Texas Instruments Incorporated Hardware accelerator for performing division

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6831617B1 (en) * 1999-11-09 2004-12-14 Matsushita Electric Industrial Co., Ltd. Display unit and portable information terminal

Also Published As

Publication number Publication date
US7328358B1 (en) 2008-02-05
US7418606B2 (en) 2008-08-26
WO2005029406A2 (en) 2005-03-31
EP1671273A2 (en) 2006-06-21
EP1671273A4 (en) 2009-10-28
EP1671273B1 (en) 2012-11-28
JP4799409B2 (en) 2011-10-26
TW200519730A (en) 2005-06-16
TWI368869B (en) 2012-07-21
JP2007514209A (en) 2007-05-31
KR101017828B1 (en) 2011-02-28
KR20060066081A (en) 2006-06-15
US7313710B1 (en) 2007-12-25
US20050066205A1 (en) 2005-03-24

Similar Documents

Publication Publication Date Title
WO2005029406A3 (en) High quality and high performance three-dimensional graphics architecture for portable handheld devices
EP2299408A3 (en) A graphics processing architecture employing a unified shader
WO2005101321A3 (en) Processing three dimensional data for spatial three dimensional displays
WO2006093669A3 (en) Modifying power adapter output
AU2002228718A1 (en) An integrated tessellator in a graphics processing unit
GB2402911B (en) Improvements in and relating to an amphibious craft
WO2004027641A3 (en) Computer-aided selection method for a portion of a volume
EP1215628A3 (en) Three-dimensional graph display apparatus
CN200974425Y (en) Wind power driving device
CN2930389Y (en) Shopping bag
CN2544969Y (en) Glass paperweight
CA102008S (en) Hand truck
AU2003241717A1 (en) Novel cathepsin l-like cysteine protease originating in pink shrimp
CN201545422U (en) Fruit peel collecting box adopting imitative statuary artistic modeling
CN2064718U (en) Sky moulding with stereoscopic feeling
CN201163515Y (en) Folding type polyhedron used for advertisement and gift
Conroy In Dublin's fair city
Foltin Radical cheerleading in Pink & Silver: Demonstration culture between conformity and confrontation
TH74027S (en) Knife
TH74012S (en) "whistle"
TH60966S (en) Dry battery container
TH84006S (en) Toy parts
TH84008S (en) Roof toy parts
TH61765S (en) toy
TH16709S1 (en) Luggage drag handle

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BW BY BZ CA CH CN CO CR CU CZ DK DM DZ EC EE EG ES FI GB GD GE GM HR HU ID IL IN IS JP KE KG KP KZ LC LK LR LS LT LU LV MA MD MK MN MW MX MZ NA NI NO NZ PG PH PL PT RO RU SC SD SE SG SK SY TJ TM TN TR TT TZ UA UG US UZ VN YU ZA ZM

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GM KE LS MW MZ NA SD SZ TZ UG ZM ZW AM AZ BY KG MD RU TJ TM AT BE BG CH CY DE DK EE ES FI FR GB GR HU IE IT MC NL PL PT RO SE SI SK TR BF CF CG CI CM GA GN GQ GW ML MR SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2006527085

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 1020067002303

Country of ref document: KR

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2004784466

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1020067002303

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 2004784466

Country of ref document: EP