WO2005033929A8 - Combinational approach for developing building blocks of dsp compiler - Google Patents

Combinational approach for developing building blocks of dsp compiler

Info

Publication number
WO2005033929A8
WO2005033929A8 PCT/US2004/031776 US2004031776W WO2005033929A8 WO 2005033929 A8 WO2005033929 A8 WO 2005033929A8 US 2004031776 W US2004031776 W US 2004031776W WO 2005033929 A8 WO2005033929 A8 WO 2005033929A8
Authority
WO
WIPO (PCT)
Prior art keywords
building blocks
combinational approach
developing building
compiler
dsp
Prior art date
Application number
PCT/US2004/031776
Other languages
French (fr)
Other versions
WO2005033929A2 (en
Inventor
Ashik Kumar Shivachary Nagaraj
Thyagarajan Venkatesan
Ravindra Shetty Kayandoor
Original Assignee
Intel Corp A Delaware Coprpora
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp A Delaware Coprpora filed Critical Intel Corp A Delaware Coprpora
Priority to EP04785187A priority Critical patent/EP1668499A1/en
Priority to CN2004800270151A priority patent/CN1853164B/en
Publication of WO2005033929A2 publication Critical patent/WO2005033929A2/en
Publication of WO2005033929A8 publication Critical patent/WO2005033929A8/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/447—Target code generation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/443—Optimisation
PCT/US2004/031776 2003-09-30 2004-09-29 Combinational approach for developing building blocks of dsp compiler WO2005033929A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04785187A EP1668499A1 (en) 2003-09-30 2004-09-29 Combinational approach for developing building blocks of dsp compiler
CN2004800270151A CN1853164B (en) 2003-09-30 2004-09-29 Combinational method for developing building blocks of DSP compiler

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/675,910 2003-09-30
US10/675,910 US7437719B2 (en) 2003-09-30 2003-09-30 Combinational approach for developing building blocks of DSP compiler

Publications (2)

Publication Number Publication Date
WO2005033929A2 WO2005033929A2 (en) 2005-04-14
WO2005033929A8 true WO2005033929A8 (en) 2006-01-19

Family

ID=34377307

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/031776 WO2005033929A2 (en) 2003-09-30 2004-09-29 Combinational approach for developing building blocks of dsp compiler

Country Status (4)

Country Link
US (1) US7437719B2 (en)
EP (1) EP1668499A1 (en)
CN (1) CN1853164B (en)
WO (1) WO2005033929A2 (en)

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US8024703B2 (en) * 2004-10-22 2011-09-20 International Business Machines Corporation Building an open model driven architecture pattern based on exemplars
US20070203871A1 (en) * 2006-01-23 2007-08-30 Tesauro Gerald J Method and apparatus for reward-based learning of improved systems management policies
CN101201750B (en) * 2006-12-13 2010-09-08 西安大唐电信有限公司 Method of providing data for encoding/decoding using syntax lexical analysis tool
US8341597B2 (en) * 2007-01-17 2012-12-25 International Business Machines Corporation Editing source code
US8276124B2 (en) 2007-06-20 2012-09-25 Microsoft Corporation Constructing petri nets from traces for diagnostics
CN101369233A (en) * 2007-08-14 2009-02-18 国际商业机器公司 Program compiling method and compiler
JP2009076002A (en) * 2007-09-25 2009-04-09 Nec Electronics Corp Method for adjusting control timing, compile program, compile apparatus, and information processor
US8755515B1 (en) 2008-09-29 2014-06-17 Wai Wu Parallel signal processing system and method
US20100287571A1 (en) * 2009-05-07 2010-11-11 Cypress Semiconductor Corporation Development, programming, and debugging environment
US8972961B2 (en) 2010-05-19 2015-03-03 International Business Machines Corporation Instruction scheduling approach to improve processor performance
US8656376B2 (en) * 2011-09-01 2014-02-18 National Tsing Hua University Compiler for providing intrinsic supports for VLIW PAC processors with distributed register files and method thereof
US9280322B2 (en) * 2012-09-27 2016-03-08 Intel Corporation Generating source code
US10133557B1 (en) * 2013-01-11 2018-11-20 Mentor Graphics Corporation Modifying code to reduce redundant or unnecessary power usage
WO2014151017A1 (en) * 2013-03-15 2014-09-25 Arganteal, Llc Method of taking a computer architecture representation and generating manufaturing method capable of manufacturing computer systems in a specification
US10204387B2 (en) 2013-05-08 2019-02-12 Nmetric, Llc Sequentially configuring manufacturing equipment to reduce reconfiguration times
CN103440155B (en) * 2013-07-05 2016-08-31 万高(杭州)科技有限公司 A kind of compiler of digital signal processor
CN105335129B (en) * 2014-06-23 2019-03-29 联想(北京)有限公司 Information processing method and electronic equipment
EP3380899B1 (en) * 2016-01-11 2020-11-04 Siemens Aktiengesellschaft Program randomization for cyber-attack resilient control in programmable logic controllers

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CN1223402A (en) * 1998-01-12 1999-07-21 日本电气株式会社 Compiler capable of reducing interrupt handling in optimization and its optimization method
US6467082B1 (en) * 1998-12-02 2002-10-15 Agere Systems Guardian Corp. Methods and apparatus for simulating external linkage points and control transfers in source translation systems
US6367071B1 (en) * 1999-03-02 2002-04-02 Lucent Technologies Inc. Compiler optimization techniques for exploiting a zero overhead loop mechanism
JP2001166947A (en) * 1999-12-06 2001-06-22 Nec Corp Compile processing system
US6643630B1 (en) * 2000-04-13 2003-11-04 Koninklijke Philips Electronics N.V. Apparatus and method for annotating an intermediate representation of an application source code
US6598221B1 (en) * 2000-04-13 2003-07-22 Koninklijke Philips Electronics N.V. Assembly code performance evaluation apparatus and method
US20030023950A1 (en) * 2001-01-10 2003-01-30 Wei Ma Methods and apparatus for deep embedded software development
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US20040025151A1 (en) * 2002-07-31 2004-02-05 Shan-Chyun Ku Method for improving instruction selection efficiency in a DSP/RISC compiler
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US7386441B2 (en) * 2003-11-14 2008-06-10 Xerox Corporation Method and apparatus for processing natural language using auto-intersection

Also Published As

Publication number Publication date
WO2005033929A2 (en) 2005-04-14
CN1853164B (en) 2010-10-13
EP1668499A1 (en) 2006-06-14
US7437719B2 (en) 2008-10-14
US20050071825A1 (en) 2005-03-31
CN1853164A (en) 2006-10-25

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