WO2005049884A2 - Method for depositing silicon carbide and ceramic films - Google Patents

Method for depositing silicon carbide and ceramic films Download PDF

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Publication number
WO2005049884A2
WO2005049884A2 PCT/US2004/037064 US2004037064W WO2005049884A2 WO 2005049884 A2 WO2005049884 A2 WO 2005049884A2 US 2004037064 W US2004037064 W US 2004037064W WO 2005049884 A2 WO2005049884 A2 WO 2005049884A2
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WIPO (PCT)
Prior art keywords
reaction chamber
flow rate
substrate
precursor
silicon carbide
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PCT/US2004/037064
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French (fr)
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WO2005049884A3 (en
Inventor
Mehran Mehregany
Christian A. Zorman
Xiao-An Fu
Jeremy L. Dunning
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Case Western Reserve University
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Priority to EP04810481A priority Critical patent/EP1690287A2/en
Priority to AU2004291847A priority patent/AU2004291847A1/en
Priority to CA002546081A priority patent/CA2546081A1/en
Priority to JP2006539688A priority patent/JP4758354B2/en
Publication of WO2005049884A2 publication Critical patent/WO2005049884A2/en
Publication of WO2005049884A3 publication Critical patent/WO2005049884A3/en
Priority to IL175640A priority patent/IL175640A0/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/32—Carbides
    • C23C16/325—Silicon carbide
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures

Definitions

  • the present invention relates to silicon carbide and other films, and, more particularly, to controlled deposition of these films on a substrate.
  • MEMS/NEMS Semiconductor, micro- and nanoelectromechanical systems
  • MEMS/NEMS Semiconductor, micro- and nanoelectromechanical systems
  • One of the important steps in creating MEMS and NEMS devices is the deposition of thin films of material onto substrates. Once the fil s are deposited, various etching techniques may be employed to shape the deposited film.
  • silicon is a primary material.
  • Silicon carbide is a material that has very good physical and chemical characteristics, and is noted for these properties at temperatures above about 300°C. Silicon carbide is an advantageous material for use in films for MEMS and NEMS, particularly because of its exceptional electrical, mechanical, and chemical properties compared to silicon in normal and harsh operating environments.
  • the present invention provides methods of depositing films on a substrate that enables control of the residual stress, residual stress gradient, and electrical resistivity of the deposited film.
  • the invention includes films of various compositions, such as ceramic films with the ceramic compound having a metallic and non-metallic component.
  • the film is a silicon carbide film.
  • the silicon carbide film is deposited by chemical vapor deposition onto a substrate, such as a silicon substrate, by placing the substrate in a reaction chamber and evacuating the chamber to a pressure below about 10 mtorr. The temperature of the chamber is maintained at about 900°C.
  • a carbon precursor, such as acetylene (5% in hydrogen) is supplied to the chamber at a flow rate of about 180 standard cubic centimeters per minute (seem).
  • a silicon precursor, such as dichlorosilane (DCS) is supplied to the chamber at a flow rate of about 54 seem. As the precursors are supplied, the pressure of the reaction chamber increases and may be maintained at a fixed pressure.
  • the chamber is maintained at a pressure of about 2.0 torr.
  • a carbon precursor such as acetylene (5% in hydrogen)
  • a silicon precursor such as DCS
  • a silicon precursor such as DCS
  • tensile films with appreciable stress gradients are deposited at DCS flow rates below 35 seem and compressive films with appreciable stress gradients are deposited at DCS flow rates above 35 seem.
  • the film has a very low residual tensile stress ( ⁇ 20 MPa), a negligible stress gradient and a resistivity that is less than 10 ⁇ -cm without intentional doping. So control of the flow rate of the metal element precursor, in this case the silicon precursor DCS, with other parameters fixed resulted in control of the residual tensile stress, stress gradient, and electrical resistivity.
  • the present invention also relates to substrates having a silicon carbide film deposited thereon in which the residual stress is 0 ⁇ 100 MPa and the achieved electrical resistivity is less than about 10 ⁇ -cm, and to semiconductor, 3MEMS, and NEMS devices having such substrates.
  • Figure 1 is a schematic view of an apparatus used in the present invention.
  • Figure 2 is a schematic view of another embodiment of an apparatus used in the present invention.
  • Figure 3 is a graph of residual stress versus pressure for one embodiment of the present invention.
  • Figure 4(a) is a SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention
  • Figure 4(b) is another SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention.
  • Figure 5 is a graph of electrical resistivity versus deposition pressure for one embodiment of the present invention
  • Figure 6 is a graph of residual stress versus dischlorosilane flow rate for one embodiment of the present invention
  • Figure 7 is a SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention.
  • Figure 8 is a graph of electrical resistivity versus dischlorosilane flow rate for one embodiment of the present invention.
  • the present invention relates to the deposition of film, preferably a silicon carbide (SiC) film, onto a substrate with control of various properties, such as residual stress, residual stress gradient, and electrical resistivity,
  • SiC silicon carbide
  • the invention will be described as it relates to deposition of SiC onto a silicon substrate, particularly for use with MEMS and NEMS devices.
  • the invention is only exemplified by such description and is limited only by the claims included herein.
  • Silicon carbide film is desirable for use in MEMS and NEMS devices, as described above. Control of key properties, such as residual tensile stress, residual tensile stress gradient, and electrical resistivity, provides SiC films that may be effectively used in MEMS and NEMS devices. Silicon carbide films having low residual stress, less than about 100 MPa, and preferably less than about 50 MPa, are highly desirable for MEMS and NEMS applications. Conventional deposition techniques have heretofore been unable to achieve such low stress values in polycrystalline silicon carbide films.
  • control of stress properties such as residual stress and residual stress gradient, and electrical resistivity properties also may be desired to achieve other preselected values that may not be IO ⁇ V stress values.
  • SiC silicon carbide
  • Examples of such applications include pressure sensors for internal combustion and jet engines, wind tunnel sensors and instrumentation, and instrumentation and control systems of nuclear power systems.
  • silicon carbide can be used in device structures commonly made from silicon, such as acceleration sensors, biomedical sensors and actuators and other applications not typically characterized by harsh environments. Silicon carbide can be used as an alternative material to sihcon, capitalizing on the superior mechanical and chemical properties, as well as comparable electrical properties between SiC and silicon.
  • Applicants have successfully produced thin polycrystalline SiC films with controlled properties on silicon and silicon dioxide substrates in which the residual tensile stress is at or near zero, the electrical resistivity is very low, and the residual tensile stress gradient is near zero.
  • These films were produced by a low pressure chemical vapor deposition process, using dicholorosilane (SiH 2 Cl 2 ) as the precursor for silicon (Si) and a mixture of 5% acetylene (C 2 H 2 ) in hydrogen (H 2 ) as the precursor for carbon.
  • Applicants have determined that control of the silicon precursor flow rate and/or the pressure at which the deposition occurs allows for production of SiC film having the properties described above.
  • Successful production of cantilevers, bridges, membranes, and lateral resonant structures has been completed, demonstrating the viability of the material fabricated in accordance with the present invention in micromachining applications.
  • Examples of possible alternate silicon precursors include silane, trichlorosilane, and tetrachlorosilane, among others.
  • Possible alternate carbon precursors include carbon-containing gases, methane, propane, ethylene, xylene, butane, carbon tetrabromide, and other hydrocarbons.
  • Possible alternate silicon and/or carbon precursors may include single-source precursors for both sihcon and carbon.
  • Examples of possible single-source precursors for both silane and carbon include halosilane, trimethylsilane, tetramethylsilane, dimethyldimethoxysilane, tetramethylcyclotetrasiloxane, bis-trimethylsilylmethane, methyltrichlorosilane, tetraethylsilane, silacyclobutane, disilabutane, and any other material suitable for use as a single source precursor, as can be determined by one of ordinary skill in the art.
  • a single-source precursor is used, then either a separate carbon precursor or sihcon precursor may be provided to the chamber in order to correctly control the ratio of carbon to silicon in the reactor.
  • the flow rate of the single source of the sihcon or the single source of the carbon may be varied to achieve the proper ratio of carbon gas to silicon gas within the chamber so that the appropriate reaction occurs at the appropriate rate to deposit the silicon carbide film with the properties described above.
  • silicon-based films such as silicon nitride (Si 3 N ), silicon dioxide (SiO 2 ), silicon oxynitride (SiO x N y ) and silicon carbon nitride (SiC x N y ) may also be deposited with the method of the present invention using the appropriate precursors.
  • appropriate precursors may include silane (SfflU) or DCS for a silicon precursor, and ammonia (NH 3 ) for a nitrogen precursor.
  • the silicon precursor flow rate or the deposition pressure may be varied to achieve a deposited film having the properties described above. The optimal range of deposition pressure and silicon precursor flow rate may be determined without undue experimentation in accordance with this invention.
  • Ceramic films based on a non-silicon ceramic may also be deposited with the method of the present invention to achieve the properties described above.
  • Ceramic herein is defined as inorganic, nonmetaUic materials, typically crystalline in nature (but could be amorphous), and generally are compounds formed between metallic and nonmetaUic elements, such as aluminum and oxygen (alumina — Al 2 Os), calcium and oxygen (calcia — CaO), silicon and oxygen (silica — SiO 2 ), and other analogous oxides, nitrides, borides, sulfides, and carbides.
  • the flow rate of the nonmetaUic precursor is held fixed and the deposition pressure or the flow rate of the metaUic precursor would be varied to achieve the properties described above.
  • the optimal range of deposition pressure and metallic precursor flow rate may be determined without undue experimentation using the procedures provided herein.
  • Other compound semiconducting films based on materials other than silicon may also be deposited with the method of the present invention to achieve the properties described above. These materials include, but are not hmited to, GaN, GaAs, InP, and other analogous semiconductor materials deposited by chemical vapor deposition.
  • the examples described herein use silicon as the substrate material.
  • the method described herein is not limited to use of silicon and silicon derivative substrates, such as silicon carbide and silicon dioxide, but rather can be applied to the deposition on any substrate material where the resultant film is subjected to a residual stress.
  • Figs. 1 and 2 illustrate the apparatuses used to conduct the following procedures.
  • a reaction chamber 10, 110 of a low pressure vapor deposition apparatus 12, 112 Prior to loading sihcon substrate, wafers, of chips into a reaction chamber 10, 110 of a low pressure vapor deposition apparatus 12, 112, the wafers 14, 114 were cleaned using a standard RCA cleaning procedure. Silicon wafers 14, 114 of 100 mm diameter were placed into a conventional hot-wall horizontal cylindrical quartz furnace 16, 116.
  • the reaction or deposition chamber 10, 110 was 2007 mm in length and 225 mm in diameter.
  • the wafers were held in a SiC boat 18, 118 that rested on a paddle 20, 120 attached to a moveable front flange 22, 122 and placed near the center of the reaction chamber 10, 110.
  • the furnace tube was of conventional design, consisting of a long, quartz cylinder 17 that was capped on each end with metal flanges 22, 26.
  • the injection tubes 24 were attached to small ports on each of these flanges 22, 26.
  • the front flange 22 consisted of a large circular plate that served as the chamber door. This door was attached to a cantilever assembly for automatic loading and unloading.
  • the paddle 20 holding the SiC 18 boat was attached only to the inside surface of the front flange door assembly 22.
  • the rear flange 26 was not movable and was equipped with an outlet port that was attached to the vacuum system 28.
  • Precursor gases were simultaneously introduced via the gas injection tubes 24 through gas inlets 25 and ports in both the front flange 22 and the rear flange 26.
  • the injector tubes 24 were omitted.
  • the furnace tube consisted of a long quartz cylinder 117 that was circular in cross section at the front end 130 and conical in shape at the rear 132.
  • the front flange assembly 122 was as described above and was affixed to the front end 130 of the cylinder.
  • the rear 132 of the cylinder needed no flange, but instead contained a quartz nipple 134 that attached directly to the vacuum system 128. Gases were introduced into the chamber through gas inlets 125 and ports in the front flange 122. No tooling was included to inject the gases directly beneath the wafer boat 118.
  • the vacuum system 28, 128 consisted of a roots blower and mechanical pump combination (not shown) that can reach a base pressure of less than 1 mtorr in a fully loaded system, regardless of configuration. Pressure was controlled through pressure control system 36, 136. A butterfly valve 37, 137 was provided to assist with the pressure control. The gas flow rates and pressure control systems 36, 136 were controUed by a conventional furnace control computer system (not shown). The temperature in the reaction chamber 10, 110 was controlled via resistive heating coils 38, 138.
  • Each load consisted of 25 Si wafers evenly distributed in a single, 50-slot SiC boat. The first and last five wafers were designated as baffling wafers to stabilize gas flow. Wafers in slots 6, 10, 13, 16, and 20 from the loading end were designated for study.
  • Fig. 1 illustrates the low pressure chemical vapor deposition apparatus 12 used for these tests. Depositions were performed for two hours at pressure settings from about 0.42 torr to about 5 torr. In several cases, longer times were used to deposit thicker films. The flow rates of DCS and acetylene (5% in hydrogen) were held constant at about 54 standard cubic centimeters per minute (seem) and 180 seem, respectively. The temperature was held fixed at about 900°C. The furnace was configured with injector tubes to introduce the acetylene and DCS gases into the reaction chamber.
  • the thickness of the films was measured optically using a Nanospec 4000 AFT spectrophotometer.
  • the film residual stresses were determined by measuring the curvature of the silicon wafers before and after film deposition, using a laser- based curvature measuring system (Frontier Semiconductor measurement, FSM 120). Silicon carbide films were deposited on both sides of the wafer, and reactive etching in a CHF 3 /O 2 mixture was used to remove the film deposited on the backside of the wafers.
  • Figure 3 illustrates the relationship between the deposition pressure and the residual tensile stress of the SiC at 900°C resulting from this series of tests.
  • the residual stress changed roughly from about 700 MPa (tensile) at 456 mtorr to about -100 MPa (compressive) at 5 torr, with films deposited at about 2.65 torr having near zero residual stress. Films deposited at pressures from about 2.5 torr to about 5 torr had stress values between about 100 MPa and -100 MPa.
  • the value of stress varied little from wafer to wafer in the same run, as indicated by Figure 3.
  • Single layer cantilever beams were fabricated from about 500 nm-thick polycrystaUine SiC films made in accordance with this example to characterize the stress gradient at various deposition pressures.
  • the stress gradient is the change in the magnitude of residual stress as a function of film thickness. Stress gradients can cause cantilever beams to bend, whereas beams made from films with little or no stress gradient remain flat.
  • a stress gradient near zero is desirable when the planarity of device structures is required.
  • a residual stress gradient in the structural layers of MEMS/NEMS devices is desirable in applications where curved or strained structures are needed. In such structures, precise control of residual stress gradient is required. Control of stress gradients requires precision control of residual stresses.
  • Figure 4(a) illustrates a cantilever beam 210 made in accordance with the present invention at about 2.65 torr.
  • the beam 210 is generally flat and exhibits little, if any, bending.
  • Figure 4(b) illustrates a stressed cantilever beam 212 made in accordance with the present invention at about 3.75 torr. This beam 212 bends slightly upward.
  • Figure 5 illustrates the electrical resistivity of films made in accordance with the present invention at various deposition pressures. These data indicate a relationship between deposition pressure and electrical resistivity. The minimum electrical resistivity occurs near the deposition pressure at which the residual stress and the residual stress gradient are nearly zero, namely, about 2.65 torr.
  • Electrical resistivity is less than 10 ⁇ -cm at deposition pressures from slightly greater than about 2.0 torr to about 4.5 torr. While these values may seem high relative to other semiconductors (including SiC), these measurements were made from polycrystaUine films that were not doped either before or after deposition. It is common practice to use doping procedures to reduce the electrical resistivity of semiconducting materials, especially SiC. These findings strongly suggest that doping during the deposition process will be most effective using conditions that favor low stress and low stress gradients.
  • Figure 6 illustrates the measured residual stress versus the flow rate of the DCS.
  • the observed residual stress decreased as a function of DCS flow rate until a flow rate of 36 seem.
  • the residual stress was substantially the same at a flow rate of 54 seem as it was at a flow rate of 36 seem.
  • the residual stress as a function of flow rate, as illustrated in Figure 6, appears to be similar to the residual stress as a function of deposition pressure, as illustrated in Figure 3.
  • Figure 7 is a SEM micrograph of a micromachined second cantilever beam 214 made in accordance with this example of the present invention at a dicholorosilane flow rate of about 35 seem As seen from Figure 6, a dicholorosilane flow rate of about 35 seem corresponds to residual stress of less than 50 MPa. Films with low residual stress values, such as the second cantilever beam 214 in Figure 7, exhibit very low residual stress gradient. The second cantilever beam 214 illustrated in Figure 7 exhibits substantially no bending.
  • Figure 8 is a graph of electrical resistivity versus DCS flow rate, illustrating that the electrical resistivity exhibits a strong relationship to DCS flow rate.
  • the minimum value of electrical resistivity slightly greater than 3 ⁇ -cm, occurs at 35 seem and 36 seem DCS.
  • the films were not intentionally doped either during or after the deposition process.
  • the electrical resistivity value and the residual stress nearest to zero occurred at a DCS flow rate of about 35 seem.

Abstract

A method of depositing a ceramic film, particularly a silicon carbide film, on a substrate is disclosed in which the residual stress, residual stress gradient, and resistivity are controlled. Also disclosed are substrates having a deposited film with these controlled properties and devices, particularly MEMS and NEMS devices, having substrates with films having these properties.

Description

SILICON CARBIDE AND OTHER FD MS AND METHOD OF DEPOSITION STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT [0001] A part of this invention was made with government support under Contracts No. NCA3-201 awarded by NASA and DABT 63-1-0010 awarded by DARPA. The government has certain rights in this invention.
BACKGROUND [0002] The present invention relates to silicon carbide and other films, and, more particularly, to controlled deposition of these films on a substrate.
[0003] Semiconductor, micro- and nanoelectromechanical systems (MEMS/NEMS) apply integrated circuit fabrication technology to fabricate optical, mechanical, electrochemical, and biosensor devices. One of the important steps in creating MEMS and NEMS devices is the deposition of thin films of material onto substrates. Once the fil s are deposited, various etching techniques may be employed to shape the deposited film.
[0004] In typical MEMS/NEMS devices, silicon is a primary material. Silicon carbide is a material that has very good physical and chemical characteristics, and is noted for these properties at temperatures above about 300°C. Silicon carbide is an advantageous material for use in films for MEMS and NEMS, particularly because of its exceptional electrical, mechanical, and chemical properties compared to silicon in normal and harsh operating environments.
[0005] One of the barriers limiting development of silicon carbide in MEMS production has been the inability to deposit uniform films of silicon carbide on large area substrates having properties that are advantageous to and required for MEMS and NEMS. Deposition of silicon carbide is conventionally subject to variations in residual stress, residual stress gradient, and electrical resistivity. These properties are important to the proper operation of MEMS and NEMS devices.
[0006] With silicon, residual stress, residual stress gradient and electrical resistivity can be controlled after the film is deposited by annealing the film at elevated temperatures. Annealing in silicon induces crystallographic changes that result in the modification of these properties. With single crystalline and polycrystalline silicon carbide, such an approach is not feasible because silicon carbide is chemically and crystallographically stable at conventional annealing temperatures. For silicon carbide films deposited on silicon substrates, annealing is completely ineffective because the non-silicon carbide substrate limits the annealing temperatures to temperatures too low for effective annealing. The present invention bypasses the need for annealing altogether by implementing control of the residual stress, residual stress gradient, and electrical resistivity in the silicon carbide films during the film formation (deposition) process.
SUMMARY OF THE INVENTION
[0007] The present invention provides methods of depositing films on a substrate that enables control of the residual stress, residual stress gradient, and electrical resistivity of the deposited film. The invention includes films of various compositions, such as ceramic films with the ceramic compound having a metallic and non-metallic component. Preferably, the film is a silicon carbide film. The silicon carbide film is deposited by chemical vapor deposition onto a substrate, such as a silicon substrate, by placing the substrate in a reaction chamber and evacuating the chamber to a pressure below about 10 mtorr. The temperature of the chamber is maintained at about 900°C. A carbon precursor, such as acetylene (5% in hydrogen) is supplied to the chamber at a flow rate of about 180 standard cubic centimeters per minute (seem). A silicon precursor, such as dichlorosilane (DCS), is supplied to the chamber at a flow rate of about 54 seem. As the precursors are supplied, the pressure of the reaction chamber increases and may be maintained at a fixed pressure.
[0008] Under these conditions, tensile firms with appreciable stress gradients are deposited at pressures less than 2.65 torr and compressive films with appreciable stress gradients are deposited at pressures greater than 2.65 torr. At 2.65 torr, the film has a very low residual tensile stress (< 20 MPa), a negligible stress gradient, and a resistivity that is less than 10 Ω-cm without intentional doping. So control of the pressure with other parameters fixed resulted in control of the residual tensile stress, stress gradient, and electrical resistivity. [0009] In another embodiment, the chamber is maintained at a pressure of about 2.0 torr. A carbon precursor, such as acetylene (5% in hydrogen), is supplied to the chamber at a flow rate of about 180 standard cubic centimeters per minute (seem). A silicon precursor, such as DCS, is supplied to the chamber at a flow rates between 18 and 72 seem. Under these conditions, tensile films with appreciable stress gradients are deposited at DCS flow rates below 35 seem and compressive films with appreciable stress gradients are deposited at DCS flow rates above 35 seem. At a DCS flow rate of 35 seem, the film has a very low residual tensile stress (< 20 MPa), a negligible stress gradient and a resistivity that is less than 10 Ω-cm without intentional doping. So control of the flow rate of the metal element precursor, in this case the silicon precursor DCS, with other parameters fixed resulted in control of the residual tensile stress, stress gradient, and electrical resistivity.
[0010] The present invention also relates to substrates having a silicon carbide film deposited thereon in which the residual stress is 0 ± 100 MPa and the achieved electrical resistivity is less than about 10 Ω-cm, and to semiconductor, 3MEMS, and NEMS devices having such substrates.
DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 is a schematic view of an apparatus used in the present invention;
[0012] Figure 2 is a schematic view of another embodiment of an apparatus used in the present invention;
[0013] Figure 3 is a graph of residual stress versus pressure for one embodiment of the present invention;
[0014] Figure 4(a) is a SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention;
[0015] Figure 4(b) is another SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention;
[0016] Figure 5 is a graph of electrical resistivity versus deposition pressure for one embodiment of the present invention; [0017] Figure 6 is a graph of residual stress versus dischlorosilane flow rate for one embodiment of the present invention;
[0018] Figure 7 is a SEM micrograph of a silicon carbide cantilever from a film made in accordance with one embodiment of the present invention; and
[0019] Figure 8 is a graph of electrical resistivity versus dischlorosilane flow rate for one embodiment of the present invention.
DETAILED DESCRIPTION
[0020] The present invention relates to the deposition of film, preferably a silicon carbide (SiC) film, onto a substrate with control of various properties, such as residual stress, residual stress gradient, and electrical resistivity, The invention will be described as it relates to deposition of SiC onto a silicon substrate, particularly for use with MEMS and NEMS devices. The invention, however, is only exemplified by such description and is limited only by the claims included herein.
[0021] Silicon carbide film, particularly polycrystalline SiC film, is desirable for use in MEMS and NEMS devices, as described above. Control of key properties, such as residual tensile stress, residual tensile stress gradient, and electrical resistivity, provides SiC films that may be effectively used in MEMS and NEMS devices. Silicon carbide films having low residual stress, less than about 100 MPa, and preferably less than about 50 MPa, are highly desirable for MEMS and NEMS applications. Conventional deposition techniques have heretofore been unable to achieve such low stress values in polycrystalline silicon carbide films.
[0022] In these and other applications, control of stress properties, such as residual stress and residual stress gradient, and electrical resistivity properties also may be desired to achieve other preselected values that may not be IOΛV stress values.
[0023] These films are particularly suitable for use in devices operating in harsh environments because of the outstanding mechanical, electrical, and chemical properties of SiC. Examples of such applications include pressure sensors for internal combustion and jet engines, wind tunnel sensors and instrumentation, and instrumentation and control systems of nuclear power systems. In addition, silicon carbide can be used in device structures commonly made from silicon, such as acceleration sensors, biomedical sensors and actuators and other applications not typically characterized by harsh environments. Silicon carbide can be used as an alternative material to sihcon, capitalizing on the superior mechanical and chemical properties, as well as comparable electrical properties between SiC and silicon.
[0024] Applicants have successfully produced thin polycrystalline SiC films with controlled properties on silicon and silicon dioxide substrates in which the residual tensile stress is at or near zero, the electrical resistivity is very low, and the residual tensile stress gradient is near zero. These films were produced by a low pressure chemical vapor deposition process, using dicholorosilane (SiH2Cl2) as the precursor for silicon (Si) and a mixture of 5% acetylene (C2H2) in hydrogen (H2) as the precursor for carbon. Applicants have determined that control of the silicon precursor flow rate and/or the pressure at which the deposition occurs allows for production of SiC film having the properties described above. Successful production of cantilevers, bridges, membranes, and lateral resonant structures has been completed, demonstrating the viability of the material fabricated in accordance with the present invention in micromachining applications.
[0025] It is believed that control of the flow rate of silicon precursor and/or the deposition pressure of the reaction chamber while other parameters are fixed will enable control of the residual stress, the residual stress gradient, and the electrical resistivity of silicon carbide film deposited by vapor deposition for any sihcon precursor and carbon precursor. One of ordinary skill in art may determine the appropriate pressure and silicon precursor flow rate to achieve minimum residual stress, residual stress gradient, and electrical resistivity without undue experimentation, and use of alternate silicon and carbon precursors does not depart from the spirit and scope of the invention.
[0026] Examples of possible alternate silicon precursors include silane, trichlorosilane, and tetrachlorosilane, among others. Possible alternate carbon precursors include carbon-containing gases, methane, propane, ethylene, xylene, butane, carbon tetrabromide, and other hydrocarbons. [0027] Possible alternate silicon and/or carbon precursors may include single-source precursors for both sihcon and carbon. Examples of possible single-source precursors for both silane and carbon include halosilane, trimethylsilane, tetramethylsilane, dimethyldimethoxysilane, tetramethylcyclotetrasiloxane, bis-trimethylsilylmethane, methyltrichlorosilane, tetraethylsilane, silacyclobutane, disilabutane, and any other material suitable for use as a single source precursor, as can be determined by one of ordinary skill in the art.
[0028] If a single-source precursor is used, then either a separate carbon precursor or sihcon precursor may be provided to the chamber in order to correctly control the ratio of carbon to silicon in the reactor. In this, event, the flow rate of the single source of the sihcon or the single source of the carbon may be varied to achieve the proper ratio of carbon gas to silicon gas within the chamber so that the appropriate reaction occurs at the appropriate rate to deposit the silicon carbide film with the properties described above.
[0029] Other silicon-based films, such as silicon nitride (Si3N ), silicon dioxide (SiO2), silicon oxynitride (SiOxNy) and silicon carbon nitride (SiCxNy) may also be deposited with the method of the present invention using the appropriate precursors. In the case of silicon nitride, appropriate precursors may include silane (SfflU) or DCS for a silicon precursor, and ammonia (NH3) for a nitrogen precursor. The silicon precursor flow rate or the deposition pressure may be varied to achieve a deposited film having the properties described above. The optimal range of deposition pressure and silicon precursor flow rate may be determined without undue experimentation in accordance with this invention.
[0030] Other ceramic films based on a non-silicon ceramic may also be deposited with the method of the present invention to achieve the properties described above. Use of the term "ceramic" herein is defined as inorganic, nonmetaUic materials, typically crystalline in nature (but could be amorphous), and generally are compounds formed between metallic and nonmetaUic elements, such as aluminum and oxygen (alumina — Al2Os), calcium and oxygen (calcia — CaO), silicon and oxygen (silica — SiO2), and other analogous oxides, nitrides, borides, sulfides, and carbides. The flow rate of the nonmetaUic precursor is held fixed and the deposition pressure or the flow rate of the metaUic precursor would be varied to achieve the properties described above. The optimal range of deposition pressure and metallic precursor flow rate may be determined without undue experimentation using the procedures provided herein.
[0031] Other compound semiconducting films based on materials other than silicon may also be deposited with the method of the present invention to achieve the properties described above. These materials include, but are not hmited to, GaN, GaAs, InP, and other analogous semiconductor materials deposited by chemical vapor deposition.
[0032] The examples described herein use silicon as the substrate material. The method described herein is not limited to use of silicon and silicon derivative substrates, such as silicon carbide and silicon dioxide, but rather can be applied to the deposition on any substrate material where the resultant film is subjected to a residual stress.
Test Procedure
[0033] Figs. 1 and 2 illustrate the apparatuses used to conduct the following procedures. Prior to loading sihcon substrate, wafers, of chips into a reaction chamber 10, 110 of a low pressure vapor deposition apparatus 12, 112, the wafers 14, 114 were cleaned using a standard RCA cleaning procedure. Silicon wafers 14, 114 of 100 mm diameter were placed into a conventional hot-wall horizontal cylindrical quartz furnace 16, 116. The reaction or deposition chamber 10, 110 was 2007 mm in length and 225 mm in diameter. The wafers were held in a SiC boat 18, 118 that rested on a paddle 20, 120 attached to a moveable front flange 22, 122 and placed near the center of the reaction chamber 10, 110.
[0034] In the configuration illustrated in Fig. 1, two small injection tubes 24, one for the dicholorosilane and one for the acetylene, were used to introduce these precursor gasses into the chamber 10 directly underneath the boat 18. To accommodate these injection tubes 24, the furnace tube was of conventional design, consisting of a long, quartz cylinder 17 that was capped on each end with metal flanges 22, 26. The injection tubes 24 were attached to small ports on each of these flanges 22, 26. The front flange 22 consisted of a large circular plate that served as the chamber door. This door was attached to a cantilever assembly for automatic loading and unloading. The paddle 20 holding the SiC 18 boat was attached only to the inside surface of the front flange door assembly 22. The rear flange 26 was not movable and was equipped with an outlet port that was attached to the vacuum system 28. Precursor gases were simultaneously introduced via the gas injection tubes 24 through gas inlets 25 and ports in both the front flange 22 and the rear flange 26.
[0035] In a second configuration illustrated in Fig. 2, the injector tubes 24 were omitted. In this configuration, the furnace tube consisted of a long quartz cylinder 117 that was circular in cross section at the front end 130 and conical in shape at the rear 132. The front flange assembly 122 was as described above and was affixed to the front end 130 of the cylinder. The rear 132 of the cylinder needed no flange, but instead contained a quartz nipple 134 that attached directly to the vacuum system 128. Gases were introduced into the chamber through gas inlets 125 and ports in the front flange 122. No tooling was included to inject the gases directly beneath the wafer boat 118.
[0036] The vacuum system 28, 128 consisted of a roots blower and mechanical pump combination (not shown) that can reach a base pressure of less than 1 mtorr in a fully loaded system, regardless of configuration. Pressure was controlled through pressure control system 36, 136. A butterfly valve 37, 137 was provided to assist with the pressure control. The gas flow rates and pressure control systems 36, 136 were controUed by a conventional furnace control computer system (not shown). The temperature in the reaction chamber 10, 110 was controlled via resistive heating coils 38, 138.
[0037] Each load consisted of 25 Si wafers evenly distributed in a single, 50-slot SiC boat. The first and last five wafers were designated as baffling wafers to stabilize gas flow. Wafers in slots 6, 10, 13, 16, and 20 from the loading end were designated for study.
Example 1
[0038] Fig. 1 illustrates the low pressure chemical vapor deposition apparatus 12 used for these tests. Depositions were performed for two hours at pressure settings from about 0.42 torr to about 5 torr. In several cases, longer times were used to deposit thicker films. The flow rates of DCS and acetylene (5% in hydrogen) were held constant at about 54 standard cubic centimeters per minute (seem) and 180 seem, respectively. The temperature was held fixed at about 900°C. The furnace was configured with injector tubes to introduce the acetylene and DCS gases into the reaction chamber.
[0039] Following each deposition, the thickness of the films was measured optically using a Nanospec 4000 AFT spectrophotometer. The film residual stresses were determined by measuring the curvature of the silicon wafers before and after film deposition, using a laser- based curvature measuring system (Frontier Semiconductor measurement, FSM 120). Silicon carbide films were deposited on both sides of the wafer, and reactive etching in a CHF3/O2 mixture was used to remove the film deposited on the backside of the wafers.
[0040] Figure 3 illustrates the relationship between the deposition pressure and the residual tensile stress of the SiC at 900°C resulting from this series of tests. The residual stress changed roughly from about 700 MPa (tensile) at 456 mtorr to about -100 MPa (compressive) at 5 torr, with films deposited at about 2.65 torr having near zero residual stress. Films deposited at pressures from about 2.5 torr to about 5 torr had stress values between about 100 MPa and -100 MPa. The value of stress varied little from wafer to wafer in the same run, as indicated by Figure 3.
[0041] Single layer cantilever beams were fabricated from about 500 nm-thick polycrystaUine SiC films made in accordance with this example to characterize the stress gradient at various deposition pressures. The stress gradient is the change in the magnitude of residual stress as a function of film thickness. Stress gradients can cause cantilever beams to bend, whereas beams made from films with little or no stress gradient remain flat. For MEMS and NEMS devices, a stress gradient near zero is desirable when the planarity of device structures is required. A residual stress gradient in the structural layers of MEMS/NEMS devices is desirable in applications where curved or strained structures are needed. In such structures, precise control of residual stress gradient is required. Control of stress gradients requires precision control of residual stresses.
[0042] Figure 4(a) illustrates a cantilever beam 210 made in accordance with the present invention at about 2.65 torr. The beam 210 is generally flat and exhibits little, if any, bending. Figure 4(b) illustrates a stressed cantilever beam 212 made in accordance with the present invention at about 3.75 torr. This beam 212 bends slightly upward. [0043] Figure 5 illustrates the electrical resistivity of films made in accordance with the present invention at various deposition pressures. These data indicate a relationship between deposition pressure and electrical resistivity. The minimum electrical resistivity occurs near the deposition pressure at which the residual stress and the residual stress gradient are nearly zero, namely, about 2.65 torr. Electrical resistivity is less than 10 Ω-cm at deposition pressures from slightly greater than about 2.0 torr to about 4.5 torr. While these values may seem high relative to other semiconductors (including SiC), these measurements were made from polycrystaUine films that were not doped either before or after deposition. It is common practice to use doping procedures to reduce the electrical resistivity of semiconducting materials, especially SiC. These findings strongly suggest that doping during the deposition process will be most effective using conditions that favor low stress and low stress gradients.
Example 2
[0044] The same procedure described above was used, except that the low pressure chemical vapor deposition apparatus 112 illustrated in Fig. 2 was used (no injectors, single front flange). For this series of tests, the deposition pressure was maintained essentially constant at about 2.0 torr, and the flow rate of the silicon precursor, in this case DCS, was varied between about 18 seem and about 54 seem. The flow rate of acetylene (5% in hydrogen) was fixed at about 180 seem, and the temperature of the reaction chamber was maintained at about 900°C.
[0045] As above, the films were characterized for residual stress, residual stress gradient, and electrical resistivity. Figure 6 illustrates the measured residual stress versus the flow rate of the DCS. The observed residual stress decreased as a function of DCS flow rate until a flow rate of 36 seem. The residual stress was substantially the same at a flow rate of 54 seem as it was at a flow rate of 36 seem. The residual stress as a function of flow rate, as illustrated in Figure 6, appears to be similar to the residual stress as a function of deposition pressure, as illustrated in Figure 3.
[0046] Figure 7 is a SEM micrograph of a micromachined second cantilever beam 214 made in accordance with this example of the present invention at a dicholorosilane flow rate of about 35 seem As seen from Figure 6, a dicholorosilane flow rate of about 35 seem corresponds to residual stress of less than 50 MPa. Films with low residual stress values, such as the second cantilever beam 214 in Figure 7, exhibit very low residual stress gradient. The second cantilever beam 214 illustrated in Figure 7 exhibits substantially no bending.
[0047] Figure 8 is a graph of electrical resistivity versus DCS flow rate, illustrating that the electrical resistivity exhibits a strong relationship to DCS flow rate. The minimum value of electrical resistivity, slightly greater than 3 Ω-cm, occurs at 35 seem and 36 seem DCS. As with Example 1, the films were not intentionally doped either during or after the deposition process. In this example, the electrical resistivity value and the residual stress nearest to zero occurred at a DCS flow rate of about 35 seem.
[0048] While the present invention has been illustrated by the above description of embodiments, and while the embodiments have been described in some detail, it is not the intent of the applicants to restrict or in any way limit the scope of the invention to such detail. Additional advantages and modifications will readily appear to those skilled in the art, such as the use of alternate precursors or the deposition of alternate films. Therefore, the invention in its broader aspects is not limited to the specific details, representative apparatus and methods, and illustrative examples shown and described. Accordingly, departures ay be made from such details without departing from the spirit or scope of the applicants' general or inventive concept.

Claims

We claim:
1. A method of depositing a silicon carbide film on a substrate by chemical vapor deposition, comprising
(a) placing at least one substrate in a reaction chamber;
(b) supplying silicon precursor to the reaction chamber at a predetermined fixed flow rate;
(c) supplying carbon precursor to the reaction chamber at a predetermined fixed flow rate;
(d) controlling the stress in the deposited silicon carbide film by controUing pressure in the reaction chamber.
2. The method of claim 1, wherein the substrate is silicon.
3. The method of claim 1, wherein the substrate is silicon dioxide or silicon carbide.
4. The method of claim 1 , wherein the silicon carbide comprises polycrystalline sihcon carbide.
5. The method of claim 1, wherein the predetermined flow rate of the silicon precursor is about 54 standard cubic centimeters per minute.
6. The method of claim 1, wherein the sihcon precursor is selected from the group consisting of silane, halosilane, trimethylsilane, tetramethylsilane, dimethyldimethoxysilane, tetramethylcyclotetrasiloxane, bis-trimethylsilylmethane, methyltrichlorosilane, silane, tetraethylsilane, and silacyclobutane.
7. The method of claim 6, wherein the halosilane is selected from the group consisting of dichlhorosilane, trichlorosilane, and tetrachlorosilane.
8. The method of claim 7, wherein the silicon precursor is dichlorosilane.
9. The method of claim 1, wherein the pressure in the reaction chamber is controlled between about 0.42 torr and about 5 torr.
10. The method of claim 9, wherein the pressure in the reaction chamber is controlled at about 2.65 torr.
11. The method of claim 1, wherein the pressure in the reaction chamber is controUed to minimize residual stress in the deposited silicon carbide fil
12. The method of claim 11, wherein the residual stress in the deposited silicon carbide film is between about 700 MPa and about -100 MPa.
13. The method of claim 11, wherein the pressure in the reaction chamber is controUed at about 2.65 torr.
14. The method of claim 1, further comprising maintaining the reaction chamber at a fixed temperature.
15. The method of claim 14, wherein the fixed temperature is about 900 °C.
16. The method of claim 1, wherein the predetermined flow rate of the carbon precursor is about 180 standard cubic centimeters per minute.
17. The method of claim 1, wherein supplying carbon precursor comprises supplying acetylene in hydrogen to the reaction chamber at a flow rate of about 180 standard cubic centimeters per minute.
18. The method of claim 1, further comprising controlling the electrical resistivity of the silicon carbide.
19. The method of claim 18, wherein the electrical resistivity of the deposited silicon carbide is less than about 10 Ω-cm.
20. The method of claim 18, wherein controlling the electrical resistivity comprises controlling the pressure in the reaction chamber.
21. A method of depositing a silicon carbide film on a substrate by chemical vapor deposition, comprising
(a) placing at least one substrate in a reaction chamber;
(b) maintaining the reaction chamber at a predetermined pressure;
(c) supplying carbon precursor to the reaction chamber at a predetermined fixed flow rate;
(d) supplying silicon precursor to the reaction chamber at a flow rate; and
(e) controlling the silicon precursor flow rate to control the stress in the deposited silicon carbide fil
22. The method of claim 21, wherein the substrate is silicon.
23. The method of claim 21, wherein the substrate is silicon dioxide.
24. The method of claim 21, wherein the silicon carbide comprises polycrystaUine sihcon carbide.
25. The method of claim 21, wherein the predetermined pressure is about 2.0 torr.
26. The method of claim 21, wherein the silicon precursor is selected from the group consisting of silane, halosilane, trimethylsilane, tetramethylsilane, dimethyldimethoxysilane, tetramethylcyclotetrasiloxane, bis-trimethylsilylmethane, methyltrichlorosUane, silane, tetraethylsilane, and silacyclobutane.
27. The method of claim 26, wherem the halosUane is selected from the group consisting of dichlhorosilane, trichlorosUane, and tetrachlorosilane.
28. The method of claim 27, wherein the silicon precursor is dichlorosilane.
29. The method of claim 21, wherein the flow rate of the sihcon precursor is controlled between about 18 standard cubic centimeters per minute and about 54 standard cubic centimeters per minute.
30. The method of claim 29, wherein the flow rate of the silicon precursor is controUed at about 36 standard cubic centimeters per minute.
31. The method of claim 21, wherein the flow rate of the sUicon precursor is controUed to minimize residual stress in the deposited silicon carbide film.
32. The method of claim 31, wherein the residual stress in the deposited silicon carbide film is between about 700 MPa and about -100 MPa.
33. The method of claim 31, wherein the flow rate of the silicon precursor is controlled at about 36 standard cubic centimeters per minute.
34. The method of claim 21, further comprising maintaining the reaction chair±ber at a fixed temperature.
35. The method of claim 34, wherein the fixed temperature is about 900 °C.
36. The method of claim 21, wherein the predetermined flow rate of the carbon precursor is about 180 standard cubic centimeters per minute.
37. The method of claim 21, wherein supplying carbon precursor comprises supplying acetylene in hydrogen to the reaction chamber at a flow rate of about 180 standard cubic centimeters per minute.
38. The method of claim 21, further comprising controUing the electrical resistivity of the silicon carbide.
39. The method of claim 38, wherein the electrical resistivity of the deposited silicon carbide is less than about 10 Ω-cm.
40. The method of claim 38, wherein controlling the electrical resistivity comprises controUing the flow rate of the silicon precursor.
41. A method of controUing the stress of a silicon carbide film during deposition, of the silicon carbide film on a substrate to achieve desired stress values comprising (a) placing at least one substrate in a reaction chamber;
(b) supplying silicon precursor to the chamber at a predetermined fixed flow rate;
(c) supplying carbon precursor to the chamber at a predetermined fixed flow rate;
(d) controUing the pressure in the reaction chamber to achieve the desired stress values.
42. A method of controUing the stress of a sihcon carbide film during deposition of the snicon carbide film on a substrate to achieve desired stress values comprising
(a) placing at least one substrate in a reaction chamber;
(b) maintaining the reaction chamber at a predetermined pressure;
(c) supplying carbon precursor to the chamber at a predetermined fixed flow rate;
(d) controUing the flow rate of silicon precursor provided to the chamber to achieve the desired stress values.
43. A substrate having a silicon carbide film deposited thereon, wherein the sihcon carbide film has a residual stress of between about 100 MPa and about -100 MPa
44. The substrate of claim 43, wherein the electrical resistivity of the silicon carbide film is less than about 5 Ω-cm.
45. The substrate of claim 43, wherein the residual stress is about 0 MPa.
46. The substrate of claim 43, wherein the substrate is a silicon wafer or silicon chip.
47. A micromechanical, microelectromechanical, nanomechanical, or nanoelectromechanical device comprising a substrate having a silicon carbide film deposited thereon, the sihcon carbide film having a residual stress of between about 100 MPa and about -100 MPa, and electrical resistivity less than about 5 Ω-cm.
48. A micromechanical, microelectromechanical, nanomechanical, or nanoelectromechanical device comprising a substrate having a silicon carbide film deposited thereon by the method of claim 1.
49. A micromechanical, microelectromechanical, nanomechanical, or nanoelectromechanical device comprising a substrate having a silicon carbide film deposited thereon by the method of claim 21.
50. A method of depositing a ceramic film on a substrate to achieve a desired residual stress in the film comprising: (a) placing at least one substrate in a reaction chamber;
(b) maintaining the reaction chamber at a predetermined fixed temperature;
(c) supplying metaUic element precursor to the reaction chamber at a predetermined fixed flow rate;
(d) supplying a nonmetaUic element precursor to the reaction chamber at a predetermined fixed flow rate; and
(e) controUing the stress in the deposited silicon carbide film by controlling pressure in the reaction chamber.
51. The method of claim 50, wherein the film is a compound semiconductor film.
52. A method of depositing a ceramic film on a substrate to achieve a desired residual stress in the film comprising:
(a) placing at least one substrate in a reaction chamber;
(b) maintaining the reaction chamber at a predetermined fixed temperature;
(c) maintaining the reaction chamber at a predetermined fixed pressure;
(d) supplying a nonmetaUic element precursor to the reaction chamber at a predetermined fixed flow rate;
(e) supplying a metallic element precursor to the reaction chamber at a flow rate; and (f) controlhng the metallic element precursor flow rate to achieve the desired residual stress in the deposited silicon carbide film.
53. The method of claim 52, wherein the film is a compound semiconductor film.
PCT/US2004/037064 2003-11-18 2004-11-05 Method for depositing silicon carbide and ceramic films WO2005049884A2 (en)

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