WO2005055500A3 - Calibrating capacitor mismatch in a pipe-line adc - Google Patents
Calibrating capacitor mismatch in a pipe-line adc Download PDFInfo
- Publication number
- WO2005055500A3 WO2005055500A3 PCT/US2004/040033 US2004040033W WO2005055500A3 WO 2005055500 A3 WO2005055500 A3 WO 2005055500A3 US 2004040033 W US2004040033 W US 2004040033W WO 2005055500 A3 WO2005055500 A3 WO 2005055500A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- mismatch
- pipe
- capacitor mismatch
- capacitor
- line adc
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
- H03M1/109—Measuring or testing for dc performance, i.e. static testing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
- H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
- H03M1/167—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters
- H03M1/168—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters and delivering the same number of bits
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006541495A JP2007521767A (en) | 2003-11-28 | 2004-11-29 | Calibration of capacitor mismatch in pipeline ADC |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/722,416 | 2003-11-28 | ||
US10/722,416 US6891486B1 (en) | 2003-11-28 | 2003-11-28 | Calibrating capacitor mismatch in a pipeline ADC |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005055500A2 WO2005055500A2 (en) | 2005-06-16 |
WO2005055500A3 true WO2005055500A3 (en) | 2007-11-08 |
Family
ID=34552745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2004/040033 WO2005055500A2 (en) | 2003-11-28 | 2004-11-29 | Calibrating capacitor mismatch in a pipe-line adc |
Country Status (3)
Country | Link |
---|---|
US (1) | US6891486B1 (en) |
JP (1) | JP2007521767A (en) |
WO (1) | WO2005055500A2 (en) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7091891B2 (en) * | 2004-04-28 | 2006-08-15 | Analog Devices, Inc. | Calibration of analog to digital converter by means of multiplexed stages |
US7358801B2 (en) * | 2004-08-16 | 2008-04-15 | Texas Instruments Incorporated | Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage |
JP2006173807A (en) * | 2004-12-13 | 2006-06-29 | Sanyo Electric Co Ltd | A/d converter |
US7002506B1 (en) * | 2004-12-23 | 2006-02-21 | Texas Instruments Incorporated | Providing pipe line ADC with acceptable bit error and power efficiency combination |
US7088273B1 (en) * | 2005-05-30 | 2006-08-08 | Texas Instruments Incorporated | Reducing noise in switched capacitor amplifier circuit |
WO2009091620A1 (en) * | 2008-01-17 | 2009-07-23 | President And Fellows Of Harvard College | Digital background calibration in pipelined adcs |
US7825837B1 (en) | 2008-09-05 | 2010-11-02 | National Semiconductor Corporation | Background calibration method for analog-to-digital converters |
US7830159B1 (en) * | 2008-10-10 | 2010-11-09 | National Semiconductor Corporation | Capacitor mismatch measurement method for switched capacitor circuits |
US8451154B2 (en) * | 2008-10-22 | 2013-05-28 | Integrated Device Technology, Inc. | Pipelined ADC calibration |
US8330631B2 (en) | 2009-03-06 | 2012-12-11 | National Semiconductor Corporation | Background calibration method for fixed gain amplifiers |
US8686744B2 (en) | 2010-07-20 | 2014-04-01 | Texas Instruments Incorporated | Precision measurement of capacitor mismatch |
TWI459723B (en) * | 2012-02-03 | 2014-11-01 | Nat Univ Chung Cheng | Zero-crossing-based analog/digital convertor with current mismatch correction |
CN106571821B (en) * | 2015-10-13 | 2020-10-09 | 上海贝岭股份有限公司 | Foreground calibration method of pipeline ADC (analog to digital converter) |
CN107196656B (en) * | 2016-03-15 | 2020-11-06 | 联发科技(新加坡)私人有限公司 | Signal calibration circuit and signal calibration method |
US10536161B1 (en) * | 2018-10-08 | 2020-01-14 | Analog Devices, Inc. | Noise shaping pipeline analog to digital converters |
US11038515B2 (en) | 2019-05-13 | 2021-06-15 | Analog Devices, Inc. | Noise shaping algorithmic analog-to-digital converter |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5825316A (en) * | 1995-04-04 | 1998-10-20 | Siemens Aktiengesellschaft | Method for the self-calibration of an A/D or D/A converter in which the weighted references of the at least one main network are partially calibrated once per calibration cycle |
US6184809B1 (en) * | 1998-08-19 | 2001-02-06 | Texas Instruments Incorporated | User transparent self-calibration technique for pipelined ADC architecture |
US6489914B1 (en) * | 2001-12-04 | 2002-12-03 | Motorola, Inc. | RSD analog to digital converter |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1994027373A1 (en) * | 1993-05-12 | 1994-11-24 | Analog Devices, Incorporated | Algorithmic a/d converter with digitally calibrated output |
US6169502B1 (en) * | 1998-05-08 | 2001-01-02 | Cirrus Logic, Inc. | Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products |
-
2003
- 2003-11-28 US US10/722,416 patent/US6891486B1/en not_active Expired - Lifetime
-
2004
- 2004-11-29 JP JP2006541495A patent/JP2007521767A/en not_active Abandoned
- 2004-11-29 WO PCT/US2004/040033 patent/WO2005055500A2/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5825316A (en) * | 1995-04-04 | 1998-10-20 | Siemens Aktiengesellschaft | Method for the self-calibration of an A/D or D/A converter in which the weighted references of the at least one main network are partially calibrated once per calibration cycle |
US6184809B1 (en) * | 1998-08-19 | 2001-02-06 | Texas Instruments Incorporated | User transparent self-calibration technique for pipelined ADC architecture |
US6489914B1 (en) * | 2001-12-04 | 2002-12-03 | Motorola, Inc. | RSD analog to digital converter |
Also Published As
Publication number | Publication date |
---|---|
US20050116847A1 (en) | 2005-06-02 |
US6891486B1 (en) | 2005-05-10 |
JP2007521767A (en) | 2007-08-02 |
WO2005055500A2 (en) | 2005-06-16 |
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