WO2005065205A3 - Memory hub and method for memory system performance monitoring - Google Patents

Memory hub and method for memory system performance monitoring Download PDF

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Publication number
WO2005065205A3
WO2005065205A3 PCT/US2004/042313 US2004042313W WO2005065205A3 WO 2005065205 A3 WO2005065205 A3 WO 2005065205A3 US 2004042313 W US2004042313 W US 2004042313W WO 2005065205 A3 WO2005065205 A3 WO 2005065205A3
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WO
WIPO (PCT)
Prior art keywords
memory
rate
hub
percentage
system performance
Prior art date
Application number
PCT/US2004/042313
Other languages
French (fr)
Other versions
WO2005065205A2 (en
Inventor
Joseph M Jeddeloh
Original Assignee
Micron Technology Inc
Joseph M Jeddeloh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc, Joseph M Jeddeloh filed Critical Micron Technology Inc
Priority to EP04814491A priority Critical patent/EP1700412A4/en
Priority to JP2006547145A priority patent/JP4700621B2/en
Publication of WO2005065205A2 publication Critical patent/WO2005065205A2/en
Publication of WO2005065205A3 publication Critical patent/WO2005065205A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3485—Performance evaluation by tracing or monitoring for I/O devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/349—Performance evaluation by tracing or monitoring for interfaces, buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885—Monitoring specific for caches

Abstract

A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics-for example, page hit rate, number or percentage of prefetch hits, cache hit rate or percentage, read rate, number of read requests, write rate, number of write requests, rate or percentage of memory bus utilization, local hub request rate or number, and/or remote hub request rate or number.
PCT/US2004/042313 2003-12-29 2004-12-15 Memory hub and method for memory system performance monitoring WO2005065205A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04814491A EP1700412A4 (en) 2003-12-29 2004-12-15 Memory hub and method for memory system performance monitoring
JP2006547145A JP4700621B2 (en) 2003-12-29 2004-12-15 Memory hub and method for memory system performance monitoring

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/747,984 US7216196B2 (en) 2003-12-29 2003-12-29 Memory hub and method for memory system performance monitoring
US10/747,984 2003-12-29

Publications (2)

Publication Number Publication Date
WO2005065205A2 WO2005065205A2 (en) 2005-07-21
WO2005065205A3 true WO2005065205A3 (en) 2007-03-08

Family

ID=34700823

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/042313 WO2005065205A2 (en) 2003-12-29 2004-12-15 Memory hub and method for memory system performance monitoring

Country Status (7)

Country Link
US (3) US7216196B2 (en)
EP (1) EP1700412A4 (en)
JP (1) JP4700621B2 (en)
KR (1) KR100848255B1 (en)
CN (1) CN100507874C (en)
TW (1) TW200537292A (en)
WO (1) WO2005065205A2 (en)

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US20070174562A1 (en) 2007-07-26
US7216196B2 (en) 2007-05-08

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