WO2005076823A3 - Dynamic command and/or address mirroring system and method for memory modules - Google Patents

Dynamic command and/or address mirroring system and method for memory modules Download PDF

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Publication number
WO2005076823A3
WO2005076823A3 PCT/US2005/002553 US2005002553W WO2005076823A3 WO 2005076823 A3 WO2005076823 A3 WO 2005076823A3 US 2005002553 W US2005002553 W US 2005002553W WO 2005076823 A3 WO2005076823 A3 WO 2005076823A3
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WO
WIPO (PCT)
Prior art keywords
memory
memory devices
substrate
address
memory modules
Prior art date
Application number
PCT/US2005/002553
Other languages
French (fr)
Other versions
WO2005076823A2 (en
Inventor
Paul A Laberge
Original Assignee
Micron Technology Inc
Paul A Laberge
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc, Paul A Laberge filed Critical Micron Technology Inc
Priority to DE602005008560T priority Critical patent/DE602005008560D1/en
Priority to JP2006552156A priority patent/JP4586030B2/en
Priority to EP05712135A priority patent/EP1723526B1/en
Publication of WO2005076823A2 publication Critical patent/WO2005076823A2/en
Publication of WO2005076823A3 publication Critical patent/WO2005076823A3/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Abstract

A memory module includes a memory hub that couples signals to memory devices mounted on opposite first and second surfaces of a memory module substrate. The memory devices are mounted in mirrored configuration with mirrored terminals of memory devices on opposite surfaces being interconnected. A memory hub mounted on each module alters the configuration of address and/or command signals coupled to the memory devices depending upon whether the memory devices on the first surface of the substrate or the memory devices on the second surface of the substrate are being accessed. Alternatively, the configuration of the address and/or command signals coupled to mirrored memory devices may be altered by a register mounted on the substrate that is coupled to the memory devices or by a memory controller coupled directly to memory devices on one or more memory modules.
PCT/US2005/002553 2004-02-05 2005-01-26 Dynamic command and/or address mirroring system and method for memory modules WO2005076823A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE602005008560T DE602005008560D1 (en) 2004-02-05 2005-01-26 DYNAMIC COMMAND AND / OR ADDRESS RELIEF SYSTEM AND METHOD FOR MEMORY MODULES
JP2006552156A JP4586030B2 (en) 2004-02-05 2005-01-26 Dynamic command and / or address mirroring system and method for memory modules
EP05712135A EP1723526B1 (en) 2004-02-05 2005-01-26 Dynamic command and/or address mirroring system and method for memory modules

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/773,518 US7181584B2 (en) 2004-02-05 2004-02-05 Dynamic command and/or address mirroring system and method for memory modules
US10/773,518 2004-02-05

Publications (2)

Publication Number Publication Date
WO2005076823A2 WO2005076823A2 (en) 2005-08-25
WO2005076823A3 true WO2005076823A3 (en) 2006-07-06

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/002553 WO2005076823A2 (en) 2004-02-05 2005-01-26 Dynamic command and/or address mirroring system and method for memory modules

Country Status (9)

Country Link
US (2) US7181584B2 (en)
EP (1) EP1723526B1 (en)
JP (1) JP4586030B2 (en)
KR (1) KR100936637B1 (en)
CN (1) CN100474267C (en)
AT (1) ATE403186T1 (en)
DE (1) DE602005008560D1 (en)
TW (1) TW200608197A (en)
WO (1) WO2005076823A2 (en)

Families Citing this family (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7149874B2 (en) * 2002-08-16 2006-12-12 Micron Technology, Inc. Memory hub bypass circuit and method
US7836252B2 (en) 2002-08-29 2010-11-16 Micron Technology, Inc. System and method for optimizing interconnections of memory devices in a multichip module
US7245145B2 (en) * 2003-06-11 2007-07-17 Micron Technology, Inc. Memory module and method having improved signal routing topology
US7133991B2 (en) * 2003-08-20 2006-11-07 Micron Technology, Inc. Method and system for capturing and bypassing memory transactions in a hub-based memory system
US7136958B2 (en) 2003-08-28 2006-11-14 Micron Technology, Inc. Multiple processor system and method including multiple memory hub modules
US7120743B2 (en) * 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7788451B2 (en) * 2004-02-05 2010-08-31 Micron Technology, Inc. Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
US7412574B2 (en) * 2004-02-05 2008-08-12 Micron Technology, Inc. System and method for arbitration of memory responses in a hub-based memory system
US7366864B2 (en) 2004-03-08 2008-04-29 Micron Technology, Inc. Memory hub architecture having programmable lane widths
US7257683B2 (en) * 2004-03-24 2007-08-14 Micron Technology, Inc. Memory arbitration system and method having an arbitration packet protocol
US7120723B2 (en) * 2004-03-25 2006-10-10 Micron Technology, Inc. System and method for memory hub-based expansion bus
US7447240B2 (en) * 2004-03-29 2008-11-04 Micron Technology, Inc. Method and system for synchronizing communications links in a hub-based memory system
US7590797B2 (en) 2004-04-08 2009-09-15 Micron Technology, Inc. System and method for optimizing interconnections of components in a multichip memory module
US7363419B2 (en) * 2004-05-28 2008-04-22 Micron Technology, Inc. Method and system for terminating write commands in a hub-based memory system
KR100607987B1 (en) * 2004-06-24 2006-08-02 삼성전자주식회사 Memory controller for scheduling a plurality of commands, and method thereof
US7296129B2 (en) 2004-07-30 2007-11-13 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater
US20060036826A1 (en) * 2004-07-30 2006-02-16 International Business Machines Corporation System, method and storage medium for providing a bus speed multiplier
US7224595B2 (en) * 2004-07-30 2007-05-29 International Business Machines Corporation 276-Pin buffered memory module with enhanced fault tolerance
US7389375B2 (en) * 2004-07-30 2008-06-17 International Business Machines Corporation System, method and storage medium for a multi-mode memory buffer device
US7392331B2 (en) 2004-08-31 2008-06-24 Micron Technology, Inc. System and method for transmitting data packets in a computer system having a memory hub architecture
US7299313B2 (en) * 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7277988B2 (en) * 2004-10-29 2007-10-02 International Business Machines Corporation System, method and storage medium for providing data caching and data compression in a memory subsystem
US7441060B2 (en) * 2004-10-29 2008-10-21 International Business Machines Corporation System, method and storage medium for providing a service interface to a memory system
US7512762B2 (en) * 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
US20060198175A1 (en) * 2005-03-03 2006-09-07 Badawi Ashraf H Method, system, and apparatus high speed interconnect to improve data rates of memory subsystems
US20060288132A1 (en) * 2005-05-31 2006-12-21 Mccall James A Memory single-to-multi load repeater architecture
US7478259B2 (en) * 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US7469097B2 (en) * 2005-12-15 2008-12-23 Hewlett-Packard Development Company, L.P. Method and apparatus for coping with condition in which subject is too close to digital imaging device for acceptable focus
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7870459B2 (en) * 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
DE102006051514B4 (en) * 2006-10-31 2010-01-21 Qimonda Ag Memory module and method for operating a memory module
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
US20090119114A1 (en) * 2007-11-02 2009-05-07 David Alaniz Systems and Methods for Enabling Customer Service
US7925844B2 (en) 2007-11-29 2011-04-12 Micron Technology, Inc. Memory register encoding systems and methods
US20100005206A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Automatic read data flow control in a cascade interconnect memory system
US8472199B2 (en) * 2008-11-13 2013-06-25 Mosaid Technologies Incorporated System including a plurality of encapsulated semiconductor chips
US8131889B2 (en) * 2009-11-10 2012-03-06 Apple Inc. Command queue for peripheral component
US10108684B2 (en) * 2010-11-02 2018-10-23 Micron Technology, Inc. Data signal mirroring
WO2012176330A1 (en) * 2011-06-24 2012-12-27 ルネサスエレクトロニクス株式会社 Semiconductor device
US8502390B2 (en) 2011-07-12 2013-08-06 Tessera, Inc. De-skewed multi-die packages
US8513817B2 (en) 2011-07-12 2013-08-20 Invensas Corporation Memory module in a package
US8823165B2 (en) 2011-07-12 2014-09-02 Invensas Corporation Memory module in a package
US8436477B2 (en) 2011-10-03 2013-05-07 Invensas Corporation Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
US8653646B2 (en) 2011-10-03 2014-02-18 Invensas Corporation Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
JP5887414B2 (en) 2011-10-03 2016-03-16 インヴェンサス・コーポレイション Stub minimization of multi-die wirebond assemblies with parallel windows
US8441111B2 (en) 2011-10-03 2013-05-14 Invensas Corporation Stub minimization for multi-die wirebond assemblies with parallel windows
US8436457B2 (en) 2011-10-03 2013-05-07 Invensas Corporation Stub minimization for multi-die wirebond assemblies with parallel windows
US8659142B2 (en) 2011-10-03 2014-02-25 Invensas Corporation Stub minimization for wirebond assemblies without windows
EP2769409A1 (en) 2011-10-03 2014-08-27 Invensas Corporation Stub minimization for multi-die wirebond assemblies with orthogonal windows
WO2013052544A1 (en) 2011-10-03 2013-04-11 Invensas Corporation Stub minimization with terminal grids offset from center of package
US8610260B2 (en) 2011-10-03 2013-12-17 Invensas Corporation Stub minimization for assemblies without wirebonds to package substrate
US9117496B2 (en) 2012-01-30 2015-08-25 Rambus Inc. Memory device comprising programmable command-and-address and/or data interfaces
US10355001B2 (en) * 2012-02-15 2019-07-16 Micron Technology, Inc. Memories and methods to provide configuration information to controllers
US9368477B2 (en) 2012-08-27 2016-06-14 Invensas Corporation Co-support circuit panel and microelectronic packages
US8787034B2 (en) 2012-08-27 2014-07-22 Invensas Corporation Co-support system and microelectronic assembly
US8848392B2 (en) 2012-08-27 2014-09-30 Invensas Corporation Co-support module and microelectronic assembly
US8848391B2 (en) 2012-08-27 2014-09-30 Invensas Corporation Co-support component and microelectronic assembly
US9733855B1 (en) 2013-01-04 2017-08-15 Altera Corporation System and methods for adjusting memory command placement
US10691344B2 (en) * 2013-05-30 2020-06-23 Hewlett Packard Enterprise Development Lp Separate memory controllers to access data in memory
US9070423B2 (en) 2013-06-11 2015-06-30 Invensas Corporation Single package dual channel memory with co-support
US9218861B2 (en) 2013-10-09 2015-12-22 Micron Technology, Inc. Apparatuses and methods including selectively providing a single or separate chip select signals
US9123555B2 (en) 2013-10-25 2015-09-01 Invensas Corporation Co-support for XFD packaging
US9281296B2 (en) 2014-07-31 2016-03-08 Invensas Corporation Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
US9691437B2 (en) 2014-09-25 2017-06-27 Invensas Corporation Compact microelectronic assembly having reduced spacing between controller and memory packages
US20170111286A1 (en) * 2015-10-15 2017-04-20 Kabushiki Kaisha Toshiba Storage system that includes a plurality of routing circuits and a plurality of node modules connected thereto
US9484080B1 (en) 2015-11-09 2016-11-01 Invensas Corporation High-bandwidth memory application with controlled impedance loading
US9679613B1 (en) 2016-05-06 2017-06-13 Invensas Corporation TFD I/O partition for high-speed, high-density applications
US10387072B2 (en) * 2016-12-29 2019-08-20 Intel Corporation Systems and method for dynamic address based mirroring
KR20180080775A (en) * 2017-01-05 2018-07-13 에스케이하이닉스 주식회사 Memory apparatus, memory module and semiconductor system capable of dynamically mirroring
CN107797945A (en) * 2017-10-31 2018-03-13 郑州云海信息技术有限公司 A kind of storage system and its date storage method, device, system and equipment
US11099778B2 (en) * 2018-08-08 2021-08-24 Micron Technology, Inc. Controller command scheduling in a memory system to increase command bus utilization
KR20220059983A (en) 2020-11-02 2022-05-11 삼성전자주식회사 Memory package, storage device including memory package, and operating method of storage device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5465229A (en) * 1992-05-19 1995-11-07 Sun Microsystems, Inc. Single in-line memory module
US6229727B1 (en) * 1998-09-28 2001-05-08 Cisco Technology, Inc. Method and apparatus for support of multiple memory devices in a single memory socket architecture
US6272609B1 (en) * 1998-07-31 2001-08-07 Micron Electronics, Inc. Pipelined memory controller
US6667895B2 (en) * 2001-12-06 2003-12-23 Samsung Electronics Co., Ltd. Integrated circuit device and module with integrated circuits

Family Cites Families (181)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3777154A (en) 1972-02-07 1973-12-04 R Lindsey Optical data processing system
US4045781A (en) 1976-02-13 1977-08-30 Digital Equipment Corporation Memory module with selectable byte addressing for digital data processing system
US4253146A (en) 1978-12-21 1981-02-24 Burroughs Corporation Module for coupling computer-processors
US4245306A (en) 1978-12-21 1981-01-13 Burroughs Corporation Selection of addressed processor in a multi-processor network
US4253144A (en) 1978-12-21 1981-02-24 Burroughs Corporation Multi-processor communication network
US4240143A (en) 1978-12-22 1980-12-16 Burroughs Corporation Hierarchical multi-processor network for memory sharing
US4443845A (en) 1980-06-26 1984-04-17 Texas Instruments Incorporated Memory system having a common interface
US4724520A (en) 1985-07-01 1988-02-09 United Technologies Corporation Modular multiport data hub
DE3614062A1 (en) 1986-04-23 1987-10-29 Siemens Ag METHOD FOR FLOW CONTROLLING DATA WITHIN A MESHED NETWORK
US4707823A (en) 1986-07-21 1987-11-17 Chrysler Motors Corporation Fiber optic multiplexed data acquisition system
US4809232A (en) 1986-12-16 1989-02-28 The United States Of America As Represented By The United States Department Of Energy High speed, very large (8 megabyte) first in/first out buffer memory (FIFO)
US4823403A (en) 1987-03-26 1989-04-18 Switch Tech, Inc. System for optically transmitting data between circuit packs, such as printed circuit boards
JPH07117863B2 (en) 1987-06-26 1995-12-18 株式会社日立製作所 Online system restart method
US5251303A (en) 1989-01-13 1993-10-05 International Business Machines Corporation System for DMA block data transfer based on linked control blocks
US5442770A (en) 1989-01-24 1995-08-15 Nec Electronics, Inc. Triple port cache memory
US4953930A (en) 1989-03-15 1990-09-04 Ramtech, Inc. CPU socket supporting socket-to-socket optical communications
JPH03156795A (en) 1989-11-15 1991-07-04 Toshiba Micro Electron Kk Semiconductor memory circuit device
US5327553A (en) 1989-12-22 1994-07-05 Tandem Computers Incorporated Fault-tolerant computer system with /CONFIG filesystem
US5317752A (en) 1989-12-22 1994-05-31 Tandem Computers Incorporated Fault-tolerant computer system with auto-restart after power-fall
JP2772103B2 (en) 1990-03-28 1998-07-02 株式会社東芝 Computer system startup method
US5243703A (en) 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
IL96808A (en) 1990-04-18 1996-03-31 Rambus Inc Integrated circuit i/o using a high performance bus interface
GB9108599D0 (en) 1991-04-22 1991-06-05 Pilkington Micro Electronics Peripheral controller
US5831467A (en) 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
US5461627A (en) 1991-12-24 1995-10-24 Rypinski; Chandos A. Access protocol for a common channel wireless network
US5307381A (en) 1991-12-27 1994-04-26 Intel Corporation Skew-free clock signal distribution network in a microprocessor
JP2554816B2 (en) 1992-02-20 1996-11-20 株式会社東芝 Semiconductor memory device
JP3517237B2 (en) 1992-03-06 2004-04-12 ラムバス・インコーポレーテッド Synchronous bus system and memory device therefor
US5355391A (en) 1992-03-06 1994-10-11 Rambus, Inc. High speed bus system
ES2170066T3 (en) 1992-03-25 2002-08-01 Sun Microsystems Inc OPTICAL FIBER MEMORY COUPLING SYSTEM.
US5432907A (en) 1992-05-12 1995-07-11 Network Resources Corporation Network hub with integrated bridge
US5787475A (en) 1992-07-21 1998-07-28 Digital Equipment Corporation Controlled prefetching of data requested by a peripheral
GB2270780A (en) 1992-09-21 1994-03-23 Ibm Scatter-gather in data processing systems.
US5414819A (en) 1992-12-18 1995-05-09 Nec Research Institute, Inc. Optical interconnection network
US5423009A (en) 1993-02-18 1995-06-06 Sierra Semiconductor Corporation Dynamic sizing bus controller that allows unrestricted byte enable patterns
JPH0713945A (en) 1993-06-16 1995-01-17 Nippon Sheet Glass Co Ltd Bus structure of multiprocessor system with separated arithmetic processing part and control/storage part
US5497494A (en) 1993-07-23 1996-03-05 International Business Machines Corporation Method for saving and restoring the state of a CPU executing code in protected mode
US5493437A (en) 1993-09-13 1996-02-20 Motorola External communication link for a credit card pager
JPH0786526A (en) * 1993-09-14 1995-03-31 Toshiba Corp Memory device
US5544345A (en) 1993-11-08 1996-08-06 International Business Machines Corporation Coherence controls for store-multiple shared data coordinated by cache directory entries in a shared electronic storage
US5729709A (en) 1993-11-12 1998-03-17 Intel Corporation Memory controller with burst addressing circuit
US5502621A (en) 1994-03-31 1996-03-26 Hewlett-Packard Company Mirrored pin assignment for two sided multi-chip layout
US5532856A (en) 1994-06-30 1996-07-02 Nec Research Institute, Inc. Planar optical mesh-connected tree interconnect network
US5566325A (en) 1994-06-30 1996-10-15 Digital Equipment Corporation Method and apparatus for adaptive memory access
US6175571B1 (en) 1994-07-22 2001-01-16 Network Peripherals, Inc. Distributed memory switching hub
US5978567A (en) 1994-07-27 1999-11-02 Instant Video Technologies Inc. System for distribution of interactive multimedia and linear programs by enabling program webs which include control scripts to define presentation by client transceiver
US5715456A (en) 1995-02-13 1998-02-03 International Business Machines Corporation Method and apparatus for booting a computer system without pre-installing an operating system
US5623534A (en) 1995-04-07 1997-04-22 Lucent Technologies Inc. Method and apparatus for exchanging administrative information between local area networks
US5568574A (en) 1995-06-12 1996-10-22 University Of Southern California Modulator-based photonic chip-to-chip interconnections for dense three-dimensional multichip module integration
US5875352A (en) 1995-11-03 1999-02-23 Sun Microsystems, Inc. Method and apparatus for multiple channel direct memory access control
US5966724A (en) 1996-01-11 1999-10-12 Micron Technology, Inc. Synchronous memory device with dual page and burst mode operations
US5832250A (en) 1996-01-26 1998-11-03 Unisys Corporation Multi set cache structure having parity RAMs holding parity bits for tag data and for status data utilizing prediction circuitry that predicts and generates the needed parity bits
US5819304A (en) 1996-01-29 1998-10-06 Iowa State University Research Foundation, Inc. Random access memory assembly
US5659798A (en) 1996-02-02 1997-08-19 Blumrich; Matthias Augustin Method and system for initiating and loading DMA controller registers by using user-level programs
US5808897A (en) * 1996-03-05 1998-09-15 Micron Technology, Inc. Integrated circuit device having interchangeable terminal connection
US5818844A (en) 1996-06-06 1998-10-06 Advanced Micro Devices, Inc. Address generation and data path arbitration to and from SRAM to accommodate multiple transmitted packets
US5875454A (en) 1996-07-24 1999-02-23 International Business Machiness Corporation Compressed data cache storage system
JPH1049511A (en) 1996-08-02 1998-02-20 Oki Electric Ind Co Ltd One-chip micrcomputer
JP4070255B2 (en) 1996-08-13 2008-04-02 富士通株式会社 Semiconductor integrated circuit
US6144327A (en) 1996-08-15 2000-11-07 Intellectual Property Development Associates Of Connecticut, Inc. Programmably interconnected programmable devices
TW304288B (en) 1996-08-16 1997-05-01 United Microelectronics Corp Manufacturing method of semiconductor memory device with capacitor
JP3731949B2 (en) 1996-09-17 2006-01-05 インターナショナル・ビジネス・マシーンズ・コーポレーション Read device for recording medium
US6088774A (en) 1996-09-20 2000-07-11 Advanced Memory International, Inc. Read/write timing for maximum utilization of bidirectional read/write bus
US5706224A (en) 1996-10-10 1998-01-06 Quality Semiconductor, Inc. Content addressable memory and random access memory partition circuit
JPH10222374A (en) 1996-10-28 1998-08-21 Altera Corp Method for providing remote software technological support
US6167486A (en) 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels
US5818984A (en) 1996-11-18 1998-10-06 International Business Machines Corporation Optoelectronic interconnection of integrated circuits
US6308248B1 (en) 1996-12-31 2001-10-23 Compaq Computer Corporation Method and system for allocating memory space using mapping controller, page table and frame numbers
US6031241A (en) 1997-03-11 2000-02-29 University Of Central Florida Capillary discharge extreme ultraviolet lamp source for EUV microlithography and other related applications
US6271582B1 (en) 1997-04-07 2001-08-07 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
US5946712A (en) 1997-06-04 1999-08-31 Oak Technology, Inc. Apparatus and method for reading data from synchronous memory
US6243769B1 (en) 1997-07-18 2001-06-05 Micron Technology, Inc. Dynamic buffer allocation for a computer system
US6073190A (en) 1997-07-18 2000-06-06 Micron Electronics, Inc. System for dynamic buffer allocation comprising control logic for controlling a first address buffer and a first data buffer as a matched pair
US6105075A (en) 1997-08-05 2000-08-15 Adaptec, Inc. Scatter gather memory system for a hardware accelerated command interpreter engine
US6249802B1 (en) 1997-09-19 2001-06-19 Silicon Graphics, Inc. Method, system, and computer program product for allocating physical memory in a distributed shared memory network
US6067594A (en) 1997-09-26 2000-05-23 Rambus, Inc. High frequency bus system
JPH11120120A (en) 1997-10-13 1999-04-30 Fujitsu Ltd Interface circuit for card bus and pc card for card bus having it
US5915123A (en) * 1997-10-31 1999-06-22 Silicon Spice Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements
US6122719A (en) * 1997-10-31 2000-09-19 Silicon Spice Method and apparatus for retiming in a network of multiple context processing elements
US5987196A (en) 1997-11-06 1999-11-16 Micron Technology, Inc. Semiconductor structure having an optical signal path in a substrate and method for forming the same
JP3724215B2 (en) * 1997-11-10 2005-12-07 富士ゼロックス株式会社 Optical signal transmission apparatus and signal processing apparatus
US6098158A (en) 1997-12-18 2000-08-01 International Business Machines Corporation Software-enabled fast boot
US6111757A (en) 1998-01-16 2000-08-29 International Business Machines Corp. SIMM/DIMM memory module
US6023726A (en) 1998-01-20 2000-02-08 Netscape Communications Corporation User configurable prefetch control system for enabling client to prefetch documents from a network server
GB2333896B (en) 1998-01-31 2003-04-09 Mitel Semiconductor Ab Vertical cavity surface emitting laser
US6186400B1 (en) 1998-03-20 2001-02-13 Symbol Technologies, Inc. Bar code reader with an integrated scanning component module mountable on printed circuit board
US6079008A (en) 1998-04-03 2000-06-20 Patton Electronics Co. Multiple thread multiple data predictive coded parallel processing system and method
US6247107B1 (en) 1998-04-06 2001-06-12 Advanced Micro Devices, Inc. Chipset configured to perform data-directed prefetching
US6529498B1 (en) * 1998-04-28 2003-03-04 Cisco Technology, Inc. Routing support for point-to-multipoint connections
US6167465A (en) 1998-05-20 2000-12-26 Aureal Semiconductor, Inc. System for managing multiple DMA connections between a peripheral device and a memory and performing real-time operations on data carried by a selected DMA connection
JPH11327357A (en) * 1998-05-20 1999-11-26 Fujitsu Ltd Method and device for controlling temperature of thermally fixing unit and image forming device
US6405280B1 (en) * 1998-06-05 2002-06-11 Micron Technology, Inc. Packet-oriented synchronous DRAM interface supporting a plurality of orderings for data block transfers within a burst sequence
US6134624A (en) 1998-06-08 2000-10-17 Storage Technology Corporation High bandwidth cache system
US6301637B1 (en) 1998-06-08 2001-10-09 Storage Technology Corporation High performance data paths
JP2000003589A (en) 1998-06-12 2000-01-07 Mitsubishi Electric Corp Synchronizing type semiconductor memory
US6453377B1 (en) * 1998-06-16 2002-09-17 Micron Technology, Inc. Computer including optical interconnect, memory unit, and method of assembling a computer
JP2000011640A (en) 1998-06-23 2000-01-14 Nec Corp Semiconductor storage
FR2780535B1 (en) * 1998-06-25 2000-08-25 Inst Nat Rech Inf Automat ACQUISITION DATA PROCESSING DEVICE, ESPECIALLY IMAGE DATA
US7002982B1 (en) * 1998-07-08 2006-02-21 Broadcom Corporation Apparatus and method for storing data
US6286083B1 (en) 1998-07-08 2001-09-04 Compaq Computer Corporation Computer system with adaptive memory arbitration scheme
US6105088A (en) 1998-07-10 2000-08-15 Northrop Grumman Corporation Backplane assembly for electronic circuit modules providing electronic reconfigurable connectivity of digital signals and manual reconfigurable connectivity power, optical and RF signals
JP3248617B2 (en) * 1998-07-14 2002-01-21 日本電気株式会社 Semiconductor storage device
US6061296A (en) 1998-08-17 2000-05-09 Vanguard International Semiconductor Corporation Multiple data clock activation with programmable delay for use in multiple CAS latency memory devices
US6029250A (en) 1998-09-09 2000-02-22 Micron Technology, Inc. Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same
US6587912B2 (en) * 1998-09-30 2003-07-01 Intel Corporation Method and apparatus for implementing multiple memory buses on a memory module
US6343171B1 (en) * 1998-10-09 2002-01-29 Fujitsu Limited Systems based on opto-electronic substrates with electrical and optical interconnections and methods for making
US6243831B1 (en) 1998-10-31 2001-06-05 Compaq Computer Corporation Computer system with power loss protection mechanism
US6226729B1 (en) 1998-11-03 2001-05-01 Intel Corporation Method and apparatus for configuring and initializing a memory device and a memory channel
US6378056B2 (en) * 1998-11-03 2002-04-23 Intel Corporation Method and apparatus for configuring a memory device and a memory channel using configuration space registers
JP3248500B2 (en) 1998-11-12 2002-01-21 日本電気株式会社 Semiconductor memory device and data reading method thereof
US6349363B2 (en) 1998-12-08 2002-02-19 Intel Corporation Multi-section cache with different attributes for each section
US6067262A (en) 1998-12-11 2000-05-23 Lsi Logic Corporation Redundancy analysis for embedded memories with built-in self test and built-in self repair
US6191663B1 (en) 1998-12-22 2001-02-20 Intel Corporation Echo reduction on bit-serial, multi-drop bus
US6367074B1 (en) 1998-12-28 2002-04-02 Intel Corporation Operation of a system
US6061263A (en) 1998-12-29 2000-05-09 Intel Corporation Small outline rambus in-line memory module
US6598154B1 (en) * 1998-12-29 2003-07-22 Intel Corporation Precoding branch instructions to reduce branch-penalty in pipelined processors
US6285349B1 (en) 1999-02-26 2001-09-04 Intel Corporation Correcting non-uniformity in displays
US6229712B1 (en) 1999-03-31 2001-05-08 International Business Machines Corporation Printed circuit board for coupling surface mounted optoelectric semiconductor devices
US6381190B1 (en) * 1999-05-13 2002-04-30 Nec Corporation Semiconductor memory device in which use of cache can be selected
US6233376B1 (en) 1999-05-18 2001-05-15 The United States Of America As Represented By The Secretary Of The Navy Embedded fiber optic circuit boards and integrated circuits
US6294937B1 (en) 1999-05-25 2001-09-25 Lsi Logic Corporation Method and apparatus for self correcting parallel I/O circuitry
JP2001014840A (en) 1999-06-24 2001-01-19 Nec Corp Plural line buffer type memory lsi
US6401213B1 (en) * 1999-07-09 2002-06-04 Micron Technology, Inc. Timing circuit for high speed memory
US6552564B1 (en) * 1999-08-30 2003-04-22 Micron Technology, Inc. Technique to reduce reflections and ringing on CMOS interconnections
US6539490B1 (en) * 1999-08-30 2003-03-25 Micron Technology, Inc. Clock distribution without clock delay or skew
US6594713B1 (en) * 1999-09-10 2003-07-15 Texas Instruments Incorporated Hub interface unit and application unit interfaces for expanded direct memory access processor
AU2119301A (en) * 1999-10-22 2001-05-08 Teraconnect, Inc. Wafer scale integration and remoted subsystems using opto-electronic transceivers
US6421744B1 (en) * 1999-10-25 2002-07-16 Motorola, Inc. Direct memory access controller and method therefor
US6344664B1 (en) * 1999-12-02 2002-02-05 Tera Connect Inc. Electro-optical transceiver system with controlled lateral leakage and method of making it
US6507899B1 (en) * 1999-12-13 2003-01-14 Infineon Technologies North American Corp. Interface for a memory unit
JP3546788B2 (en) * 1999-12-20 2004-07-28 日本電気株式会社 Memory control circuit
JP3356747B2 (en) 1999-12-22 2002-12-16 エヌイーシーマイクロシステム株式会社 Semiconductor storage device
KR100343383B1 (en) * 2000-01-05 2002-07-15 윤종용 Semiconductor memory device and data sampling method thereof
US6502161B1 (en) * 2000-01-05 2002-12-31 Rambus Inc. Memory system including a point-to-point linked memory subsystem
JP2001193639A (en) * 2000-01-11 2001-07-17 Toyota Autom Loom Works Ltd Motor-driven swash plate compressor
US6745275B2 (en) * 2000-01-25 2004-06-01 Via Technologies, Inc. Feedback system for accomodating different memory module loading
US6185352B1 (en) 2000-02-24 2001-02-06 Siecor Operations, Llc Optical fiber ribbon fan-out cables
JP2001274323A (en) * 2000-03-24 2001-10-05 Hitachi Ltd Semiconductor device and semiconductor module mounted therewith, and method of manufacturing the same
US6728800B1 (en) * 2000-06-28 2004-04-27 Intel Corporation Efficient performance based scheduling mechanism for handling multiple TLB operations
US6594722B1 (en) * 2000-06-29 2003-07-15 Intel Corporation Mechanism for managing multiple out-of-order packet streams in a PCI host bridge
JP2002014875A (en) 2000-06-30 2002-01-18 Mitsubishi Electric Corp Semiconductor integrated circuit, memory repair method for semiconductor integrated circuit and computer readable recording medium stored with program for allowing computer to execute the method
US6754812B1 (en) * 2000-07-06 2004-06-22 Intel Corporation Hardware predication for conditional instruction path branching
US6845409B1 (en) * 2000-07-25 2005-01-18 Sun Microsystems, Inc. Data exchange methods for a switch which selectively forms a communication channel between a processing unit and multiple devices
US6366529B1 (en) * 2000-08-30 2002-04-02 Texas Instruments Incorporated Fast FiFo memory storage system
US6523093B1 (en) * 2000-09-29 2003-02-18 Intel Corporation Prefetch buffer allocation and filtering system
US6523092B1 (en) * 2000-09-29 2003-02-18 Intel Corporation Cache line replacement policy enhancement to avoid memory page thrashing
US6570429B1 (en) * 2000-10-20 2003-05-27 Cray Inc. Method and apparatus for providing a clock signal to a semiconductor chip
WO2002045168A1 (en) * 2000-11-29 2002-06-06 Yamatake Corporation Semiconductor device
US6751703B2 (en) * 2000-12-27 2004-06-15 Emc Corporation Data storage systems and methods which utilize an on-board cache
US7035212B1 (en) * 2001-01-25 2006-04-25 Optim Networks Method and apparatus for end to end forwarding architecture
DE10110469A1 (en) * 2001-03-05 2002-09-26 Infineon Technologies Ag Integrated memory and method for testing and repairing the same
AU2002259015A1 (en) * 2001-04-24 2002-11-05 Broadcom Corporation Power management system and method
US6670959B2 (en) * 2001-05-18 2003-12-30 Sun Microsystems, Inc. Method and apparatus for reducing inefficiencies in shared memory devices
US6697926B2 (en) * 2001-06-06 2004-02-24 Micron Technology, Inc. Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device
US6711652B2 (en) * 2001-06-21 2004-03-23 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system that provides precise notification of remote deallocation of modified data
US6920533B2 (en) * 2001-06-27 2005-07-19 Intel Corporation System boot time reduction method
US6721195B2 (en) * 2001-07-12 2004-04-13 Micron Technology, Inc. Reversed memory module socket and motherboard incorporating same
JP4812976B2 (en) * 2001-07-30 2011-11-09 エルピーダメモリ株式会社 Register, memory module and memory system
US6681292B2 (en) * 2001-08-27 2004-01-20 Intel Corporation Distributed read and write caching implementation for optimized input/output applications
US7941056B2 (en) * 2001-08-30 2011-05-10 Micron Technology, Inc. Optical interconnect in high-speed memory systems
US6718440B2 (en) * 2001-09-28 2004-04-06 Intel Corporation Memory access latency hiding with hint buffer
US6681301B1 (en) * 2001-10-02 2004-01-20 Advanced Micro Devices, Inc. System for controlling multiple memory types
DE10153657C2 (en) * 2001-10-31 2003-11-06 Infineon Technologies Ag Arrangement for data transmission in a semiconductor memory system and data transmission method therefor
US6886048B2 (en) * 2001-11-15 2005-04-26 Hewlett-Packard Development Company, L.P. Techniques for processing out-of-order requests in a processor-based system
US7024547B2 (en) * 2001-12-10 2006-04-04 Intel Corporation Method and system for initializing a hardware device
US20040022094A1 (en) * 2002-02-25 2004-02-05 Sivakumar Radhakrishnan Cache usage for concurrent multiple streams
US6735682B2 (en) * 2002-03-28 2004-05-11 Intel Corporation Apparatus and method for address calculation
US7200024B2 (en) * 2002-08-02 2007-04-03 Micron Technology, Inc. System and method for optically interconnecting memory devices
US7254331B2 (en) * 2002-08-09 2007-08-07 Micron Technology, Inc. System and method for multiple bit optical data transmission in memory systems
US7836252B2 (en) * 2002-08-29 2010-11-16 Micron Technology, Inc. System and method for optimizing interconnections of memory devices in a multichip module
US7093115B2 (en) * 2002-12-19 2006-08-15 Intel Corporation Method and apparatus for detecting an interruption in memory initialization
US7366423B2 (en) * 2002-12-31 2008-04-29 Intel Corporation System having multiple agents on optical and electrical bus
US7421525B2 (en) * 2003-05-13 2008-09-02 Advanced Micro Devices, Inc. System including a host connected to a plurality of memory modules via a serial memory interconnect
US7245145B2 (en) * 2003-06-11 2007-07-17 Micron Technology, Inc. Memory module and method having improved signal routing topology
US7133991B2 (en) * 2003-08-20 2006-11-07 Micron Technology, Inc. Method and system for capturing and bypassing memory transactions in a hub-based memory system
US7234070B2 (en) * 2003-10-27 2007-06-19 Micron Technology, Inc. System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
US7177211B2 (en) * 2003-11-13 2007-02-13 Intel Corporation Memory channel test fixture and method
JP4450616B2 (en) * 2003-12-19 2010-04-14 富士通マイクロエレクトロニクス株式会社 Memory control device and memory control method
US7120723B2 (en) * 2004-03-25 2006-10-10 Micron Technology, Inc. System and method for memory hub-based expansion bus
US7171508B2 (en) * 2004-08-23 2007-01-30 Micron Technology, Inc. Dual port memory with asymmetric inputs and outputs, device, system and method
US7392331B2 (en) * 2004-08-31 2008-06-24 Micron Technology, Inc. System and method for transmitting data packets in a computer system having a memory hub architecture

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5465229A (en) * 1992-05-19 1995-11-07 Sun Microsystems, Inc. Single in-line memory module
US6272609B1 (en) * 1998-07-31 2001-08-07 Micron Electronics, Inc. Pipelined memory controller
US6229727B1 (en) * 1998-09-28 2001-05-08 Cisco Technology, Inc. Method and apparatus for support of multiple memory devices in a single memory socket architecture
US6667895B2 (en) * 2001-12-06 2003-12-23 Samsung Electronics Co., Ltd. Integrated circuit device and module with integrated circuits

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