WO2005084175A2 - Nanostructures, nanogrooves, and nanowires - Google Patents

Nanostructures, nanogrooves, and nanowires Download PDF

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Publication number
WO2005084175A2
WO2005084175A2 PCT/US2004/033886 US2004033886W WO2005084175A2 WO 2005084175 A2 WO2005084175 A2 WO 2005084175A2 US 2004033886 W US2004033886 W US 2004033886W WO 2005084175 A2 WO2005084175 A2 WO 2005084175A2
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substrate
nanostructures
nanoparticles
temperature range
nanowires
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PCT/US2004/033886
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French (fr)
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WO2005084175A3 (en
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Ting Guo
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The Regents Of The University Of California
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition

Definitions

  • compositions and methods related generally to nanostructures, nanowires, and nanogrooves on substrates including but not limited to metal-semiconductor or alloy-semiconductor nanostructures and semiconductor nanowires on semiconductor substrates.
  • nanoscale structures embedded on the surface of a semiconductor or other substrate and made of a material different from the substrate may be useful in a variety of applications including as contacts, interconnects, and gates in nanoelectronics integrated circuit technology; in the formation of advanced transistors from conductive and semiconductor nanostructures; as sensors, especially high temperature sensors; as nanoscale templates for building other nanostructures; as photoluminescent devices; as infrared detectors; as a method of examining crystalline wafers; in the nanofabrication of high density nanostructures of high aspect ratios; as patterned nanostructure catalysts and photocatalysts; as field emission display panels; and for generating optical harmonics from the nanostructures. It is also becoming possible to make other nanoscale structures such as nanowires that may be useful in a variety of applications including as infrared detectors; photoluminescent devices
  • the first method deposits atoms on a substrate and allows them to react with the substrate to make lines of one-atom width. This method is extremely difficult to perform because individual atoms have to be deposited onto the surface. Therefore, the location of those atomic lines is difficult to control. More importantly, the structures so produced are limited in their width and may not possess the required properties, such as being electrical conductors. It is also impossible to form multiple component crystalline wires because the width is only one atom wide.
  • a second method employs thin film deposition (one-step or multiple- step deposition (Dass et al., 1991 APL), and high energy ion implantation (White et al. 1987 APL)) followed by heating (laser (Tung et al.
  • Si nanowires and most of them need to provide Si in the gas phase, normally in the form of silane (SiH 4 ).
  • Yan et al. (Jour of Crystal Growth, Nol 257, p69 (2003)) reported the growth of thick (100-200 n diameter.), short, and straight Si nanowires from H , Sit i, and Au-Pd alloy films deposited on Si wafers.
  • Hu et al. (Chem. Phys. Lett. Nol 378, p299 (2003)) use high temperature furnace (1350 C) to evaporate Si to form Si nanowires (20 - 1000 nm in diameter.).
  • Laser ablation of silicon at high temperature furnace (1200 C) has also been used by Tang et al. (J. Nac. Sci.
  • Described herein are methods of making nanostructures and nanowires that overcome one or more of the drawbacks of the existing methods. Also described are particular nanostructures and nanowires, particularly nanostructures and nanowires made using a silicon substrate. Also described are nanogrooves, methods of making nanogrooves, and methods of making silanes.
  • nanostructures may be made on a substrate by maintaining at least a portion of a nanoparticle coated substrate in a reaction temperature range for a reaction time, thereby producing nanostructures on the substrate.
  • the method may also optionally include the step of heating at least a portion of the metal nanoparticle coated substrate in a heating temperature range prior to maintaining in the reaction temperature range.
  • the exact heating and reaction temperature ranges may vary, depending on the size and composition of the metal nanoparticles and the substrate.
  • the reaction temperature range is between about 800°C and about 1200°C.
  • the heating temperature range is between about 800°C and about 1200°C
  • the reaction temperature range is between about 800°C and about 1200°C.
  • the metal nanoparticle coated substrate may be made in a variety of ways, including but not limited to contacting the substrate with a metal nanoparticle composition to give the metal nanoparticle coated substrate.
  • the substrate may generally be any substrate, including but not limited to a semiconductor substrate.
  • Semiconductor substrates that may be used include but are not limited to silicon, germanium or gallium arsenide.
  • the surface of the substrate coated with the nanoparticles may generally be of any morphology, including but not limited to a crystalline or locally crystalline surface morphology.
  • the metal nanoparticles (which are also referred to herein as "MNP's" used may generally be any nanoparticles capable of making the nanostructures, including but not limited to nanoparticles comprising a metal or alloy selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
  • cobalt nanoparticles are used.
  • the reaction temperature range is between about 800°C and about 1200°C.
  • the heating temperature range is between about 800°C and about 1200°C
  • the reaction temperature range is between about 800°C and about 1200°C.
  • the nanoparticles may optionally include added impurities, including but not limited to carbon and oxygen. [0014] Regarding the size of the nanoparticles, generally any sized nanoparticles may be used that are capable of making the nanostructures.
  • nanoparticles that are approximately spherical and have a diameter between about 1 nm and about 100 nm are used. In another method, nanoparticles having a diameter equal to or less than about 10 nm are used. [0015] Regarding the density of nanoparticles on the nanoparticle coated substrate, generally any density may be used that is capable of making the nanostructures. In one method of making nanostructures, the density of nanoparticles on the nanoparticle coated substrate is between about 10 9 and about 10 12 nanoparticles per square centimeter.
  • any heating temperature range, reaction time and reaction temperature range may be used that are capable of making the nanostructures.
  • the reaction time for which the nanoparticle coated substrate is maintained at the reaction temperature is about 2 hours or less.
  • the nanoparticle coated substrate is maintained in a reaction temperature range of between about 800°C and about 1000°C.
  • the nanoparticle coated substrate is heated in a heating temperature range of between about 800°C and about 1000°C, and is maintained in a reaction temperature range of between about 800°C and about 1000°C for the reaction time.
  • Other heating and reaction temperature ranges that may be used are described herein, including in the Detailed Description.
  • the nanoparticle coated substrate may generally be prepared in any manner.
  • the substrate is contacted with a metal nanoparticle composition to give the metal nanoparticle coated substrate.
  • the substrate may be optionally cleaned, polished, or cleaned and polished before contacting the substrate with the metal nanoparticle composition.
  • any metal nanoparticle composition may be used capable of producing a nanoparticle coated substrate that yields nanostructures upon heating under the various conditions described herein.
  • the metal nanoparticle composition contains metal nanoparticles, which may generally be any metal nanoparticles as described herein, with composition, geometry and size as described herein. In one method, the nanoparticles in the composition are all of approximately the same size.
  • the standard deviation of the size of the nanoparticles in the composition is less than or equal to about 20% of the average size of the nanoparticles. In another method, the standard deviation of the size of the nanoparticles in the composition is between about 10% and about 20% of the average size of the nanoparticles.
  • the nanostructures produced are made of atoms from the substrate and from the metal nanoparticles.
  • the nanoparticle coated substrate is maintained in a reaction temperature range of between about 800°C and about 1000°C for the reaction time.
  • the geometry of the nanostructures produced may generally be of any geometry capable of being made by the methods described herein.
  • the nanostructures are made with a depth of between about 1 nm and about 50 nm, a width of between about 1 nm and about 50 nm, and a length of between about 10 nm and 10,000 nm.
  • the nanostructures are made with a depth of between about 15 nm and about 25 nm, a width of between about 2 nm to about 20 nm, and a length of about 30 nm and 500 nm.
  • Other geometries that may be produced are described herein including in the Detailed Description.
  • a metal nanoparticle coated substrate is used to make nanostructures on the substrate surface by reacting at least a portion of the metal nanoparticles with the substrate.
  • the metal nanoparticles and substrates that may be used are as described herein, including in the Detailed Description.
  • the metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
  • the methods described herein produce nanowires that are made of atoms from the substrate.
  • at least a portion of the nanoparticle coated substrate is maintained in a reaction temperature range of between about 1000°C and about 1200°C for the reaction time, and for at least a portion of the reaction time the nanoparticle coated substrate is heated in the presence of a reducing material.
  • the reducing material is a hydrogenating material.
  • the reducing material is hydrogen.
  • a metal nanoparticle coated substrate is used to make nanowires on the substrate surface by reacting the metal nanoparticles with the substrate in the presence of a reducing material.
  • the metal nanoparticles , substrates, and reducing material that may be used are as described herein, including in the Detailed Description.
  • the metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
  • nanowires of any geometry capable of being made by the methods described herein may be produced.
  • method of producing nanowires nanowires are produced having a width of between about 2 nm and about 50 nm, and a length of between about 10 to about 10 nm.
  • Other geometries are described herein including in the Detailed Description.
  • cobalt silicides nanostructures are produced on a silicon substrate by maintaining at least a portion of a silicon substrate coated with cobalt nanoparticles in a reaction temperature range of between about 800°C and about 1000°C for a reaction time.
  • the method may optionally include the step of heating at least a portion of the silicon substrate coated with cobalt nanoparticles in a heating temperature range of between about 800°C and about 1000°C prior to maintaining in the reaction temperature range.
  • the nanostructures produced may generally be of any morphology.
  • the nanostructures are crystalline or substantially crystalline CoSi .
  • the nanoparticles may optionally include added carbon or oxygen impurities.
  • the silicon substrate coated with cobalt nanoparticles may be made in a variety of ways, including contacting a silicon substrate with a composition of cobalt nanoparticles to give the nanoparticle coated substrate.
  • Various characteristics of the composition of cobalt nanoparticles that may be used are described elsewhere herein, including in the Detailed Description.
  • the reaction time is about 2 hours or less.
  • the nanoparticles are approximately spherical and have a diameter between about 2 nm and about 15 nm.
  • the nanoparticles used have a diameter between about 2 nm and about 5 nm.
  • the nanoparticles used have a diameter between about 8 nm and about 14 nm.
  • the density of nanoparticles on the nanoparticle coated substrate is between about 10 9 and about 10 12 nanoparticles per square centimeter.
  • Methods described in this paragraph can be used to make cobalt silicide nanostructures with a depth of between about 1 nm and about 50 nm; a width of between about 1 nm and about 50 nm; and a length of between about 30 nm and 10,000 nm.
  • Other geometries may also be made as are described herein, including in the Detailed Description.
  • a cobalt nanoparticle coated silicon substrate is used to make cobalt silicide nanostructures on the silicon substrate surface by reacting at least a portion of the cobalt nanoparticles with the silicon substrate.
  • the cobalt nanoparticles and silicon substrate that may be used are as described herein, including in the Detailed Description.
  • the cobalt nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
  • silicon nanowires are produced on a silicon substrate by maintaining at least a portion of a silicon substrate coated with metal nanoparticle in a reaction temperature range of between about 1000°C and about 1200°C for a reaction time.
  • the method optionally includes the step of heating at least a portion of the silicon substrate coated with metal nanoparticle in a heating temperature range of between about 1000 C and about 1200 C prior to maintaining in the reaction temperature range.
  • the nanoparticle coated substrate is maintained in the reaction temperature range of between 1000°C and about 1200°C in the presence of a reducing material for at least a portion of the reaction time.
  • the silicon substrate coated with cobalt nanoparticles may be made in a variety of ways, including contacting a silicon substrate with a composition of cobalt nanoparticles to give the nanoparticle coated substrate.
  • a composition of cobalt nanoparticles that may be used are described elsewhere herein, including in the Detailed Description.
  • any reducing materials capable of making the nanowires may be used.
  • the reducing material is a hydrogenating material. Carbon monoxide may also be used.
  • the reducing material is hydrogen gas.
  • any metal nanoparticles may be used that capable of making the nanowires using the methods described in herein.
  • the nanoparticles are made of a metal or alloy selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
  • cobalt nanoparticles are used.
  • nanoparticles of any geometry may be used that are capable of making the nanowires using the methods described herein.
  • the nanoparticles are approximately spherical and have a diameter between about 1 nm and about 100 nm. In another method, the nanoparticles have a diameter equal to or less than about 10 nm.
  • the geometry and morphology of the silicon nanowires produced is any geometry and morphology capable of being produced using the methods described herein.
  • the silicon nanowires produced have a width of between about 2 nm and about 50 nm and a length of between about 10 to about 10 nm.
  • the silicon nanowires are substantially amorphous.
  • the density of nanoparticles on the metal nanoparticle coated substrate is between about 10 9 and about 10 nanoparticles per square centimeter.
  • a metal nanoparticle coated silicon substrate is used to make silicon nanowires on the substrate surface by reacting the metal nanoparticles with the silicon substrate in the presence of a reducing material.
  • the metal nanoparticles , substrate characteristics, and reducing material that may be used are as described herein, including in the Detailed Description.
  • the metal nanoparticles may be caused to react with the silicon substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
  • Another method described herein is a method for producing nanogrooves by producing nanostructures on a substrate and contacting the nanostructures with an etching composition capable of preferentially removing nanostructure material as compared to removal of substrate material.
  • the nanostructures can be produced using any method capable of making the nanostructures including any method described herein.
  • the nanostructures are made of cobalt silicide and are etched using hydrogen fluoride.
  • Another method described herein is a method of making a silane composition by heating at least a portion of a metal nanoparticle coated silicon substrate in a reaction temperature range of between about 1000 Celsius and about 1200 Celsius in the presence of hydrogen.
  • a silane composition that can be produced using this method is a monosilane, i.e., SiEU, composition.
  • the nanoparticles are made of a metal or alloy selected from, Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
  • cobalt nanoparticles are used.
  • nanoparticles of any geometry may be used that are capable of making the silane composition using the methods described herein.
  • the nanoparticles are approximately spherical and have a diameter between about 1 nm and about 100 nm.
  • the nanoparticles have a diameter equal to or less than about 10 nm.
  • the density of nanoparticles on the metal nanoparticle coated substrate is between about 10 9 and about 10 12 nanoparticles per square centimeter.
  • a metal nanoparticle coated silicon substrate is used to make a silane composition by reacting the metal nanoparticles with the silicon substrate in the presence of hydrogen.
  • the metal nanoparticles, substrate characteristics, and silane compositions that may be used or produced are as described herein, including in the Detailed Description.
  • the metal nanoparticles may be caused to react with the silicon substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
  • Figure 1(a) shows a TEM image of MNP's
  • Figure 1(b) shows a
  • Figure 2 shows an AFM image of MNP's and nanostructures
  • Figure 2(b) shows an SEM image of nanostructures.
  • Figures 3(a) and 3(b) show TEM images of nanostructures;
  • Figure 3(c) shows the electron diffraction pattern of the material shown in Figure 3(a);
  • Figure 3 (d) shows an angular dependence TEM measurement of nanostructures taken at +33 degree;
  • Figure 3(e) shows the TEM image of the Figure 3(d) sample taken by rotating 75 degrees along the vertical line.
  • Figure 4 shows an EDX of a single nanostructure from an ion milled nanostructures sample.
  • Figure 5 shows a photograph of 1/4" x 2" wafers with nanostructures
  • Figures 6(a) and 6(b) show SEM images of silicon nanowires.
  • Figure 7(a) shows a TEM image of silicon nanowires
  • Figure 7(b) shows the EDX spectrum of the nanowires shown in Figure 7(a).
  • Figure 8 shows EXAFS results for nanostructures and nanowires after
  • Described herein are cobalt-silicon and other metal-semiconductor nanostructures and metal alloy-semiconductor nanostructures and methods of making such nanostructures. Also described are nanostructures on other substrates. Also described are nanowires, including but not limited to silicon nanowires, and methods of making such nanowires; and nanogrooves and methods of making such nanogrooves. Also described are methods of making silanes
  • the nanostructures may be made by heating a nanoparticle covered substrate to produce nanoscale features embedded in the substrate surface where the nanoscale features are made of atoms from the nanoparticles and the substrate.
  • Nanogrooves may be formed by removal of the nanostructure material leaving nanoscale indented features in the substrate surface. Under certain conditions, heating of the nanoparticle covered substrate does not result in nanoscale features embedded in the substrate surface and made of atoms from the nanoparticles and the substrate but instead produces nanowires made of the substrate material.
  • the methods for making nanowires may also be used for making silanes.
  • nanostructures, nanowires, and nanogrooves are expected to make them useful in a variety of electronic and optical nanodevices, including but not limited to chemical sensors, nanoelctronic components such as transistors, as contacts, gates, and interconnects in nanoelectronics and molecular electronics, and quantum devices such as nanometer light emitters and detectors.
  • nanostructure as described herein may be useful for making contacts, interconnects, and gates in nanoelectronics (integrated circuit technology); forming advanced transistors from conductive and semiconductor nanostructures; making sensors and especially high temperature sensors; making nanoscale templates for building other nanostructures; making photoluminescent devices (nanostructures of different sizes may emit light at different wavelengths); making infrared detectors, since there is expected to be a Schottky barrier between silicide nanostructures (e.g.
  • PtSi and Si substrate; a method of examining crystalline wafers; nanofabrication of high density nanostructures (nanogrooves, nanostructures, and nanowires) of high aspect ratios (depth-to-width, depth-to-length, and width-to- length); making patterned nanostructure catalysts (for example, CoSi 2 (s, nanostructures) + H (g) -» Co (s) +SiH 4 (g)) and patterned nanostructured photocatalysts (for example, NiSi 2 for water splitting); making field emission display panels, for example using smaller (sub- 10 nm) self-aligned nanostructures; and for optical harmonic generation from the nanostructures.
  • nanostructure catalysts for example, CoSi 2 (s, nanostructures) + H (g) -» Co (s) +SiH 4 (g)
  • patterned nanostructured photocatalysts for example, NiSi 2 for water splitting
  • the nanowires produced by the methods described herein may be useful for making infrared detectors, for example it is expected that there will be a Schottky barrier between silicide nanostructures (e.g., PtSi) and a Si substrate; making photoluminescent devices (nanowires of different sizes may emit light at different wavelengths); and making patterned detector and emitter arrays (the location and properties of nanowires depend on the properties and locations of the nanoparticles).
  • silicide nanostructures e.g., PtSi
  • Si substrate e.g., silicon substrate
  • photoluminescent devices nanowires of different sizes may emit light at different wavelengths
  • patterned detector and emitter arrays the location and properties of nanowires depend on the properties and locations of the nanoparticles.
  • nanogrooves produced by the methods described herein may be useful as templates for building other nanostructures; and in field emission displays.
  • the nanostructures described herein have very small dimensions, and some of them (Co silicide, for example) are expected to be highly conductive whereas others (Fe silicide, for example) are expected to be semiconductors, it is expected that different devices such as transistors and chemical sensors can be made from the nanostructures.
  • Certain of the nanostructures have a large amount of surface atoms along the exposed edge (about 10 to about 30% of the total number of atoms in the nanostructure for 3 nm wide nanostructures) and this may make the nanostructures particularly suitable for chemical sensors.
  • the nanostructures may also be suitable as contacts, gates, and interconnectors in future nanoelectronics.
  • nanostructures described herein are referred to as “self- aligned nanostructures,” for which the acronym “SAN's” is used. SAN's are also referred to as SNS's and unless the context makes clear otherwise these two acronyms are used interchangeably.
  • Specific nanostructures are referred to as “Co-Si or metal- semiconductor self aligned nanostructures” or “Co-Si or metal-semiconductor SAN's,” or simply as “SAN's.” None of these terms are intended to be limiting on the general description of nanostructures as described herein, which are generally described in the section below titled “Nanostructure Composition, Morphology, Dimensions, andAreal Density on Substrate. "
  • the nanostructures may be made by heating a metal nanoparticle coated substrate for a reaction time at a reaction temperature or range of reaction temperatures.
  • the MNP's may be made of pure metals, but may also be made of metals with dopants and may be made of metal alloys. If the nanostructures are required to be used at a temperature other than the temperature at which they are made, the method will also include a step of heating or cooling the nanostructures to the temperature at which they will be used.
  • the metal nanoparticle coated substrate may generally be prepared by any method capable of preparing the coated substrate, including contacting the substrate with a composition containing the metal nanoparticles.
  • Additional steps may optionally be included in the method of making the nanostructures, including but not limited to preparing the substrate for contacting with the MNP's, positioning the MNP's on the substrate once they have been contacted with the substrate, and cleaning and drying the MNP-substrate system before the heating step.
  • the metal nanoparticles used for making the nanostructures may generally be made of any metal and may include additional components in addition to the metal.
  • Metals that may be used include but are not limited to Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au.
  • Other MNP that may be used in the compositions and methods described herein are MNP's made from alloys of two or more metals, including but not limited to alloys made from mixtures of two or more metals selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au.
  • the composition of the MNP's may be used to control lattice mismatch between the nanostructures and the substrate, which it is believed in turn may control the length of the nanostructures.
  • the MNP may contain additional components including but not limited to impurities that do not substantially change any of the relevant properties of the MNP or resulting nanostructures, and other impurities specifically added to alter the properties of the nanostructures or alter the conditions under which the nanostructures may be made. Such added impurities include but are not limited to carbon and oxygen impurities.
  • the MNP's may generally be of any size, shape, and morphology that will allow fabrication of the nanostructures.
  • the shape and size of the MNP's used may be but are not limited to approximately spherical MNP with a diameter of between about lnm to about 100 nm. In one method of making nanostructures, MNP's with a diameter of less than about lOnm are used.
  • the MNP may be made using any method known in the art including the methods described in the Examples section. Specific sizes of MNP's that may be used include MNP's with a diameter of between about 3 and about 7nm and MNP's with a diameter of between about 8 and about 16nm.
  • MNP's With diameters of less than about 5nm yield growth of nanostructures at the highest yield.
  • the size of MNP' s that may be used is not limited to those with diameters less than about 5nm.
  • Populations of MNP's that may be used include but are not limited to a population of MNP's in which the average diameter of a MNP in the population is between about lnm and about 5nm and the standard deviation in the diameter of the MNP's in the population is between about 10% and 20% of the average diameter or a population of MNP's in which the average diameter of a MNP in the population is between about 8nm and about 16nm and the standard deviation in the diameter of the MNP's in the population is between about 10% and 20% by length.
  • the average diameter is 5nm
  • a standard deviation of 10%-20% of the average diameter could be a standard deviation of 0.5nm-lnm.
  • the MNP's When the MNP's are Co, the MNP's may be approximately spherical and may have a diameter of between about lnm and about 20nm. In one method of making the nanostructures, Co MNP's with a diameter of between about 2 nm and about 15nm are used. In another method of making the nanostructures, Co MNP' s with diameters of between about 2nm to about 5nm or between about 8nm to about 14nm are used. The size of the MNP's may be used to control the dimension of the nanostructures.
  • any substrate capable of reacting with the MNP's to produce the nanostructures may be used, including but not limited to semiconductor substrates, which include but are not limited to Si, Ge, GaAs, or substrates with an expitaxial grown layer of other elements, including but not limited to Ti.
  • the substrate may be of any morphology that is capable of reacting with the MNP's to produce the nanostructures, including but not limited to crystalline surfaces and locally crystalline surfaces. If the substrate is crystalline or locally crystalline, the crystal surface may be any crystal surface.
  • the substrate may be a pure or substantially pure substrate or may be doped with specific dopants that may affect the properties, including but not limited to the electronic and optical properties, of the substrate.
  • substantially pure is meant that the substrate may contain accidental impurities but that these were not specifically added and do not substantially change the properties of the substrate.
  • the substrate may be doped with N or P type dopants, including but not limited to B, P, and N.
  • the substrate is crystalline or at least locally crystalline. In such case the surface may generally have any crystal plane, including but not limited to the (100) or the (111) plane.
  • the substrate may be pure Si, substantially pure Si, or may be Si doped with dopants, including but not limited to B, P, and N.
  • the substrate may be prepared by any method that may be used to prepare Si substrate surfaces, including but not limited to typical Cz crystal growth method such as that used by Virginia Semiconductor and polished by mechanical and electrochemical methods.
  • the substrate may optionally be prepared before contacting with the composition.
  • the substrate may be prepared for contacting with the MNP's using any method capable of preparing the substrate, including but not limited to standard mechanical and then electrochemical polishing of Si bulk crystals.
  • a pristine surface may be used without being specifically prepared for contacting with the MNP's. Surface contamination may be removed using the method described in the Examples.
  • the substrate is cleaned to remove surface contaminants before the MNP's are contacted with the substrate.
  • the substrate is Si the substrate may be cleaned by various methods including but not limited to immersing in Piranha solution for 10 minutes, washing with deionized water and toluene (99%), and drying in Ar gas.
  • the MNP composition may generally be contacted with the substrate by any method capable of contacting the MNP composition with the substrate, including but not limited to contacting the substrate with a solution containing the MNP's and sonicating the substrate-MNP system. Other methods such as micro-printing techniques and patterning using AFM, STM, and CFM may be used for depositing MNP's on the substrate.
  • the concentration of MNP's in the solution may be any concentration that yields the required areal density of nanostructures on the substrate, including but not limited to concentrations of between about 10 and about 10 MNP's/cm 2 .
  • Solvents that may be used are any solvent capable of containing the
  • MNP's and depositing the MNP's on the substrate including but not limited to dichlorobenzene and toluene.
  • the MNP-substrate system may be washed and dried.
  • the MNP's are contacted with the substrate it may for certain applications be desirable to position the MNP's on the substrate. In this case, the
  • MNP's may generally be positioned using any method capable of positioning the
  • MNP's including but not limited to use of atomic force microscopes, scanning tunneling microscopes, chemical force microscopes, and micro-printing.
  • the metal nanoparticle coated substrate has been produced, which may be by contacting the MNP composition with the substrate and subsequent optionally positioning of the MNP's on the substrate if required, the MNP's are reacted with the substrate.
  • the MNP's are reacted with the substrate by heating the MNP-substrate system for a time and at a temperature or range of temperatures sufficient to produce the nanostructures.
  • a metal nanoparticle coated substrate is used to make nanostructures on the substrate surface by reacting the metal nanoparticles with the substrate.
  • the metal nanoparticles and substrates that may be used are as described herein.
  • the metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein.
  • Heating regimes that may be used include but are not limited to heating the system from its initial temperature (usually room temperature) at a heating temperature or heating temperature range and then maintaining the system at a reaction temperature or in a reaction temperature range for a reaction time.
  • any reaction time, heating temperature range, and reaction temperature ranges may be used that are capable of producing the nanostructures.
  • the reaction time is between about 1 second and about 2 hours.
  • the reaction temperature range is between about 800°C and about 1200°C.
  • the reaction temperature range is between about 800°C and about 1000°C.
  • the reaction temperature range is between about 1000°C and about 1200°C.
  • the reaction temperature range is between about 700°C and about 1300°C.
  • the reaction temperature range is between about 600°C and about 1400°C. In one method the reaction temperature range is between about 500°C and about 1500°C. In one method the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. In one method the heating temperature range is between about 800°C and about 1000°C, and the reaction temperature range is between about 800°C and about 1000°C. In one method the heating temperature range is between about 1000°C and about 1200°C, and the reaction temperature range is between about 1000°C and about 1200°C. In one method the heating temperature range is between about 700°C and about 1300°C, and the reaction temperature range is between about 700°C and about 1300°C.
  • the heating temperature range is between about 600°C and about 1400°C, and the reaction temperature range is between about 600°C and about 1400°C. In one method the heating temperature range is between about 500°C and about 1500°C, and the reaction temperature range is between about 500°C and about 1500°C.
  • heating in a heating temperature range or “heating in a reaction temperature range” means that the system being heated is maintained for some amount of time in an environment that is at a single temperature or at a number of different temperatures all of which fall within the specified heating or reaction temperature range.
  • a system placed in a furnace at 900° for two hours would fall within the definition of "being heated in a reaction temperature range of between about 800°C and about 1000°C for a reaction time of about 2 hours.”
  • a system placed in a furnace at 900°C for one hour and at 950°C for the subsequent hour would likewise fall within the definition.
  • Both the range of temperatures and the length of time for which the reaction temperature is maintained may be used for controlling the length of the nanostructures.
  • the heating and reaction steps may be two separate steps or may be combined into one step, in which case the system is maintained in a reaction temperature range for a reaction time sufficient to heat the system and subsequently cause the system to react, thereby producing the nanostructures.
  • the size and the composition of the MNP's may also be used for controlling the dimensions of the nanostructures, including the length of the nanostructures.
  • the melting temperature of small MNP's is strongly dependent on the size of the MNP ⁇ the smaller the MNP's, the lower the melting temperature ⁇ and it may be expected therefore that the narrow nanostructures will grow first from small MNP's, followed by nanostructures formed from the bigger MNP's.
  • Heating can be done using any method capable of producing the desired heating including but not limited to large area heating such as placing the whole substrate in a high temperature furnace, or via localized heating such as employing focused laser beams to raise temperature at desired locations.
  • any method capable of maintaining the system or any portion of the system in a reaction temperature range for the reaction time may be used for causing the reaction step.
  • the temperature ranges in which the system is heated and reacted depends on the specific MNP's and substrate used and can be easily determined by conducted a number of runs with different heating and reaction temperature ranges and analyzing the nanostructures produced.
  • the reaction temperature range is between about 800 Celsius and about 1000 Celsius. In another method, the reaction temperature is about 900 Celsius.
  • the nanostructures described herein may be made of a metal or a metal alloy and a semiconductor material and may optionally include additional components.
  • the nanostructures are pure or substantially pure.
  • substantially pure is meant that the nanostructures may contain impurities that do not substantially effect the properties of the nanostructures and which were not purposefully placed in the nanostructures.
  • Additional components that may be present in the nanostructures may be those additional components added to the MNP's or those additional components added to the substrate. For example, if a semiconductor substrate included an N-type dopant, the resulting nanostructures may contain the N-type dopant.
  • the nanostructures may contain other doped impurities, and may generally contain any impurities for which the lattice distortion is small enough to maintain expitaxial growth.
  • dopants may be added them as an additional component to the substrate-MNP system rather than have the dopant incorporated in the MNP or substrate.
  • the nanostructures may be of any stoichiometry allowed under the kinetic and fherrnodynamic conditions under which the nanostructures were formed, and generally the nanostructures may be of any morphology allowed under the kinetic and thermodynamic conditions under which the nanostructures were formed. Nanostructures that are crystalline or semi-crystalline in nature may be used.
  • amorphous nanostructures may be made by making crystalline nanostructures and then converting them into amorphous nanostructures. It is expected that amorphous nanostructures will have interesting electronic and optical properties.
  • the composition of the resulting nanostructures is pure or substantially pure, crystalline CoSi 2 . Grazing incidence extended x-ray absorption fine structure spectroscopy can be used to verify UIQ structure. Specific dopants that may be incorporated in the CoSi 2 nanostructures include but are not limited to C and O.
  • the nanostructures When present on the substrate, the nanostructures may be of approximately rectangular cross-section.
  • the top of the nanostructures are generally slightly extended above the substrate surface, and may also be flush or substantially flush with the substrate surface and the nanostructure projects into the substrate for a depth of between about lnm and about 50nm. Described herein are nanostructures with a depth of between about 15 nm and about 25 nm. It is expected that it will be possible to control the depth of the nanostructures produced on the substrate by any method capable of controlling the depth including but not limited to controlling the density and size of the MNPs deposited on the substrate and the adhesion force between MNPs and substrate surface. It is expected that control of the adhesion force between the MNP's and the substrate surface can be achieved by modifying the surface with various modification groups including but not limited to various nucleophile terminated (amine) silanes.
  • the nanostructures may generally have a width of between about lnm and about 50nm, and more particularly may have a width between about 2nm to about 20nm. Described herein are nanostructures with a width of between about 3 nm and about 5 nm. It has been found that it is possible to control the width of the nanostructures produced on the substrate by controlling the size and composition of the MNP' s. Without being bound by theory, is believed that the size of the MNP' s determines the melting temperature of the MNP's and their mobility on surface and this in turn controls the width of the nanostructures.
  • the nanostructures may generally have a length of between about lOnm and about 10,000nm; and more particularly, the nanostructures may have a length of between about 30nm and about 500 nm. Described herein are nanostructures with a length of between about 65 nm and about 90 nm. It has been found that it is possible to control the length of the nanostructures produced on the substrate by controlling the location of known density and size of uniformly sized MNP's. It may also be possible to control the length of the nanostructures by varying the range of reaction temperatures at which the nanostructures are made, by varying the reaction time, and by varying the composition of the MNP's used to make the nanostructures.
  • the nanostructures are made of CoSi 2
  • the nanostructures have a depth of between about lnm and about 50nm, a width of between about 1 nm and about 50 nm, and a length of about 30nm and about 10,000nm.
  • the nanostructures may generally be produced on a substrate with any areal density. It is expected that it is possible to control the areal density of the nanostructures by various methods including but not limited to the dilution of the MNP's stocking solution, the deposition time, and the chemical structure of any surfactants or other chemical modification groups on the MNP's and any surfactants or other chemical modification groups on the substrate.
  • CoSi 2 nanostructures will have substantially conducting electronic properties, whereas it is believed that iron silicide ( ⁇ -FeSi ) will likely have semiconducting electronic properties; although the electronic properties of the nanostructures may be modified from the bulk properties by quantum confinement effects.
  • nanowires are made using methods similar to those described above for making nanostructures.
  • the metal nanoparticle coated substrate is maintained in the reaction temperature range for a reaction time and for at least a portion of the reaction time the reaction is carried out in the presence of a reducing material.
  • nanowires made of other materials may be made in a similar manner to the Si nanowires. For example, if Co MNP's are used in the above described methods for making nanostructures and the heating temperature is about 1100 degrees Celsius, Si nanowires have been made without the use of methane.
  • the dimensions of the Si nanowires made under these conditions are between about 5nm and about 20 nm in diameter and depending on the reaction time and other exact reaction conditions are expected to be from about microns to about millimeters in length. Experiments have yielded high yield of Si nanowires.
  • the nanowires may generally have any morphology. In one version, the nanowires have an amorphous morphology.
  • the nanowire may also be coated with surface groups, for example Si nanowires may be covered with SiO 2 .
  • nanowires with diameters from about 2nm to about 50nm may be grown. It is believed that the diameter of the nanowires may be controlled by the size and composition of the MNP's, the growth temperature, the pressure of the back-filled gases, and crystallinity of the substrate.
  • the nanowires can be approximately straight (radius of curvature larger than several hundred nanometers) or may be coiled (radius of curvature smaller than 200 nm).
  • the temperature ranges in which the system is heated and reacted to produce the nanowires is expected to depend on the specific MNP's and substrate used and can be easily determined by conducted a number or runs with different temperature ranges and analyzing the nanowires produced.
  • the heating and reaction temperature ranges are between about 1000 Celsius and about 1200 Celsius.
  • the reaction temperature range is between about 1000 Celsius and about 1200 Celsius.
  • the reaction temperature is about 1100 Celsius.
  • reaction temperature ranges and heating temperature ranges that may be used for making nanowires from the Co-Si and other metal nanoparticle coated substrate systems are as follows. Generally, any reaction time, heating temperature range, and reaction temperature ranges may be used that are capable of producing the nanowires. In one method the reaction time is between about 1 second and about 2 hours. In one method the reaction temperature range is between about 800°C and about 1200°C. In one method the reaction temperature range is between about 1000°C and about 1200°C. In one method the reaction temperature range is between about 700°C and about 1300°C. In one method the reaction temperature range is between about 600°C and about 1400 C. In one method the reaction temperature range is between about 500 C and about 1500°C.
  • the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. In one method the heating temperature range is between about 1000°C and about 1200°C, and the reaction temperature range is between about 1000°C and about 1200°C. In one method the heating temperature range is between about 700°C and about 1300°C, and the reaction temperature range is between about 700°C and about 1300°C. In one method the heating temperature range is between about 600°C and about 1400°C, and the reaction temperature range is between about 600°C and about 1400°C. In one method the heating temperature range is between about 500°C and about 1500°C, and the reaction temperature range is between about 500°C and about 1500°C.
  • the reaction is carried out in the presence of a reducing material.
  • the step heating the nanoparticle coated substrate may or may not be carried out in the presence of a reducing material, or may be carried out for some of the reaction time in the presence of a reducing material.
  • the nanoparticle coated substrate is maintained for some reaction time in the range of reaction temperatures and for at least some of the reaction time the reaction is carried out in the presence of a reducing material.
  • Reducing materials that may be used include but are not limited to hydrogenating materials, including but not limited to hydrogen gas.
  • Other reducing materials that may be used include but are not limited to CO.
  • the reaction may also optionally be carried out in the presence of a buffer gas.
  • Buffer gasses that may be use include but are not limited to Ar gas.
  • nanostructures are formed during the nanowire preparation and the nanostructures may behave as precursors in the growth of nanowires.
  • Nanowires produced by the methods described here may be used in a variety of applications as is known in the art, including but not limited to sensors (for example, after the nanowires are functionalized with different acceptors), light emitters and absorbers (tunable when the nanowires are doped with other elements such as B and P), nanocantilevers, and composite materials.
  • the nanostructures may be used as catalysts to convert H 2 (gas) and Co silicide into silanes (gas at high temperatures (>500 degrees Celsius) and Co metal, which may react with Si further to produce Co silicide again. Therefore, the nanostructures may be acting as catalysts. With silanes, Co alone can catalyze the growth of Si nanowires. It is believed that it may be possible to use nanostructures as catalysts for other applications such as in Fisher-Tropsch reactions that convert H 2 (gas) and CO (gas) into hydrocarbons in fuel related applications.
  • the properties of the nanowires produced depend on the material and size characteristics of the metal nanoparticles used, it may be possible to grow different nanowires on the same substrate by using metal nanoparticles with different characteristics (diameter, composition, and density) on the same substrate.
  • the method described herein for making nanowires may also be used as a method for making silanes. Described herein is therefore a method for making silanes, in which a metal nanoparticle coated silicon substrate is heated in a temperature range of between about 1000 Celsius and about 1200 Celsius in the presence of hydrogen, thus producing a composition comprising one or more silanes.
  • the composition produced comprises monosilane, i.e., SiH 4 .
  • NANOGROOVES Methods of Making Nanogrooves & Description of Nanogrooves [0080] It has also been discovered that it is possible to make nanogrooves using the nanostructures described above.
  • etching CoSi 2 nanostructures present in a Si substrate with HF it is possible to produce silicon nanogrooves.
  • the geometry and pattern of the nanogrooves will be substantially ⁇ ie same as the geometry and pattern of the nanostructures.
  • etching nanostructures as shown in Figure lb or 2b will produce a nanometer sized "tread- deck' like pattern of Si nanogrooves.
  • nanogrooves may be produced in any substrate in which nanostructures may be made. For example, it is expected that nanogrooves may be made in all substrates listed in the nanostructure section above.
  • nanogrooves may be made by treating a nanostructure containing substrate with a composition capable of preferentially removing some or all of the nanostructure material from the substrate as compared to removal of the substrate material itself.
  • this nanogroove producing method may be used for on any of the nanostructure-substrate systems described in the nanostructure section above. Examples of chemicals that may be used to preferentially remove the nanostructure material include but are not limited to HF.
  • nanogrooves will have geometry similar to that of the nanostructures from which they are produced. However, it is expected that it will be possible to control the depth of a nanogroove by controlling the amount of time for which the nanostructure-substrate system is exposed to the nanostructure removing composition. It is expected to be possible, therefore, to produce nanogrooves with depths from Onm up to a depth approximately equal to the depth of the nanostructure from which the nanogroove is produced.
  • the nanogrooves are expected to have widths and lengths in the ranges and geometries described for the nanostructure systems, and to have depths from about Onm to about the depth of the nanostructure from which the are produced.
  • the nanogrooves so produced to inspect nanostructures on Si wafers. Since the nanostructures can be used substrate dependent, the method presented here can be used to examine the quality of the Si wafers, especially their surface quality and composition. For example, since the formation of the nanostructures depend on various characteristics of the Si substrate, and nanogrooves are easy to see under an SEM, the formation of nanogrooves can be used to examine the substrate, particularly the crystallinity of the substrate, whether the substrate has too much of a SiO 2 layer, or whether the crystallinity of the substrate is weak.
  • a new type of material exemplified by the formation of 3 nm wide, self-aligned cobalt silicide (CoSi 2 ) nanosutructures that can be used as contacts, interconnects, and gates in future nanoelectronics and devices, is synthesized by reactions of Co metal nanoparticles with Si substrates.
  • Described herein is the synthesis of a new type of material, the formation of 3 nm wide, self-aligned cobalt silicide (CoSi 2 ) nanostructures from reactions of Co metal nanoparticles deposited on Si substrates at 900°C.
  • the length of these self-aligned silicide varies from 50 nm to a few microns, and their orientation is determined by the crystalline substrate as they form orthorgonally and hexagonally aligned nanostructures on Si (100) and Si (111), respectively.
  • These nanostructures are thermally stable up to 1000°C in air, and are chemically inert to prolonged treatment with strong acids.
  • These nanostructures can be used to build contacts, interconnects, gates, transistors, and other nanoscale components that are critical to building nanoscale electronic devices and sensors.
  • Nanowires including those made of ZnO, GaN, InP, and Si, and carbon nanotubes have been the focus of many studies in the last decade. (1, 2, 3) Challenges arise not only from making those novel materials, but also from manipulating them once they are made. It is thus advantageous to be able to directly grow desired nanostructures on suitable substrates for device fabrication. Such methods are usually called a bottom-up approach. Lithography, which is a top-down approach, can also make nanostructures if crystalline thin films are available. (4, 5, 6) For example, sub-micron cobalt silicide structures have been made using the top-down method.
  • Co (CO) 8 0.54 g was dissolved in 3 mL of oxygen-free anhydrous dichlorobenzene (DCB) in a dry box. The solution was then injected into a surfactant mixture, including oleic acid (OA), trioctylphosphine oxide (TOPO), and trioctylamine (TO A), at a temperature slightly above the boiling point of DCB under Ar. After several minutes, portions of the solution were withdrawn from the reaction flask and placed in Ar-filled vials. Depending on the ratios of the surfactants, different sized Co nanoparticles were made, and their sizes were verified by transmission electron microscopy (TEM).
  • TEM transmission electron microscopy
  • Figure la shows a TEM image of MNP under a condition that favors the growth of 12-nm MNP. Smaller nanoparticles are also present. The large ones have an average diameter of 12 ⁇ 1.2 nm and the small ones 4.4 ⁇ 0.5 nm.
  • Deposition of the nanoparticles on Si substrates was carried out in air. A solution containing MNP was diluted (from 10:1 to 100:1) in DCB in the dry box, and clean Si substrates were immersed in the diluted solution for several minutes under sonication.
  • the Si substrates were cleaned in Piranha solution (4:1 H 2 O 2 (30% in water) and H 2 SO 4 (cone)) for 10 minutes before deposition, and deionized water and DCB were used to wash the deposited substrates. Undoped (100) and (111), and highly B- and P-doped (100) substrates were used. [0094]
  • the MNP coated Si substrates were placed in a high temperature tube furnace (Lindburg/Mini-MiteTM) for the nanostructure synthesis. Ar, H and CH 4 gases
  • Figure lb shows an SEM image of a typical nanostructure sample.
  • diluted (100:1 in DCB) 5-nm Co nanoparticle solution and undoped Si (100) were used.
  • the growth temperature was 1000 °C.
  • Two lengths of nanostructure are visible: the medium (200 ⁇ 20 nm) and short (85 ⁇ 12 nm) nanostructure. Based on the SEM measurements, the width of the nanostructure is less than 6 nm. A few isolated and aggregated Co nanoparticles are also visible. None of the nanostructure have metal catalysts attached to their ends.
  • Figure 2a shows the AFM (tapping mode) image of a sample produced under similar conditions. Again, nanostructures of two general lengths are observed.
  • the long nanostructure have an average length of 167 ⁇ 32 nm, and the short ones are
  • SWNT single wall carbon nanotube
  • Figure 2b shows nanostructures made using 12-nm MNP at 900°C. These nanostructures in this sample have an average length of 78 ⁇ 11 nm. The density is 20 nanostructures/ ⁇ m 2 , the highest produced to date.
  • TEM was used to examine the structure of the nanostructures. Standard dimpling and ion milling techniques were employed. A high resolution TEM image is shown in Figure 3a. Both the substrate and the nanostructures have clearly resolved lattice fringes, and both fringes have an -3.8 A spacing. The surface normal to Si (100) in this figure is not parallel to the e-beam.
  • Figure 3b shows the two parallel nanostructures, showing they are perfectly aligned.
  • the 3.8 A spacing between the fringes observed in Figure 3a indicate that it is the (110) plane. No other obvious spots are visible.
  • the nanostructures are grown along the (110) direction with their edge exposed on Si (100) as shown in Figure 1 - 3. This can be explained by the fact that both (100) and (110) of CoSi 2 are a good match to Si (100).
  • the overall length looks shorter than the real value. Furthermore, the sheet plane of the nanostructures is parallel to Si (110) and not perpendicular to the Si (100), as shown in Figure 3 a.
  • the crystalline cobalt silicide CoSi 2 (Fm3m) has a lattice constant of
  • CoSi 2 In the conventional top-down method of making CoSi 2 structures, large amounts of Co (e.g., 20 nm thick layer) are deposited on Si wafers to produce single crystalline CoSi 2 .
  • a two-step reaction is then employed. First, CoSi is made between the Co-Si interface at 500°C. To guarantee aligned growth of CoSi 2 , extra Co above the interface is chemically removed before the reaction at a higher temperature is carried out. Second, the temperature is raised to ⁇ 700 - 900°C to convert CoSi to CoSi 2 through Si migration.
  • Si silicon
  • Si nanowires can be made with H 2 gas and silicon wafers in the presence of Co nanoparticles.
  • Si nanowires were made by reacting Co nanoparticles (CoNP) with Si wafers in H and Ar gases at 1100 °C.
  • CoNP Co nanoparticles
  • the deposition of CoNP was similar to that used in making nanostructures at 900 °C.
  • the SiNW covered Si wafers are dramatically different from that of nanostructure or unreacted Si wafers, as shown in Figure 5.
  • the dull color (the wafer on the right) is due to the strong scattering of the SiNW on the substrate.
  • the dimensions of the strips are approximately 1/4" x 2". .
  • a high resolution SEM picture Figure 6(a) shows that those SiNW are
  • the scale bar in Figure 6(a) is 5 ⁇ m. Since the ends of SiNW are not easily found, one can estimate that these wires are many microns long. The quality of those wires is high. Since no hydrocarbons were used during the growth, no amorphous carbon is visible on the surface of those SiNW. The density of the wires is high and the thickness of the layer of the SiNW is significant, and the Si substrate is completely blocked by the wires.
  • Figure 6(b) shows coiled SiNW.
  • the scale bar in Figure 6(a) is 2 ⁇ m.
  • FIG. 7 shows a TEM image of the SiNW that were stripped from the Si wafer using a razor blade, and an EDX result on a section of a SiNW deposited on a Lacey carbon TEM grid.
  • the EDX shows pure Si from those wire segments.
  • the Cu signal comes from the Cu in the TEM grids.
  • the spot in Figure 7(a) shows the location of the electron beam.
  • the scale bar is 500 nm.

Abstract

Compositions and methods for making nanostructures and nanowires on substrates, including but not limited to metal-semiconductor nanostructures and semiconductor nanowires on semiconductor substrates. Particularly described are methods for making cobalt silicide nanostructures on silicon substrates and for making silicon nanowires on silicon substrates using cobalt nanoparticles. Nanogrooves and methods of making nanogrooves. Method of making silanes.

Description

NANOSTRUCTURES, NANOGROOVES, AND NANOWIRES
Inventor: Ting Guo
RELATED APPLICATIONS
[0001] This application claims priority benefit of provisional patent application
60/512,478, filed October 16, 2003, with inventor Ting Guo, and title "Metal- Semiconductor nanostructures," the contents of which is incorporated herein in its entirely.
TECHNICAL FIELD
[0002] Described herein are compositions and methods related generally to nanostructures, nanowires, and nanogrooves on substrates, including but not limited to metal-semiconductor or alloy-semiconductor nanostructures and semiconductor nanowires on semiconductor substrates.
BACKGROUND
[0003] With the advent of new nanotechnology techniques over the past few years, it is becoming possible to produce materials with nanoscale features that have new and useful optical, electronic, and other properties. For example, nanoscale structures embedded on the surface of a semiconductor or other substrate and made of a material different from the substrate may be useful in a variety of applications including as contacts, interconnects, and gates in nanoelectronics integrated circuit technology; in the formation of advanced transistors from conductive and semiconductor nanostructures; as sensors, especially high temperature sensors; as nanoscale templates for building other nanostructures; as photoluminescent devices; as infrared detectors; as a method of examining crystalline wafers; in the nanofabrication of high density nanostructures of high aspect ratios; as patterned nanostructure catalysts and photocatalysts; as field emission display panels; and for generating optical harmonics from the nanostructures. It is also becoming possible to make other nanoscale structures such as nanowires that may be useful in a variety of applications including as infrared detectors; photoluminescent devices; and patterned detectors and emitter arrays.
[0004] Currently, two general methods can be used to make nanostructures on crystalline substrates.
[0005] The first method deposits atoms on a substrate and allows them to react with the substrate to make lines of one-atom width. This method is extremely difficult to perform because individual atoms have to be deposited onto the surface. Therefore, the location of those atomic lines is difficult to control. More importantly, the structures so produced are limited in their width and may not possess the required properties, such as being electrical conductors. It is also impossible to form multiple component crystalline wires because the width is only one atom wide. [0006] A second method employs thin film deposition (one-step or multiple- step deposition (Dass et al., 1991 APL), and high energy ion implantation (White et al. 1987 APL)) followed by heating (laser (Tung et al. 1983 APL) or other methods of heating). Depending on the thickness of the films deposited on the substrate, either small particles are formed and then converted into metal silicides (when the substrate is silicon) or the thin films are directly converted into metal silicide films (when the substrate is silicon). Lithography is then used to make micro-structures. There are several drawbacks associate with these thin film methods. First, the location of the structures produced is random, depending on where and how the thin films are broken. For example, thin films may break down into particles of different sizes, which may lead to the production of differently sized structures. Since the average size of thin films determines the structures produced subsequently, extremely thin films are needed to make nanometer sized structures. Second, thin film deposition is usually preformed in high vacuum, making it difficult to operate and more costly. Third, the width of lithographically produced nanostructures is more than tens of nanometers, too large for future nanoelectronics.
[0007] These existing methods of making nanostructures have substantial drawbacks in making nanostructures useful in the applications listed above and there is a need for methods of producing nanostructures that are capable of accurately controlling the size and morphology of the nanostructures, producing nanostructures of a variety of sizes, and working without the use of high vacuum. [0008] Several methods have been developed to make nanowires, particularly
Si nanowires, and most of them need to provide Si in the gas phase, normally in the form of silane (SiH4). Yan et al. (Jour of Crystal Growth, Nol 257, p69 (2003)) reported the growth of thick (100-200 n diameter.), short, and straight Si nanowires from H , Sit i, and Au-Pd alloy films deposited on Si wafers. Hu et al. (Chem. Phys. Lett. Nol 378, p299 (2003)) use high temperature furnace (1350 C) to evaporate Si to form Si nanowires (20 - 1000 nm in diameter.). Laser ablation of silicon at high temperature furnace (1200 C) has also been used by Tang et al. (J. Nac. Sci. Technol. B 19(1), p317 (2001)) and of silicon and metals by Morales et al. However, the nanowires by laser ablation are highly curved. Silane and Ti catalysts have been used to make Si nanowires by Kamins et al. (Appl. Phys. Lett., Nol 82, p263 (2003)). Au nanoparticles and diphenylsilane are used by Holmes et al. to make Si nanowires (Science, Vol 287, pl471 (2000)). In other cases (e.g. Kim et al. Chem Commun, p256 (2003)), low melting solids such as Ga have been used together with Si substrate and H to induce the growth of Si nanowires. Although no silanes are used, this method lacks the control over the locations of the nano ire growth.
[0009] These existing methods of making nanowire have substantial drawbacks in making nanowires useful in the applications listed above and there is a need for methods of producing nanowires, particularly Si nanowires, that eliminate the use of silanes and provides control over the location of the growth, and the size and homogeneity of the nanowires grown.
SUMMARY
[0010] Described herein are methods of making nanostructures and nanowires that overcome one or more of the drawbacks of the existing methods. Also described are particular nanostructures and nanowires, particularly nanostructures and nanowires made using a silicon substrate. Also described are nanogrooves, methods of making nanogrooves, and methods of making silanes.
[0011] In one method, nanostructures may be made on a substrate by maintaining at least a portion of a nanoparticle coated substrate in a reaction temperature range for a reaction time, thereby producing nanostructures on the substrate. The method may also optionally include the step of heating at least a portion of the metal nanoparticle coated substrate in a heating temperature range prior to maintaining in the reaction temperature range. The exact heating and reaction temperature ranges may vary, depending on the size and composition of the metal nanoparticles and the substrate. In one method of making nanostructures, the reaction temperature range is between about 800°C and about 1200°C. In one method of making nanostructures, the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. The metal nanoparticle coated substrate may be made in a variety of ways, including but not limited to contacting the substrate with a metal nanoparticle composition to give the metal nanoparticle coated substrate.
[0012] The substrate may generally be any substrate, including but not limited to a semiconductor substrate. Semiconductor substrates that may be used include but are not limited to silicon, germanium or gallium arsenide. The surface of the substrate coated with the nanoparticles may generally be of any morphology, including but not limited to a crystalline or locally crystalline surface morphology. [0013] The metal nanoparticles (which are also referred to herein as "MNP's" used may generally be any nanoparticles capable of making the nanostructures, including but not limited to nanoparticles comprising a metal or alloy selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing. In one method of making nanostructures, cobalt nanoparticles are used. In one method of making nanostructures, cobalt nanoparticles are used, the reaction temperature range is between about 800°C and about 1200°C. In one method of making nanostructures, cobalt nanoparticles are used, the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. The nanoparticles may optionally include added impurities, including but not limited to carbon and oxygen. [0014] Regarding the size of the nanoparticles, generally any sized nanoparticles may be used that are capable of making the nanostructures. In one method of making nanostructures, nanoparticles that are approximately spherical and have a diameter between about 1 nm and about 100 nm are used. In another method, nanoparticles having a diameter equal to or less than about 10 nm are used. [0015] Regarding the density of nanoparticles on the nanoparticle coated substrate, generally any density may be used that is capable of making the nanostructures. In one method of making nanostructures, the density of nanoparticles on the nanoparticle coated substrate is between about 109 and about 1012 nanoparticles per square centimeter.
[0016] Regarding the heating conditions, generally any heating temperature range, reaction time and reaction temperature range may be used that are capable of making the nanostructures. In one method of making nanostructures, the reaction time for which the nanoparticle coated substrate is maintained at the reaction temperature is about 2 hours or less. In one method of making nanostructures, the nanoparticle coated substrate is maintained in a reaction temperature range of between about 800°C and about 1000°C. In one method of making nanostructures, the nanoparticle coated substrate is heated in a heating temperature range of between about 800°C and about 1000°C, and is maintained in a reaction temperature range of between about 800°C and about 1000°C for the reaction time. Other heating and reaction temperature ranges that may be used are described herein, including in the Detailed Description. [0017] The nanoparticle coated substrate may generally be prepared in any manner. In one method of preparing the nanoparticle coated substrate, the substrate is contacted with a metal nanoparticle composition to give the metal nanoparticle coated substrate. The substrate may be optionally cleaned, polished, or cleaned and polished before contacting the substrate with the metal nanoparticle composition. Generally any metal nanoparticle composition may be used capable of producing a nanoparticle coated substrate that yields nanostructures upon heating under the various conditions described herein. The metal nanoparticle composition contains metal nanoparticles, which may generally be any metal nanoparticles as described herein, with composition, geometry and size as described herein. In one method, the nanoparticles in the composition are all of approximately the same size. In another method, the standard deviation of the size of the nanoparticles in the composition is less than or equal to about 20% of the average size of the nanoparticles. In another method, the standard deviation of the size of the nanoparticles in the composition is between about 10% and about 20% of the average size of the nanoparticles.
[0018] Regarding the composition of the nanostructures, under certain conditions that are described in more detail in the Detailed Description, the nanostructures produced are made of atoms from the substrate and from the metal nanoparticles. In one method of producing nanostructures made of atoms from the substrate and from the metal nanoparticles, the nanoparticle coated substrate is maintained in a reaction temperature range of between about 800°C and about 1000°C for the reaction time.
[0019] The geometry of the nanostructures produced may generally be of any geometry capable of being made by the methods described herein. In one method of making nanostructures, the nanostructures are made with a depth of between about 1 nm and about 50 nm, a width of between about 1 nm and about 50 nm, and a length of between about 10 nm and 10,000 nm. In another method of making nanostructures, the nanostructures are made with a depth of between about 15 nm and about 25 nm, a width of between about 2 nm to about 20 nm, and a length of about 30 nm and 500 nm. Other geometries that may be produced are described herein including in the Detailed Description.
[0020] In one method, a metal nanoparticle coated substrate is used to make nanostructures on the substrate surface by reacting at least a portion of the metal nanoparticles with the substrate. The metal nanoparticles and substrates that may be used are as described herein, including in the Detailed Description. The metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
[0021] Under certain conditions that are described in more detail in the Detailed
Description, the methods described herein produce nanowires that are made of atoms from the substrate. In one method of producing such nanowires, at least a portion of the nanoparticle coated substrate is maintained in a reaction temperature range of between about 1000°C and about 1200°C for the reaction time, and for at least a portion of the reaction time the nanoparticle coated substrate is heated in the presence of a reducing material. In one method of making nanowires, the reducing material is a hydrogenating material. In one method of making nanowires, the reducing material is hydrogen. The substrates, metal nanoparticles and metal nanoparticle compositions that may be used in producing nanowires are generally the same as described above for producing nanostructures. Specific substrates and nanoparticles that may be used are described herein, including in the Detailed Description. In one method, a metal nanoparticle coated substrate is used to make nanowires on the substrate surface by reacting the metal nanoparticles with the substrate in the presence of a reducing material. The metal nanoparticles , substrates, and reducing material that may be used are as described herein, including in the Detailed Description. The metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
[0022] Generally, nanowires of any geometry capable of being made by the methods described herein may be produced. In one, method of producing nanowires, nanowires are produced having a width of between about 2 nm and about 50 nm, and a length of between about 10 to about 10 nm. Other geometries are described herein including in the Detailed Description.
[0023] In one particular method described herein, cobalt silicides nanostructures are produced on a silicon substrate by maintaining at least a portion of a silicon substrate coated with cobalt nanoparticles in a reaction temperature range of between about 800°C and about 1000°C for a reaction time. The method may optionally include the step of heating at least a portion of the silicon substrate coated with cobalt nanoparticles in a heating temperature range of between about 800°C and about 1000°C prior to maintaining in the reaction temperature range. The nanostructures produced may generally be of any morphology. In one method described herein, the nanostructures are crystalline or substantially crystalline CoSi . The nanoparticles may optionally include added carbon or oxygen impurities. The silicon substrate coated with cobalt nanoparticles may be made in a variety of ways, including contacting a silicon substrate with a composition of cobalt nanoparticles to give the nanoparticle coated substrate. Various characteristics of the composition of cobalt nanoparticles that may be used are described elsewhere herein, including in the Detailed Description. In one version of the methods described in this paragraph, the reaction time is about 2 hours or less. In one method, the nanoparticles are approximately spherical and have a diameter between about 2 nm and about 15 nm. In another method, the nanoparticles used have a diameter between about 2 nm and about 5 nm. In another method, the nanoparticles used have a diameter between about 8 nm and about 14 nm. Other characteristics of the cobalt nanoparticles that may be used are described elsewhere herein, including in the Detailed Description. In one method, the density of nanoparticles on the nanoparticle coated substrate is between about 109 and about 1012 nanoparticles per square centimeter. Methods described in this paragraph can be used to make cobalt silicide nanostructures with a depth of between about 1 nm and about 50 nm; a width of between about 1 nm and about 50 nm; and a length of between about 30 nm and 10,000 nm. Other geometries may also be made as are described herein, including in the Detailed Description. In one method, a cobalt nanoparticle coated silicon substrate is used to make cobalt silicide nanostructures on the silicon substrate surface by reacting at least a portion of the cobalt nanoparticles with the silicon substrate. The cobalt nanoparticles and silicon substrate that may be used are as described herein, including in the Detailed Description. The cobalt nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
[0024] In another particular method described herein, silicon nanowires are produced on a silicon substrate by maintaining at least a portion of a silicon substrate coated with metal nanoparticle in a reaction temperature range of between about 1000°C and about 1200°C for a reaction time. The method optionally includes the step of heating at least a portion of the silicon substrate coated with metal nanoparticle in a heating temperature range of between about 1000 C and about 1200 C prior to maintaining in the reaction temperature range. In this method, the nanoparticle coated substrate is maintained in the reaction temperature range of between 1000°C and about 1200°C in the presence of a reducing material for at least a portion of the reaction time. The silicon substrate coated with cobalt nanoparticles may be made in a variety of ways, including contacting a silicon substrate with a composition of cobalt nanoparticles to give the nanoparticle coated substrate. Various characteristics of the composition of cobalt nanoparticles that may be used are described elsewhere herein, including in the Detailed Description. Generally, any reducing materials capable of making the nanowires may be used. In one method, the reducing material is a hydrogenating material. Carbon monoxide may also be used. In one method, the reducing material is hydrogen gas. Generally, any metal nanoparticles may be used that capable of making the nanowires using the methods described in herein. In one method, the nanoparticles are made of a metal or alloy selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing. In one method, cobalt nanoparticles are used. Generally, nanoparticles of any geometry may be used that are capable of making the nanowires using the methods described herein. In one method, the nanoparticles are approximately spherical and have a diameter between about 1 nm and about 100 nm. In another method, the nanoparticles have a diameter equal to or less than about 10 nm. Generally, the geometry and morphology of the silicon nanowires produced is any geometry and morphology capable of being produced using the methods described herein. In one method, the silicon nanowires produced have a width of between about 2 nm and about 50 nm and a length of between about 10 to about 10 nm. In one method, the silicon nanowires are substantially amorphous. In one method of making the silicon nanowires, the density of nanoparticles on the metal nanoparticle coated substrate is between about 109 and about 10 nanoparticles per square centimeter. In one method, a metal nanoparticle coated silicon substrate is used to make silicon nanowires on the substrate surface by reacting the metal nanoparticles with the silicon substrate in the presence of a reducing material. The metal nanoparticles , substrate characteristics, and reducing material that may be used are as described herein, including in the Detailed Description. The metal nanoparticles may be caused to react with the silicon substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description. [0025] Another method described herein is a method for producing nanogrooves by producing nanostructures on a substrate and contacting the nanostructures with an etching composition capable of preferentially removing nanostructure material as compared to removal of substrate material. The nanostructures can be produced using any method capable of making the nanostructures including any method described herein. In one particular method for making nanogrooves, the nanostructures are made of cobalt silicide and are etched using hydrogen fluoride.
[0026] Another method described herein is a method of making a silane composition by heating at least a portion of a metal nanoparticle coated silicon substrate in a reaction temperature range of between about 1000 Celsius and about 1200 Celsius in the presence of hydrogen. One silane composition that can be produced using this method is a monosilane, i.e., SiEU, composition. In one method of making the silane composition, the nanoparticles are made of a metal or alloy selected from, Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing. In one method, cobalt nanoparticles are used. Generally, nanoparticles of any geometry may be used that are capable of making the silane composition using the methods described herein. In one method, the nanoparticles are approximately spherical and have a diameter between about 1 nm and about 100 nm. In another method, the nanoparticles have a diameter equal to or less than about 10 nm. In one method of making the silane composition, the density of nanoparticles on the metal nanoparticle coated substrate is between about 109 and about 1012 nanoparticles per square centimeter. In one method, a metal nanoparticle coated silicon substrate is used to make a silane composition by reacting the metal nanoparticles with the silicon substrate in the presence of hydrogen. The metal nanoparticles, substrate characteristics, and silane compositions that may be used or produced are as described herein, including in the Detailed Description. The metal nanoparticles may be caused to react with the silicon substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein, including in the Detailed Description.
BRIEF DESCRIPTION OF THE FIGURES
[0027] Figure 1(a) shows a TEM image of MNP's; and Figure 1(b) shows a
TEM image of nanostructures.
[0028] Figure 2 (a) shows an AFM image of MNP's and nanostructures; and
Figure 2(b) shows an SEM image of nanostructures.
[0029] Figures 3(a) and 3(b) show TEM images of nanostructures; Figure 3(c) shows the electron diffraction pattern of the material shown in Figure 3(a); Figure 3 (d) shows an angular dependence TEM measurement of nanostructures taken at +33 degree; and Figure 3(e) shows the TEM image of the Figure 3(d) sample taken by rotating 75 degrees along the vertical line.
[0030] Figure 4 shows an EDX of a single nanostructure from an ion milled nanostructures sample.
[0031] Figure 5 shows a photograph of 1/4" x 2" wafers with nanostructures
(left) and nanowires (rights).
[0032] Figures 6(a) and 6(b) show SEM images of silicon nanowires.
[0033] Figure 7(a) shows a TEM image of silicon nanowires, and Figure 7(b) shows the EDX spectrum of the nanowires shown in Figure 7(a).
[0034] Figure 8 shows EXAFS results for nanostructures and nanowires after
Fourier transformation. DETAILED DESCRIPTION
[0035] Described herein are cobalt-silicon and other metal-semiconductor nanostructures and metal alloy-semiconductor nanostructures and methods of making such nanostructures. Also described are nanostructures on other substrates. Also described are nanowires, including but not limited to silicon nanowires, and methods of making such nanowires; and nanogrooves and methods of making such nanogrooves. Also described are methods of making silanes
[0036] As described in more detail below, the nanostructures may be made by heating a nanoparticle covered substrate to produce nanoscale features embedded in the substrate surface where the nanoscale features are made of atoms from the nanoparticles and the substrate. Nanogrooves may be formed by removal of the nanostructure material leaving nanoscale indented features in the substrate surface. Under certain conditions, heating of the nanoparticle covered substrate does not result in nanoscale features embedded in the substrate surface and made of atoms from the nanoparticles and the substrate but instead produces nanowires made of the substrate material. The methods for making nanowires may also be used for making silanes. [0037] The electronic and optical properties of the nanostructures, nanowires, and nanogrooves are expected to make them useful in a variety of electronic and optical nanodevices, including but not limited to chemical sensors, nanoelctronic components such as transistors, as contacts, gates, and interconnects in nanoelectronics and molecular electronics, and quantum devices such as nanometer light emitters and detectors.
[0038] For example it is expected that nanostructure as described herein may be useful for making contacts, interconnects, and gates in nanoelectronics (integrated circuit technology); forming advanced transistors from conductive and semiconductor nanostructures; making sensors and especially high temperature sensors; making nanoscale templates for building other nanostructures; making photoluminescent devices (nanostructures of different sizes may emit light at different wavelengths); making infrared detectors, since there is expected to be a Schottky barrier between silicide nanostructures (e.g. PtSi) and Si substrate; a method of examining crystalline wafers; nanofabrication of high density nanostructures (nanogrooves, nanostructures, and nanowires) of high aspect ratios (depth-to-width, depth-to-length, and width-to- length); making patterned nanostructure catalysts (for example, CoSi2 (s, nanostructures) + H (g) -» Co (s) +SiH4 (g)) and patterned nanostructured photocatalysts (for example, NiSi2 for water splitting); making field emission display panels, for example using smaller (sub- 10 nm) self-aligned nanostructures; and for optical harmonic generation from the nanostructures.
[0039] It is expected that the nanowires produced by the methods described herein may be useful for making infrared detectors, for example it is expected that there will be a Schottky barrier between silicide nanostructures (e.g., PtSi) and a Si substrate; making photoluminescent devices (nanowires of different sizes may emit light at different wavelengths); and making patterned detector and emitter arrays (the location and properties of nanowires depend on the properties and locations of the nanoparticles).
[0040] It is expected that the nanogrooves produced by the methods described herein may be useful as templates for building other nanostructures; and in field emission displays.
[0041] Because the nanostructures described herein have very small dimensions, and some of them (Co silicide, for example) are expected to be highly conductive whereas others (Fe silicide, for example) are expected to be semiconductors, it is expected that different devices such as transistors and chemical sensors can be made from the nanostructures. Certain of the nanostructures have a large amount of surface atoms along the exposed edge (about 10 to about 30% of the total number of atoms in the nanostructure for 3 nm wide nanostructures) and this may make the nanostructures particularly suitable for chemical sensors. The nanostructures may also be suitable as contacts, gates, and interconnectors in future nanoelectronics. By positioning on the substrate in a specific pattern the nanoparticles used to make the nanostructures (see description of method of making in section below), it is expected that one can control the construction of nanostructures and thus control fabrication of nanodevices.
[0042] Certain of the nanostructures described herein are referred to as "self- aligned nanostructures," for which the acronym "SAN's" is used. SAN's are also referred to as SNS's and unless the context makes clear otherwise these two acronyms are used interchangeably. Specific nanostructures are referred to as "Co-Si or metal- semiconductor self aligned nanostructures" or "Co-Si or metal-semiconductor SAN's," or simply as "SAN's." None of these terms are intended to be limiting on the general description of nanostructures as described herein, which are generally described in the section below titled "Nanostructure Composition, Morphology, Dimensions, andAreal Density on Substrate. "
[0043] In the Examples section below, are presented results for specific examples of the nanostructures and nanowires described herein and specific methods of making such nanostructures. First, however, are described the different general methods of making the nanostructures, different compositions from which the nanostructures may be made, different substrates upon which the nanostructures may be made, different dimensions of the nanostructures, and specific starting materials that may be used in the making of the nanostructures. Also described are nanowires, and methods of making such nanowires; and nanogrooves, and methods of making nanogrooves.
METHODS OF MAKING NANOSTRUCTURES
[0044] Generally the nanostructures may be made by heating a metal nanoparticle coated substrate for a reaction time at a reaction temperature or range of reaction temperatures. As described below, the MNP's may be made of pure metals, but may also be made of metals with dopants and may be made of metal alloys. If the nanostructures are required to be used at a temperature other than the temperature at which they are made, the method will also include a step of heating or cooling the nanostructures to the temperature at which they will be used. The metal nanoparticle coated substrate may generally be prepared by any method capable of preparing the coated substrate, including contacting the substrate with a composition containing the metal nanoparticles. Additional steps may optionally be included in the method of making the nanostructures, including but not limited to preparing the substrate for contacting with the MNP's, positioning the MNP's on the substrate once they have been contacted with the substrate, and cleaning and drying the MNP-substrate system before the heating step.
Metal Nanoparticles (MNP's) [0045] The metal nanoparticles used for making the nanostructures may generally be made of any metal and may include additional components in addition to the metal. Metals that may be used include but are not limited to Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au. Other MNP that may be used in the compositions and methods described herein are MNP's made from alloys of two or more metals, including but not limited to alloys made from mixtures of two or more metals selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au. The composition of the MNP's may be used to control lattice mismatch between the nanostructures and the substrate, which it is believed in turn may control the length of the nanostructures. [0046] In addition to the metal or alloy component in the MNP, the MNP may contain additional components including but not limited to impurities that do not substantially change any of the relevant properties of the MNP or resulting nanostructures, and other impurities specifically added to alter the properties of the nanostructures or alter the conditions under which the nanostructures may be made. Such added impurities include but are not limited to carbon and oxygen impurities. [0047] The MNP's may generally be of any size, shape, and morphology that will allow fabrication of the nanostructures. The shape and size of the MNP's used may be but are not limited to approximately spherical MNP with a diameter of between about lnm to about 100 nm. In one method of making nanostructures, MNP's with a diameter of less than about lOnm are used. The MNP may be made using any method known in the art including the methods described in the Examples section. Specific sizes of MNP's that may be used include MNP's with a diameter of between about 3 and about 7nm and MNP's with a diameter of between about 8 and about 16nm. It is expected that the yield of nanostructures will decrease as the size of MNP's increases and initial results suggest that use of MNP's with diameters of less than about 5nm yield growth of nanostructures at the highest yield. The size of MNP' s that may be used is not limited to those with diameters less than about 5nm. [0048] It has been discovered that it is possible to control the size of the nanostructures and areal density of the nanostructures on the substrate by controlling the size of the MNP's used in producing the nanostructures. In some applications it may therefore be advantageous to use MNP's that are all of substantially the same size or a mixture of MNP's with defined size distribution. Populations of MNP's that may be used include but are not limited to a population of MNP's in which the average diameter of a MNP in the population is between about lnm and about 5nm and the standard deviation in the diameter of the MNP's in the population is between about 10% and 20% of the average diameter or a population of MNP's in which the average diameter of a MNP in the population is between about 8nm and about 16nm and the standard deviation in the diameter of the MNP's in the population is between about 10% and 20% by length. By way of illustration only and in no way limiting, if the average diameter is 5nm a standard deviation of 10%-20% of the average diameter could be a standard deviation of 0.5nm-lnm.
[0049] When the MNP's are Co, the MNP's may be approximately spherical and may have a diameter of between about lnm and about 20nm. In one method of making the nanostructures, Co MNP's with a diameter of between about 2 nm and about 15nm are used. In another method of making the nanostructures, Co MNP' s with diameters of between about 2nm to about 5nm or between about 8nm to about 14nm are used. The size of the MNP's may be used to control the dimension of the nanostructures.
Substrates [0050] Generally any substrate capable of reacting with the MNP's to produce the nanostructures may be used, including but not limited to semiconductor substrates, which include but are not limited to Si, Ge, GaAs, or substrates with an expitaxial grown layer of other elements, including but not limited to Ti. Generally the substrate may be of any morphology that is capable of reacting with the MNP's to produce the nanostructures, including but not limited to crystalline surfaces and locally crystalline surfaces. If the substrate is crystalline or locally crystalline, the crystal surface may be any crystal surface.
[0051] Generally the substrate may be a pure or substantially pure substrate or may be doped with specific dopants that may affect the properties, including but not limited to the electronic and optical properties, of the substrate. By substantially pure, is meant that the substrate may contain accidental impurities but that these were not specifically added and do not substantially change the properties of the substrate. When the substrate is a semiconductor substrate, the substrate may be doped with N or P type dopants, including but not limited to B, P, and N. [0052] In one method of making nanostructures with a Si substrate, the substrate is crystalline or at least locally crystalline. In such case the surface may generally have any crystal plane, including but not limited to the (100) or the (111) plane. When the substrate is Si, the substrate may be pure Si, substantially pure Si, or may be Si doped with dopants, including but not limited to B, P, and N. When the substrate is Si, the substrate may be prepared by any method that may be used to prepare Si substrate surfaces, including but not limited to typical Cz crystal growth method such as that used by Virginia Semiconductor and polished by mechanical and electrochemical methods.
Condition* for Preparing Substrate for Contacting with MNP's [0053] When the metal nanoparticle coated substrate is prepared by contacting the substrate with a metal nanoparticle composition, the substrate may optionally be prepared before contacting with the composition. Generally the substrate may be prepared for contacting with the MNP's using any method capable of preparing the substrate, including but not limited to standard mechanical and then electrochemical polishing of Si bulk crystals. In addition a pristine surface may be used without being specifically prepared for contacting with the MNP's. Surface contamination may be removed using the method described in the Examples. In one version the substrate is cleaned to remove surface contaminants before the MNP's are contacted with the substrate. For example, when the substrate is Si the substrate may be cleaned by various methods including but not limited to immersing in Piranha solution for 10 minutes, washing with deionized water and toluene (99%), and drying in Ar gas.
Conditions for Contacting MNP's with Substrate and Positioning MNP's on Surface [0054] When the metal nanoparticle coated substrate is prepared by contacting the substrate with a metal nanoparticle composition, the MNP composition may generally be contacted with the substrate by any method capable of contacting the MNP composition with the substrate, including but not limited to contacting the substrate with a solution containing the MNP's and sonicating the substrate-MNP system. Other methods such as micro-printing techniques and patterning using AFM, STM, and CFM may be used for depositing MNP's on the substrate. When the MNP's are contacted with the substrate in a solution, the concentration of MNP's in the solution may be any concentration that yields the required areal density of nanostructures on the substrate, including but not limited to concentrations of between about 10 and about 10 MNP's/cm2. Solvents that may be used are any solvent capable of containing the
MNP's and depositing the MNP's on the substrate, including but not limited to dichlorobenzene and toluene.
[0055] Once the MNP's are contacted with the substrate the MNP-substrate system may be washed and dried.
[0056] Once the MNP's are contacted with the substrate it may for certain applications be desirable to position the MNP's on the substrate. In this case, the
MNP's may generally be positioned using any method capable of positioning the
MNP's, including but not limited to use of atomic force microscopes, scanning tunneling microscopes, chemical force microscopes, and micro-printing.
Conditions for Reacting MNP's with Substrate [0057] Once the metal nanoparticle coated substrate has been produced, which may be by contacting the MNP composition with the substrate and subsequent optionally positioning of the MNP's on the substrate if required, the MNP's are reacted with the substrate. In one method, the MNP's are reacted with the substrate by heating the MNP-substrate system for a time and at a temperature or range of temperatures sufficient to produce the nanostructures. In one method, a metal nanoparticle coated substrate is used to make nanostructures on the substrate surface by reacting the metal nanoparticles with the substrate. The metal nanoparticles and substrates that may be used are as described herein. The metal nanoparticles may be caused to react with the substrate using any method capable of causing the reaction, including but not limited to the heating methods described herein.
[0058] Heating regimes that may be used include but are not limited to heating the system from its initial temperature (usually room temperature) at a heating temperature or heating temperature range and then maintaining the system at a reaction temperature or in a reaction temperature range for a reaction time. Generally, any reaction time, heating temperature range, and reaction temperature ranges may be used that are capable of producing the nanostructures. In one method the reaction time is between about 1 second and about 2 hours. In one method the reaction temperature range is between about 800°C and about 1200°C. In one method the reaction temperature range is between about 800°C and about 1000°C. In one method the reaction temperature range is between about 1000°C and about 1200°C. In one method the reaction temperature range is between about 700°C and about 1300°C. In one method the reaction temperature range is between about 600°C and about 1400°C. In one method the reaction temperature range is between about 500°C and about 1500°C. In one method the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. In one method the heating temperature range is between about 800°C and about 1000°C, and the reaction temperature range is between about 800°C and about 1000°C. In one method the heating temperature range is between about 1000°C and about 1200°C, and the reaction temperature range is between about 1000°C and about 1200°C. In one method the heating temperature range is between about 700°C and about 1300°C, and the reaction temperature range is between about 700°C and about 1300°C. In one method the heating temperature range is between about 600°C and about 1400°C, and the reaction temperature range is between about 600°C and about 1400°C. In one method the heating temperature range is between about 500°C and about 1500°C, and the reaction temperature range is between about 500°C and about 1500°C. As used herein "heating in a heating temperature range" or "heating in a reaction temperature range" means that the system being heated is maintained for some amount of time in an environment that is at a single temperature or at a number of different temperatures all of which fall within the specified heating or reaction temperature range. By way of example only and in no way limiting, a system placed in a furnace at 900° for two hours would fall within the definition of "being heated in a reaction temperature range of between about 800°C and about 1000°C for a reaction time of about 2 hours." Similarly, a system placed in a furnace at 900°C for one hour and at 950°C for the subsequent hour would likewise fall within the definition. Both the range of temperatures and the length of time for which the reaction temperature is maintained may be used for controlling the length of the nanostructures. The heating and reaction steps may be two separate steps or may be combined into one step, in which case the system is maintained in a reaction temperature range for a reaction time sufficient to heat the system and subsequently cause the system to react, thereby producing the nanostructures. In addition, it is expected that the size and the composition of the MNP's may also be used for controlling the dimensions of the nanostructures, including the length of the nanostructures. Without being bound by theory, it is noted that the melting temperature of small MNP's is strongly dependent on the size of the MNP~the smaller the MNP's, the lower the melting temperature~and it may be expected therefore that the narrow nanostructures will grow first from small MNP's, followed by nanostructures formed from the bigger MNP's. Heating can be done using any method capable of producing the desired heating including but not limited to large area heating such as placing the whole substrate in a high temperature furnace, or via localized heating such as employing focused laser beams to raise temperature at desired locations. Generally, any method capable of maintaining the system or any portion of the system in a reaction temperature range for the reaction time may be used for causing the reaction step.
[0059] The temperature ranges in which the system is heated and reacted depends on the specific MNP's and substrate used and can be easily determined by conducted a number of runs with different heating and reaction temperature ranges and analyzing the nanostructures produced. For example, in one method using the Co-Si system, the reaction temperature range is between about 800 Celsius and about 1000 Celsius. In another method, the reaction temperature is about 900 Celsius.
NANOSTRUCTURE COMPOSITION, MORPHOLOGY, DIMENSIONS, AND AREAL DENSITY ON SUBSTRATE.
[0060] Generally the nanostructures described herein may be made of a metal or a metal alloy and a semiconductor material and may optionally include additional components. In one version of the structures described herein, the nanostructures are pure or substantially pure. By substantially pure, is meant that the nanostructures may contain impurities that do not substantially effect the properties of the nanostructures and which were not purposefully placed in the nanostructures. Additional components that may be present in the nanostructures may be those additional components added to the MNP's or those additional components added to the substrate. For example, if a semiconductor substrate included an N-type dopant, the resulting nanostructures may contain the N-type dopant. The nanostructures may contain other doped impurities, and may generally contain any impurities for which the lattice distortion is small enough to maintain expitaxial growth. In addition, it may be possible to incorporate dopants into the nanostructure by adding them as an additional component to the substrate-MNP system rather than have the dopant incorporated in the MNP or substrate. [0061] Generally, the nanostructures may be of any stoichiometry allowed under the kinetic and fherrnodynamic conditions under which the nanostructures were formed, and generally the nanostructures may be of any morphology allowed under the kinetic and thermodynamic conditions under which the nanostructures were formed. Nanostructures that are crystalline or semi-crystalline in nature may be used. It may be possible to make amorphous nanostructures by making crystalline nanostructures and then converting them into amorphous nanostructures. It is expected that amorphous nanostructures will have interesting electronic and optical properties. [0062] In one method when the substrate is Si and the MNP's are Co, the composition of the resulting nanostructures is pure or substantially pure, crystalline CoSi2. Grazing incidence extended x-ray absorption fine structure spectroscopy can be used to verify UIQ structure. Specific dopants that may be incorporated in the CoSi2 nanostructures include but are not limited to C and O. [0063] When present on the substrate, the nanostructures may be of approximately rectangular cross-section. The top of the nanostructures are generally slightly extended above the substrate surface, and may also be flush or substantially flush with the substrate surface and the nanostructure projects into the substrate for a depth of between about lnm and about 50nm. Described herein are nanostructures with a depth of between about 15 nm and about 25 nm. It is expected that it will be possible to control the depth of the nanostructures produced on the substrate by any method capable of controlling the depth including but not limited to controlling the density and size of the MNPs deposited on the substrate and the adhesion force between MNPs and substrate surface. It is expected that control of the adhesion force between the MNP's and the substrate surface can be achieved by modifying the surface with various modification groups including but not limited to various nucleophile terminated (amine) silanes.
[0064] The nanostructures may generally have a width of between about lnm and about 50nm, and more particularly may have a width between about 2nm to about 20nm. Described herein are nanostructures with a width of between about 3 nm and about 5 nm. It has been found that it is possible to control the width of the nanostructures produced on the substrate by controlling the size and composition of the MNP' s. Without being bound by theory, is believed that the size of the MNP' s determines the melting temperature of the MNP's and their mobility on surface and this in turn controls the width of the nanostructures.
[0065] The nanostructures may generally have a length of between about lOnm and about 10,000nm; and more particularly, the nanostructures may have a length of between about 30nm and about 500 nm. Described herein are nanostructures with a length of between about 65 nm and about 90 nm. It has been found that it is possible to control the length of the nanostructures produced on the substrate by controlling the location of known density and size of uniformly sized MNP's. It may also be possible to control the length of the nanostructures by varying the range of reaction temperatures at which the nanostructures are made, by varying the reaction time, and by varying the composition of the MNP's used to make the nanostructures. [0066] In one version when the nanostructures are made of CoSi2, the nanostructures have a depth of between about lnm and about 50nm, a width of between about 1 nm and about 50 nm, and a length of about 30nm and about 10,000nm. [0067] The nanostructures may generally be produced on a substrate with any areal density. It is expected that it is possible to control the areal density of the nanostructures by various methods including but not limited to the dilution of the MNP's stocking solution, the deposition time, and the chemical structure of any surfactants or other chemical modification groups on the MNP's and any surfactants or other chemical modification groups on the substrate.
NANOSTRUCTURE ELECTRONIC AND OPTICAL PROPERTIES
[0068] In light of the known bulk electronic properties of CoSi2, it is believed that CoSi2 nanostructures will have substantially conducting electronic properties, whereas it is believed that iron silicide (β-FeSi ) will likely have semiconducting electronic properties; although the electronic properties of the nanostructures may be modified from the bulk properties by quantum confinement effects.
NANOWIRES Methods of Making Nanowires & Description of Nanowires [0069] It has also been discovered that it is possible to make Si nanowires using methods similar to those described above for making nanostructures. In methods for making nanowires, the metal nanoparticle coated substrate is maintained in the reaction temperature range for a reaction time and for at least a portion of the reaction time the reaction is carried out in the presence of a reducing material. It is expected that nanowires made of other materials may be made in a similar manner to the Si nanowires. For example, if Co MNP's are used in the above described methods for making nanostructures and the heating temperature is about 1100 degrees Celsius, Si nanowires have been made without the use of methane. The dimensions of the Si nanowires made under these conditions are between about 5nm and about 20 nm in diameter and depending on the reaction time and other exact reaction conditions are expected to be from about microns to about millimeters in length. Experiments have yielded high yield of Si nanowires. The nanowires may generally have any morphology. In one version, the nanowires have an amorphous morphology. The nanowire may also be coated with surface groups, for example Si nanowires may be covered with SiO2.
[0070] Generally, it is believed that nanowires with diameters from about 2nm to about 50nm may be grown. It is believed that the diameter of the nanowires may be controlled by the size and composition of the MNP's, the growth temperature, the pressure of the back-filled gases, and crystallinity of the substrate. The nanowires can be approximately straight (radius of curvature larger than several hundred nanometers) or may be coiled (radius of curvature smaller than 200 nm). [0071] Generally, it is believed that by following the methods described for production of nanostructures and using different substrates, it may be possible to grow nanowires made of any material from which the substrate is made. [0072] The temperature ranges in which the system is heated and reacted to produce the nanowires is expected to depend on the specific MNP's and substrate used and can be easily determined by conducted a number or runs with different temperature ranges and analyzing the nanowires produced. For example, in one method for producing Si nanowires from the Co-Si system, the heating and reaction temperature ranges are between about 1000 Celsius and about 1200 Celsius. In another method for producing Si nanowires from the Co-Si system, the reaction temperature range is between about 1000 Celsius and about 1200 Celsius. In another method for producing Si nanowires from the Co-Si system, the reaction temperature is about 1100 Celsius. Other reaction temperature ranges and heating temperature ranges that may be used for making nanowires from the Co-Si and other metal nanoparticle coated substrate systems are as follows. Generally, any reaction time, heating temperature range, and reaction temperature ranges may be used that are capable of producing the nanowires. In one method the reaction time is between about 1 second and about 2 hours. In one method the reaction temperature range is between about 800°C and about 1200°C. In one method the reaction temperature range is between about 1000°C and about 1200°C. In one method the reaction temperature range is between about 700°C and about 1300°C. In one method the reaction temperature range is between about 600°C and about 1400 C. In one method the reaction temperature range is between about 500 C and about 1500°C. In one method the heating temperature range is between about 800°C and about 1200°C, and the reaction temperature range is between about 800°C and about 1200°C. In one method the heating temperature range is between about 1000°C and about 1200°C, and the reaction temperature range is between about 1000°C and about 1200°C. In one method the heating temperature range is between about 700°C and about 1300°C, and the reaction temperature range is between about 700°C and about 1300°C. In one method the heating temperature range is between about 600°C and about 1400°C, and the reaction temperature range is between about 600°C and about 1400°C. In one method the heating temperature range is between about 500°C and about 1500°C, and the reaction temperature range is between about 500°C and about 1500°C.
[0073] When producing nanowires the reaction is carried out in the presence of a reducing material. The step heating the nanoparticle coated substrate may or may not be carried out in the presence of a reducing material, or may be carried out for some of the reaction time in the presence of a reducing material. The nanoparticle coated substrate is maintained for some reaction time in the range of reaction temperatures and for at least some of the reaction time the reaction is carried out in the presence of a reducing material.
[0074] Reducing materials that may be used include but are not limited to hydrogenating materials, including but not limited to hydrogen gas. Other reducing materials that may be used include but are not limited to CO. The reaction may also optionally be carried out in the presence of a buffer gas. Buffer gasses that may be use include but are not limited to Ar gas. Without being bound by theory, it is speculated that when the reducing medium is a hydrogenating material, the reaction of the reducing medium with metal silicide nanostructures produces metal and silanes
(hydrosilicons).
[0075] Without being bound by theory, it is believed that nanostructures are formed during the nanowire preparation and the nanostructures may behave as precursors in the growth of nanowires.
[0076] Nanowires produced by the methods described here may be used in a variety of applications as is known in the art, including but not limited to sensors (for example, after the nanowires are functionalized with different acceptors), light emitters and absorbers (tunable when the nanowires are doped with other elements such as B and P), nanocantilevers, and composite materials.
[0077] Without being bound by theory, it is believed that in forming nanowires the nanostructures may be used as catalysts to convert H2 (gas) and Co silicide into silanes (gas at high temperatures (>500 degrees Celsius) and Co metal, which may react with Si further to produce Co silicide again. Therefore, the nanostructures may be acting as catalysts. With silanes, Co alone can catalyze the growth of Si nanowires. It is believed that it may be possible to use nanostructures as catalysts for other applications such as in Fisher-Tropsch reactions that convert H2 (gas) and CO (gas) into hydrocarbons in fuel related applications.
[0078] Because it is believed that the properties of the nanowires produced depend on the material and size characteristics of the metal nanoparticles used, it may be possible to grow different nanowires on the same substrate by using metal nanoparticles with different characteristics (diameter, composition, and density) on the same substrate.
[0079] When the substrate is silicon and the reducing material is hydrogen gas, the method described herein for making nanowires may also be used as a method for making silanes. Described herein is therefore a method for making silanes, in which a metal nanoparticle coated silicon substrate is heated in a temperature range of between about 1000 Celsius and about 1200 Celsius in the presence of hydrogen, thus producing a composition comprising one or more silanes. In one method of producing silanes, the composition produced comprises monosilane, i.e., SiH4. NANOGROOVES Methods of Making Nanogrooves & Description of Nanogrooves [0080] It has also been discovered that it is possible to make nanogrooves using the nanostructures described above. For example, it has been found that by etching CoSi2 nanostructures present in a Si substrate with HF it is possible to produce silicon nanogrooves. The geometry and pattern of the nanogrooves will be substantially ύie same as the geometry and pattern of the nanostructures. For example, etching nanostructures as shown in Figure lb or 2b will produce a nanometer sized "tread- deck' like pattern of Si nanogrooves.
[0081] It is expected that it will be possible to use the nanogrooves described here as templates to make other materials such as magnetic nanorods via coating or deposition of metals.
[0082] Generally, it is expected that nanogrooves may be produced in any substrate in which nanostructures may be made. For example, it is expected that nanogrooves may be made in all substrates listed in the nanostructure section above. [0083] Generally, it is expected that nanogrooves may be made by treating a nanostructure containing substrate with a composition capable of preferentially removing some or all of the nanostructure material from the substrate as compared to removal of the substrate material itself. Generally, it is expected that this nanogroove producing method may be used for on any of the nanostructure-substrate systems described in the nanostructure section above. Examples of chemicals that may be used to preferentially remove the nanostructure material include but are not limited to HF. In addition, it is believed that other etching methods such as plasma etching commonly used in the semiconductor industry can make evenly etched nanogrooves from the nanostructures described herein by better controlling the rate of etching. [0084] Generally, it is expected that the nanogrooves will have geometry similar to that of the nanostructures from which they are produced. However, it is expected that it will be possible to control the depth of a nanogroove by controlling the amount of time for which the nanostructure-substrate system is exposed to the nanostructure removing composition. It is expected to be possible, therefore, to produce nanogrooves with depths from Onm up to a depth approximately equal to the depth of the nanostructure from which the nanogroove is produced. The nanogrooves are expected to have widths and lengths in the ranges and geometries described for the nanostructure systems, and to have depths from about Onm to about the depth of the nanostructure from which the are produced.
[0085] It is possible to use the nanogrooves so produced to inspect nanostructures on Si wafers. Since the nanostructures can be used substrate dependent, the method presented here can be used to examine the quality of the Si wafers, especially their surface quality and composition. For example, since the formation of the nanostructures depend on various characteristics of the Si substrate, and nanogrooves are easy to see under an SEM, the formation of nanogrooves can be used to examine the substrate, particularly the crystallinity of the substrate, whether the substrate has too much of a SiO2 layer, or whether the crystallinity of the substrate is weak.
EXAMPLE 1 Cobalt Silicide Nanostructures on Si Substrates
[0086] The following is an example that has been carried out of the sysnthesis of various nanostructures.
[0087] A new type of material, exemplified by the formation of 3 nm wide, self-aligned cobalt silicide (CoSi2) nanosutructures that can be used as contacts, interconnects, and gates in future nanoelectronics and devices, is synthesized by reactions of Co metal nanoparticles with Si substrates. [0088] Described herein is the synthesis of a new type of material, the formation of 3 nm wide, self-aligned cobalt silicide (CoSi2) nanostructures from reactions of Co metal nanoparticles deposited on Si substrates at 900°C. The length of these self-aligned silicide varies from 50 nm to a few microns, and their orientation is determined by the crystalline substrate as they form orthorgonally and hexagonally aligned nanostructures on Si (100) and Si (111), respectively. These nanostructures are thermally stable up to 1000°C in air, and are chemically inert to prolonged treatment with strong acids. These nanostructures can be used to build contacts, interconnects, gates, transistors, and other nanoscale components that are critical to building nanoscale electronic devices and sensors.
[0089] One dimensional crystalline materials such as nanowires, including those made of ZnO, GaN, InP, and Si, and carbon nanotubes have been the focus of many studies in the last decade. (1, 2, 3) Challenges arise not only from making those novel materials, but also from manipulating them once they are made. It is thus advantageous to be able to directly grow desired nanostructures on suitable substrates for device fabrication. Such methods are usually called a bottom-up approach. Lithography, which is a top-down approach, can also make nanostructures if crystalline thin films are available. (4, 5, 6) For example, sub-micron cobalt silicide structures have been made using the top-down method. These structures have been studied for use as contacts, gates, and interconnects in future nanoelectronics because they are thermally and chemically stable and are an excellent conductor. (6, 7) However, the dimension of the structures so fabricated using the top-down approach cannot yet compete with the premade nanostructures mentioned above.
[0090] Descibed herein is a chemical method to synthesize a new type of CoSi2 nanostructure with the bottom-up approach. They are uniform cobalt silicide crystalline nanostructures aligned on Si wafers. Described herein is how to make the metal nanoparticle (MNP) catalysts and the synthesis of the nanostructures. [0091] Co metal nanoparticles were made following the available procedure. (8)
0.54 g of Co (CO)8 was dissolved in 3 mL of oxygen-free anhydrous dichlorobenzene (DCB) in a dry box. The solution was then injected into a surfactant mixture, including oleic acid (OA), trioctylphosphine oxide (TOPO), and trioctylamine (TO A), at a temperature slightly above the boiling point of DCB under Ar. After several minutes, portions of the solution were withdrawn from the reaction flask and placed in Ar-filled vials. Depending on the ratios of the surfactants, different sized Co nanoparticles were made, and their sizes were verified by transmission electron microscopy (TEM). [0092] Figure la shows a TEM image of MNP under a condition that favors the growth of 12-nm MNP. Smaller nanoparticles are also present. The large ones have an average diameter of 12 ± 1.2 nm and the small ones 4.4 ± 0.5 nm. [0093] Deposition of the nanoparticles on Si substrates was carried out in air. A solution containing MNP was diluted (from 10:1 to 100:1) in DCB in the dry box, and clean Si substrates were immersed in the diluted solution for several minutes under sonication. The Si substrates were cleaned in Piranha solution (4:1 H2O2 (30% in water) and H2SO4 (cone)) for 10 minutes before deposition, and deionized water and DCB were used to wash the deposited substrates. Undoped (100) and (111), and highly B- and P-doped (100) substrates were used. [0094] The MNP coated Si substrates were placed in a high temperature tube furnace (Lindburg/Mini-Mite™) for the nanostructure synthesis. Ar, H and CH4 gases
Were used. Growth time varied from less than 1 sec to 2 hours. After the growth, the furnace was cooled to room temperature, and samples were examined with TEM, scanning electron microscopy (SEM), and atomic force microscopy (AFM).
[0095] Figure lb shows an SEM image of a typical nanostructure sample. To prepare this sample, diluted (100:1 in DCB) 5-nm Co nanoparticle solution and undoped Si (100) were used. The growth temperature was 1000 °C. Two lengths of nanostructure are visible: the medium (200 ± 20 nm) and short (85 ± 12 nm) nanostructure. Based on the SEM measurements, the width of the nanostructure is less than 6 nm. A few isolated and aggregated Co nanoparticles are also visible. None of the nanostructure have metal catalysts attached to their ends.
[0096] Figure 2a shows the AFM (tapping mode) image of a sample produced under similar conditions. Again, nanostructures of two general lengths are observed.
The long nanostructure have an average length of 167 ± 32 nm, and the short ones are
37 ± 2.0 nm. A single wall carbon nanotube (SWNT) is also visible, running across the whole sample. The heights of the nanostructure and the SWNTs, visible in this picture, are 3 ± 0.5 nm and 1.4 nm, respectively.
[0097] A few long nanostructures, up to 8 μm in length, with MNP attached were also observed. These long nanostructures have a similar morphology as those observed by Liu and colleagues. (9)
[0098] Under optimized conditions, more uniform nanostructure were made.
Figure 2b shows nanostructures made using 12-nm MNP at 900°C. These nanostructures in this sample have an average length of 78 ± 11 nm. The density is 20 nanostructures/μm2, the highest produced to date.
[0099] Both N- and P-doped Si (100) substrates were used; and the yields of nanostructures were similar. Nanostructures were found aligned on either (111) or
(100) surfaces. On the (111) surface, they are hexagonally aligned, forming either a 60 degree or 120 degree angle between the nanostructures.
[0100] Those nanostructures were treated in air at temperatures up to 1100°C.
They were stable up to 1000°C in air for over 2 hours.
[0101] Micro Raman spectroscopy using 785 nm light was performed, and a peak at 1600 cm"1 (G band) was often observed. However, this signal could come from the SWNTs present in the sample as shown in Figure 2. No signal from SiC was observed as no peaks at around 800 cm"1 were present.
[0102] TEM was used to examine the structure of the nanostructures. Standard dimpling and ion milling techniques were employed. A high resolution TEM image is shown in Figure 3a. Both the substrate and the nanostructures have clearly resolved lattice fringes, and both fringes have an -3.8 A spacing. The surface normal to Si (100) in this figure is not parallel to the e-beam. Figure 3b shows the two parallel nanostructures, showing they are perfectly aligned. Figure 3c shows the diffraction pattern of the area shown in Figure 3a agree with that from the α-Si fee structure (a=5.428 A) along the 110 zone axis. The 3.8 A spacing between the fringes observed in Figure 3a indicate that it is the (110) plane. No other obvious spots are visible. Thus, the nanostructures are grown along the (110) direction with their edge exposed on Si (100) as shown in Figure 1 - 3. This can be explained by the fact that both (100) and (110) of CoSi2 are a good match to Si (100). (6)
[0103] Angular dependence measurements were carried out on these nanostructures with TEM (Figure 3(d-e)). TEM results from two angles are shown. The image shown in Figure 3d was taken with the sample tilted -30 degrees, rotating around the vertical axis. Some of the nanostructures are narrow, whereas others are broad. The thickness of the narrow nanostructures is 3 nm, the same as that of the nanostructures in Figure 2a. Figure 3e shows an image taken at +45 degree tilt angle. Those same narrow nanostructures become broad and the originally broad ones become narrow. This indicates that the nanostructures have a sheet form with only their edges exposed at the surface. The average cross section of those nanostructures is 20 nm (H) x 3-nm (W). Since the surface normal to the substrate in these two measurements is not parallel to the e-beam, the overall length looks shorter than the real value. Furthermore, the sheet plane of the nanostructures is parallel to Si (110) and not perpendicular to the Si (100), as shown in Figure 3 a.
[0104] The crystalline cobalt silicide CoSi2 (Fm3m) has a lattice constant of
5.365 A, very close to that of Si of 5.428 A (Fm3m), thus giving a -1.17% lattice mismatch at room temperature. (10) Crystalline CoSi2 is normally made at ~900°C, the same temperature as the nanostructures in our case, at which the lattice mismatch decreases to 1.05%. In addition, crystalline CoSi2 is also stable in air at up to 1000°C. Other forms of cobalt silicides do exist. However, Co2Si (Pnma) and CoSi (P2i3) have different structures, and both of them are low temperature phases that are more stable at <500°C. (6) Furthermore, these two phases are less stable than CoSi2 when interacting with Si. (11) Although CoSi2 can also be polycrystalline at high temperatures, the nanostructures observed here are single crystalline. Based on these results, it is concluded that the nanostructures are made of CoSi2.
[0105] Energy dispersive x-ray spectroscopy on these nanostructures also indicates the presence of Co, as shown in Figure 4, which shows that the nanostructures contain Co over its entire dimension. The composition of Co in Si is ~2%. The Si signal includes that from the substrate as well as that from the CoSi2 portion. Because the nature of this expitaxial-like growth of CoSi2 on Si, these nanostructures may contain no or only small amounts of carbon and oxygen.
[0106] Although the morphology of these nanostructures resemble carbon nanotubes when they are characterized only by SEM and AFM, our results have shown that they are crystalline cobalt silicides. The high yield of these silicides indicates that its growth is much more energetically favorable than the formation of SWNT, which may explain why the yield of SWNT is low. Moreover, presented herein is a new approach for synthesizing a new type of nanostructure on silicon and other substrates. This new approach is afforded by a possibly new energetics that governs the reactions of nanoparticles with the substrate that is different from that that controls the reactions between the bulk thin films and the substrate. In the conventional top-down method of making CoSi2 structures, large amounts of Co (e.g., 20 nm thick layer) are deposited on Si wafers to produce single crystalline CoSi2. (6) A two-step reaction is then employed. First, CoSi is made between the Co-Si interface at 500°C. To guarantee aligned growth of CoSi2, extra Co above the interface is chemically removed before the reaction at a higher temperature is carried out. Second, the temperature is raised to ~700 - 900°C to convert CoSi to CoSi2 through Si migration. In our case, due to the limited supply of Co from Co MNP, the mixing of Co with Si may complete quickly, and crystalline CoSi2 is quickly formed when the mixture is treated at 900 °C. It is unclear why but worth noting that although the lattices of CoSi and Si are closely matched, the boundary between the two phases is well defined around the nanostructures. [0107] Since these nanostructures can be directly fabricated on Si wafers, and they are thermally and chemically stable while being potentially conductive, (12) it is possible to make different devices such as chemical sensors, interconnects between other components, and anchors for building other nanostructures. Our method can also be easily extended to building other types of nanostructures of different elements such as semiconducting crystalline iron silicides. (13) Future work includes a better control over the dimension of the nanostructures, the type of the nanostructures, and the integration of different nanostructures to form more complex devices. [0108] The references cited in this example section include 1. S. Iijima, T.
Ichihashi, Nature 364, 737-737 (1993); 2. J. T. Hu, T. W. Odom, C. M. Lieber, Accounts of Chemical Research 32, 435-445 (1999); 3. Y. C. Kong, D. P. Yu, B. Zhang, W. Fang, S. Q. Feng, Applied Physics Letters 78, 407-409 (2001); 4. H. S. Rhee, B. T. Ahn, Applied Physics Letters 74, 3176-3178 (1999); 5. P. Kluth, Q. T. Zhao, S. Winnerl, S. Lenk, S. Mantl, Microelectronic Engineering 64, 163-171 (2002); 6. A. H. Reader, A. H. Nanommen, P. J. W. Weijs, R. A. M. Wolters, D. J. Oostra, Reports on Progress in Physics 56, 1397-1467 (1993); 7. K. Maex, Materials Science & Engineering R-Reports 11, 53-153 (1993); 8. N. F. Puntes, K. M. Krishnan, A. P. Alivisatos, Science 291, 2115-2117 (2001). 9. M. Su, et al., Journal of Physical Chemistry B 104, 6505-6508 (2000).10. A. Alberti, F. La Via, C. Spinella, E. Rimini, Microelectronic Engineering 55, 163-169 (2001); 11. B. S. Kang, S. K. Oh, H. J. Kang, K. S. Sohn, Journal of Physics-Condensed Matter 15, 67-76 (2003); 12. S. P. Muraka, Silicide for VLSI Applications (Academic Press, New York, 1983); 13. Silicide Thin Films- Fabrication, Properties, and Applications, R. Tung, K. Maex, P. W. Pellegrini, L. H. Allen, Eds., Materials Research Society, Boston, MA (MRS, 1995).
EXAMPLE 2 [0109] Silicon nanowires have been made using chemical vapor deposition
(CVD) and other methods. Generally a vapor source of Si has to be provided. In this example, it is shown that Si nanowires can be made with H2 gas and silicon wafers in the presence of Co nanoparticles.
[0110] Si nanowires (SiNW) were made by reacting Co nanoparticles (CoNP) with Si wafers in H and Ar gases at 1100 °C. The deposition of CoNP was similar to that used in making nanostructures at 900 °C. However, the SiNW covered Si wafers are dramatically different from that of nanostructure or unreacted Si wafers, as shown in Figure 5. The dull color (the wafer on the right) is due to the strong scattering of the SiNW on the substrate. The dimensions of the strips are approximately 1/4" x 2". . [0111] A high resolution SEM picture (Figure 6(a)) shows that those SiNW are
5-50 nm in diameter, with an average diameter of 20 nm. The scale bar in Figure 6(a) is 5 μm. Since the ends of SiNW are not easily found, one can estimate that these wires are many microns long. The quality of those wires is high. Since no hydrocarbons were used during the growth, no amorphous carbon is visible on the surface of those SiNW. The density of the wires is high and the thickness of the layer of the SiNW is significant, and the Si substrate is completely blocked by the wires. Figure 6(b) shows coiled SiNW. The scale bar in Figure 6(a) is 2 μm.
[0112] Energy dispersive X-ray (EDX) analysis has shown that these wires are made of silicon. Figure 7 shows a TEM image of the SiNW that were stripped from the Si wafer using a razor blade, and an EDX result on a section of a SiNW deposited on a Lacey carbon TEM grid. The EDX shows pure Si from those wire segments. The Cu signal comes from the Cu in the TEM grids. The spot in Figure 7(a) shows the location of the electron beam. In the TEM image of SiNW in Figure 7(a) the scale bar is 500 nm.
[0113] Without being bound by theory, it is speculated that the growth mechanisms are as follows. In this example using H2, since the wire growth does not appear to occur without the use of H2 or CoNP, it is concluded that the growth may occur in the gas phase. More precisely, it may be that Co silicides nanostructures play a role here. They may help convert H2 into SiH4 (gas). The unreacted CoNP may act as catalysts and catalyze the growth of SiNW. This theory postulates a tip growth model with CoNP, and the feedstock is SiHU, which is made in situ. [0114] The Co in the SiNW has been investigated with grazing incidence extended x-ray absorption fine structure spectroscopy. The results are shown in Figure 8. The Co in those wires is different from those in Co silicide nanostructures, which is CoSi2 crystals. The EXAFS analysis shows that Co in SiNW resembles more of CoSi. [0115] The examples and embodiments described in this patent are for illustrative purposes only and that various modifications or changes will be suggested to persons skilled in the art and are to be included within the disclosure in this application and scope of the claims. All publications, patents and patent applications cited in this patent are hereby incorporated by reference in their entirety for all purposes to the same extent as if each individual publication, patent or patent application were specifically and individually indicated to be so incorporated by reference.

Claims

1. A method for producing nanostructures on a substrate, the method comprising heating at least a portion of a metal nanoparticle coated substrate in a heating temperature range, and maintaining at least a portion of the nanoparticle coated substrate in a reaction temperature range for a reaction time; thereby producing nanostructures on the substrate.
2. The method of claim 1, wherein the heating temperature range is between about 800°C and about 1200°C; and the reaction temperature range is between about 800°C and about 1200°C.
3. The method of claim 1, further comprising contacting the substrate with a metal nanoparticle composition to give the metal nanoparticle coated substrate.
4. The method of claim 1 wherein the reaction time is about 2 hours or less.
5. The method of claim 1, wherein the substrate is a semiconductor substrate.
6. The method of claim 5, wherein the semiconductor substrate is silicon, germanium or gallium arsenide.
7. The method of claim 6, wherein the semiconductor substrate is a silicon substrate with a crystalline or locally crystalline surface.
8. The method of claim 1 , wherein the metal nanoparticle coated substrate is coated with nanoparticles comprising a metal or alloy selected from the group consisting of Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
9. The method of claim 1 , wherein the metal nanoparticle coated substrate is coated with cobalt nanoparticles.
10. The method of claim 8, wherein the nanoparticles further comprise an added impurity selected from oxygen and carbon.
11. The method of claim 8, wherein the nanoparticles are approximately spherical and have a diameter of between about 1 nm and about 100 nm.
12. The method of claim 11 , wherein the nanoparticles have a diameter equal to or less than about 10 nm.
13. The method of claim 1 , wherein the density of nanoparticles on the nanoparticle O 17 coated substrate is between about 10 and about 10 nanoparticles per square centimeter.
14. The method of claim 1, wherein the nanoparticle coated substrate is heated in a heating temperature range of between about 800°C and about 1000°C.
15. The method of claim 1 , wherein the nanoparticle coated substrate is maintained in a reaction temperature range of between about 800 C and about 1000 C.
16. The method of claim 3, further comprising removing surface contaminants from the substrate before contacting the substrate with the metal nanoparticle composition.
17. The method of claim 3, further comprising polishing the substrate surface before contacting the substrate with the metal nanoparticle composition.
18. The method of claim 1 , wherein the nanostructures comprise atoms from the substrate and from the metal nanoparticle composition.
19. The method of claim 18, wherein the nanostructures have a depth of between about 1 nm and about 50 nm.
20. The method of claim 19, wherein the nanostructures have a depth of between about 15 nm and about 25 nm. .
21. The method of claim 18, wherein the nanostructures have a width of between about 1 nm and about 50 nm.
22. The method of claim 21, wherein the nanostructures have a width of between about 2 nm to about 20 nm.
23. The method of claim 22, wherein the nanostructures have a width of between about 3 nm and about 5 nm.
24. The method of claim 18, wherein the nanostructures have a length of between about 10 nm and 10,000 nm.
25. The method of claim 18, wherein the nanostructures have a length of between about 30 nm and 500 nm.
26. The method of claim 18, wherein the nanostructures have a length of between about 65 nm and 90 nm.
27. The method of claim 1 , wherein the nanostructures are nanowires; the nanoparticle coated substrate is maintained in a reaction temperature range of between about 1000°C and about 1200°C for the reaction time; and the method further comprises maintaining the nanoparticle coated substrate in the reaction temperature range in the presence of a reducing material for at least a portion of the reaction time.
28. The method of claim 27, wherein the reducing material is a hydrogenating material.
29. The method of claim 28, wherein the hydrogenating material is hydrogen gas.
30. The method of claim 27, wherein the nanostructures consist essentially of atoms of the substrate material.
31. A method of producing nanowires, comprising heating at least a portion of a metal nanoparticle coated substrate in a heating temperature range; and maintaining at least a portion of the nanoparticle coated substrate in a reaction temperature range for a reaction time; thereby producing nanowires; wherein the nanowires consist essentially of atoms of the substrate; and wherein the nanoparticle coated substrate is maintained in the reaction temperature range in the presence of a reducing material for at least a portion of the reaction time.
32. The method of claim 31 , wherein the heating temperature range is between about 1000°C and about 1200°C; and the reaction temperature range is between about 1000°C and about 1200°C.
33. The method of claim 31 , further comprising contacting a substrate with a metal nanoparticle composition to give the nanoparticle coated substrate.
34. The method of claim 31 , wherein the substrate is a semiconductor substrate.
35. The method of claim 34, wherein the semiconductor substrate is silicon, germanium or gallium arsenide.
36. The method of claim 35, wherein the semiconductor substrate is a silicon substrate with a crystalline or locally crystalline surface.
37. The method of claim 31 , wherein the metal nanoparticle coated substrate is coated with nanoparticles comprising a metal or alloy selected from the group consisting of Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
38. The method of claim 31, wherein the metal nanoparticle coated substrate is coated with cobalt nanoparticles; the heating temperature range is between about 1000°C and about 1200°C; and the reaction temperature range is between about 1000°C and about 1200°C.
39. The method of claim 37, wherein the nanoparticles are approximately spherical and have a diameter of between about 1 nm and about 100 nm.
40. The method of claim 39, wherein the nanoparticles have a diameter equal to or less than about 10 nm.
41. The method of claim 31 , wherein the nanowires have a width of between about 2 nm and about 50 nm.
42. The method of claim 31 , wherein the nanowires have a length of between about 102 to about 108 nm.
43. The method of claim 31 , wherein the reducing material is hydrogen gas.
44. A method for producing cobalt silicides nanostructures on a substrate, the method comprising heating at least a portion of a silicon substrate coated with cobalt nanoparticles in a heating temperature range of between about 800 C and about 1000°C; and maintaining at least a portion of the nanoparticle coated substrate in a reaction temperature range of between about 800°C and about 1000°C for a reaction time.
45. The method of claim 44, further comprising contacting a silicon substrate with a composition comprising cobalt nanoparticles to give the nanoparticle coated substrate.
46. The method of claim 44 wherein the reaction time is about 2 hours or less.
47. The method of claim 44, wherein the cobalt nanoparticles further comprise an added impurity selected from oxygen and carbon.
48. The method of claim 44, wherein the nanoparticles are approximately spherical and have a diameter of between about 2 nm and about 15 nm.
49. The method of claim 48, wherein the nanoparticles have a diameter of between about 2 nm and about 5 nm.
50. The method of claim 48, wherein the nanoparticles have a diameter of between about 8 nm and about 14 nm.
51. The method of claim 45, wherein the composition comprises a population of approximately spherical cobalt nanoparticles, each nanoparticle having a diameter; the population of nanoparticles having an average diameter between about lnm and about 5nm; and the standard deviation of the diameters of the nanoparticles in the population being less than or equal to about 0.2 of the average diameter.
52. The method of claim 45, wherein the composition comprises a population of approximately spherical cobalt nanoparticles, each nanoparticle having a diameter; the population of nanoparticles having an average diameter between about 8nm and about 16nm; and the standard deviation of the diameters of the nanoparticles in the population being less than or equal to about 0.2 of the average diameter.
53. The method of claim 44, wherein the density of nanoparticles on the 0 17 nanoparticle coated substrate is between about 10 and about 10 nanoparticles per square centimeter.
54. The method of claim 45, further comprising removing surface contaminants from the substrate before contacting the substrate with the metal nanoparticle composition.
55. The method of claim 45, further comprising polishing the substrate surface before contacting the substrate with the metal nanoparticle composition.
56. The method of claim 44, wherein the nanostructures comprise crystalline or substantially crystalline CoSi2.
57. The method of claim 56, wherein the nanostructures have a depth of between about 1 nm and about 50 nm; a width of between about 1 nm and about 50 nm; and a length of between about 30 nm and 10,000 nm.
58. The method of claim 57, wherein the nanostructures have a length of between about 30 nm and 500 nm.
59. A method of producing silicon nanowires comprising heating at least a portion of a silicon substrate coated with metal nanoparticles in a heating temperature range; and maintaining at least a portion of the nanoparticle coated substrate in a reaction temperature range for a reaction time; thereby producing silicon nanowires; wherein the nanoparticle coated substrate is maintained in the reaction temperature range in the presence of a reducing material for at least a portion of the reaction time.
60. The method of claim 59, wherein the heating temperature range is between about 1000°C and about 1200°C; and the reaction temperature range is between 1000°C and about 1200°C.
61. The method of claim 59, further comprising contacting a silicon substrate with a metal nanoparticle composition to give the nanoparticle coated substrate.
62. The method of claim 59, wherein the reducing material is a hydrogenating material or carbon monoxide.
63. The method of claim 59, wherein the reducing material is a hydrogenating material.
64. The method of claim 63, wherein the hydrogenating material is hydrogen gas.
65. The method of claim 59, wherein the silicon substrate is a silicon substrate with a crystalline or locally crystalline surface.
66. The method of claim 59, wherein the metal nanoparticles comprises a metal or alloy selected from the group consisting of Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
67. The method of claim 59, wherein the metal nanoparticles are cobalt nanoparticles; the heating temperature range is between about 1000°C and about 1200°C; and the reaction temperature range is between 1000°C and about 1200°C.
68. The method of claim 66 or claim 67, wherein the nanoparticles are approximately spherical and have a diameter of between about 1 nm and about 100 nm.
69. The method of claim 68, wherein the nanoparticles have a diameter equal to or less than about 10 nm.
70. The method of claim 59, wherein the nanowires have a width of between about 7 R
2 nm and about 50 nm and a length of between about 10 to about 10 nm.
71. The method of claim 59, wherein the density of nanoparticles on the nanoparticle coated substrate is between about 109 and about 1012 nanoparticles per square centimeter.
72. The method of claim 59, wherein the nanowires are substantially amorphous.
73. A method for producing nanogrooves, comprising producing nanostructures on a substrate and contacting the nanostructures with an etching composition capable of preferentially removing nanostructure material as compared to removal of substrate material.
74. The method of claim 73, wherein the nanostructures on the substrate are produced by the method of claim 1.
75. The method of claim 73, wherein the nanostructures are cobalt silicide nanostructures, the substrate is silicon, and the etching composition is hydrogen fluoride.
76. The method of claim 75, wherein the nanostructures on the substrate are produced by the method of claim 44.
77. A method of making a silane composition, comprising heating at least a portion of a metal nanoparticle coated silicon substrate in a reaction temperature range in the presence of hydrogen; thereby producing a silane composition comprising one or more silanes.
78. The method of claim 77, wherein the reaction temperature range is of between about 1000 Celsius and about 1200 Celsius.
79. The method of claim 77, wherein the silane composition comprises S1H4.
80. The method of claim 77, wherein the silicon substrate is a silicon substrate with a crystalline or locally crystalline surface.
81. The method of claim 77, wherein the silicon substrate is coated with a metal nanoparticle composition comprises nanoparticles comprising a metal or alloy selected from the group consisting of Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au, and alloys or two or more of the foregoing.
82. The method of claim 77, wherein the metal nanoparticle composition comprises cobalt nanoparticles; and the reaction temperature range is between about 1000 Celsius and about 1200 Celsius.
83. The method of claim 81 or claim 82, wherein the nanoparticles are approximately spherical and have a diameter of between about 1 nm and about 100 nm.
84. The method of claim 83, wherein the nanoparticles have a diameter equal to or less than about 10 nm.
85. The method of claim 77, wherein the density of nanoparticles on the metal nanoparticle coated substrate is between about 10 and about 1012 nanoparticles per square centimeter.
86. A nanostructured material comprising a substrate including one or more nanogroove indentations on a surface of the substrate.
87. The nanostructured material of claim 86, wherein the substrate is a semiconductor substrate.
88. The nanostructured material of claim 87, wherein the substrate is silicon substrate.
89. The nanostructured material of claim 86, wherein the nanogroove indentations are aligned with crystal planes of the substrate lattice.
90. The nanostructured material of claim 86, wherein the nanogroove indentations have a depth of up to about 50nm.
91. The nanostructured material of claim 86, wherein the nanogroove indentations have a length of between about lOnm and about 10,000 nm.
92. The nanostructured material of claim 86, 87 or 88, wherein the substrate material forming the surface of the nanogroove contains an amount of a metal.
93. The nanostructured material of claim 92, wherein the metal is selected from Co, Fe, Ti, Ni, Cr, Mn, Mo, Os, Re, W, Pt, and Au.
94. The nanostructured material of claim 93, wherein the metal is cobalt.
95. The nanostructured material of claim 86, wherein the nanogroove indentations are produced by the method of claim 73.
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Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7078276B1 (en) * 2003-01-08 2006-07-18 Kovio, Inc. Nanoparticles and method for making the same
JP4224639B2 (en) * 2004-01-23 2009-02-18 下山 勲 High density integrated light emitting device manufacturing method, high density integrated light emitting device, and high density integrated light emitting device manufacturing apparatus
WO2006078281A2 (en) * 2004-07-07 2006-07-27 Nanosys, Inc. Systems and methods for harvesting and integrating nanowires
US7705307B1 (en) * 2006-02-27 2010-04-27 Agiltron Corporation Thermal displacement-based radiation detector of high sensitivity
KR100723882B1 (en) * 2006-06-15 2007-05-31 한국전자통신연구원 Method for fabricating silicon nanowire using silicon nanodot thin film
US7803707B2 (en) * 2006-08-17 2010-09-28 Wisconsin Alumni Research Foundation Metal silicide nanowires and methods for their production
KR100768632B1 (en) * 2006-10-30 2007-10-18 삼성전자주식회사 Method for dispersing nanoparticles and method for producing nanoparticles thin film using the same
US8394483B2 (en) 2007-01-24 2013-03-12 Micron Technology, Inc. Two-dimensional arrays of holes with sub-lithographic diameters formed by block copolymer self-assembly
US7723684B1 (en) * 2007-01-30 2010-05-25 The Regents Of The University Of California Carbon nanotube based detector
US8083953B2 (en) 2007-03-06 2011-12-27 Micron Technology, Inc. Registered structure formation via the application of directed thermal energy to diblock copolymer films
US8557128B2 (en) 2007-03-22 2013-10-15 Micron Technology, Inc. Sub-10 nm line features via rapid graphoepitaxial self-assembly of amphiphilic monolayers
US8097175B2 (en) 2008-10-28 2012-01-17 Micron Technology, Inc. Method for selectively permeating a self-assembled block copolymer, method for forming metal oxide structures, method for forming a metal oxide pattern, and method for patterning a semiconductor structure
US7959975B2 (en) 2007-04-18 2011-06-14 Micron Technology, Inc. Methods of patterning a substrate
US8294139B2 (en) 2007-06-21 2012-10-23 Micron Technology, Inc. Multilayer antireflection coatings, structures and devices including the same and methods of making the same
US8372295B2 (en) 2007-04-20 2013-02-12 Micron Technology, Inc. Extensions of self-assembled structures to increased dimensions via a “bootstrap” self-templating method
US8404124B2 (en) * 2007-06-12 2013-03-26 Micron Technology, Inc. Alternating self-assembling morphologies of diblock copolymers controlled by variations in surfaces
US8080615B2 (en) 2007-06-19 2011-12-20 Micron Technology, Inc. Crosslinkable graft polymer non-preferentially wetted by polystyrene and polyethylene oxide
US8703276B2 (en) * 2007-08-01 2014-04-22 Brigham Young University Apparatus, system, and method for DNA shadow nanolithography
US8999492B2 (en) 2008-02-05 2015-04-07 Micron Technology, Inc. Method to produce nanometer-sized features with directed assembly of block copolymers
US8101261B2 (en) * 2008-02-13 2012-01-24 Micron Technology, Inc. One-dimensional arrays of block copolymer cylinders and applications thereof
US8425982B2 (en) 2008-03-21 2013-04-23 Micron Technology, Inc. Methods of improving long range order in self-assembly of block copolymer films with ionic liquids
US8426313B2 (en) 2008-03-21 2013-04-23 Micron Technology, Inc. Thermal anneal of block copolymer films with top interface constrained to wet both blocks with equal preference
US8114300B2 (en) * 2008-04-21 2012-02-14 Micron Technology, Inc. Multi-layer method for formation of registered arrays of cylindrical pores in polymer films
US8114301B2 (en) 2008-05-02 2012-02-14 Micron Technology, Inc. Graphoepitaxial self-assembly of arrays of downward facing half-cylinders
ES2332079B1 (en) * 2008-07-22 2010-10-27 Consejo Superior De Investigaciones Cientificas (Csic) PROCEDURE FOR THE DISPERSION OF DRY NANOPARTICLES AND THE OBTAINING OF HIERARCHICAL STRUCTURES AND COATINGS.
US20100072458A1 (en) * 2008-08-05 2010-03-25 Green Alexander A Methods For Sorting Nanotubes By Wall Number
US8216436B2 (en) * 2008-08-25 2012-07-10 The Trustees Of Boston College Hetero-nanostructures for solar energy conversions and methods of fabricating same
CN102132377A (en) * 2008-08-25 2011-07-20 波士顿学院董事会 Methods of fabricating complex two-dimensional conductive silicides
US8110167B2 (en) * 2009-02-10 2012-02-07 Battelle Memorial Institute Nanowire synthesis from vapor and solid sources
US8304493B2 (en) 2010-08-20 2012-11-06 Micron Technology, Inc. Methods of forming block copolymers
US8839659B2 (en) * 2010-10-08 2014-09-23 Board Of Trustees Of Northern Illinois University Sensors and devices containing ultra-small nanowire arrays
US8900963B2 (en) 2011-11-02 2014-12-02 Micron Technology, Inc. Methods of forming semiconductor device structures, and related structures
US9087699B2 (en) 2012-10-05 2015-07-21 Micron Technology, Inc. Methods of forming an array of openings in a substrate, and related methods of forming a semiconductor device structure
US9618465B2 (en) 2013-05-01 2017-04-11 Board Of Trustees Of Northern Illinois University Hydrogen sensor
US9229328B2 (en) 2013-05-02 2016-01-05 Micron Technology, Inc. Methods of forming semiconductor device structures, and related semiconductor device structures
DE102014210303A1 (en) 2013-05-31 2014-12-04 Basf Corporation Nanostructure dispersions and transparent conductors
US9177795B2 (en) 2013-09-27 2015-11-03 Micron Technology, Inc. Methods of forming nanostructures including metal oxides
US20160002096A1 (en) 2014-07-02 2016-01-07 Corning Incorporated Silicon and silica nanostructures and method of making silicon and silica nanostructures
US11320734B2 (en) * 2016-09-30 2022-05-03 Intel Corporation Ligand-capped main group nanoparticles as high absorption extreme ultraviolet lithography resists

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076431A (en) * 2000-08-31 2002-03-15 Nippon Telegr & Teleph Corp <Ntt> Method for manufacturing light emitting substrate and light emitting element
US6413880B1 (en) * 1999-09-10 2002-07-02 Starmega Corporation Strongly textured atomic ridge and dot fabrication
US20030157325A1 (en) * 2002-02-20 2003-08-21 International Business Machines Corporation Monodisperse nanoparticle containing thin films via self-assembly

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002262866A (en) * 2001-03-07 2002-09-17 Nix Inc Method and device for extracting viral gene
US6911385B1 (en) * 2002-08-22 2005-06-28 Kovio, Inc. Interface layer for the fabrication of electronic devices
US20040142560A1 (en) * 2003-01-17 2004-07-22 Cheng-Tzu Kuo Method of selective growth of carbon nano-structures on silicon substrates

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6413880B1 (en) * 1999-09-10 2002-07-02 Starmega Corporation Strongly textured atomic ridge and dot fabrication
JP2002076431A (en) * 2000-08-31 2002-03-15 Nippon Telegr & Teleph Corp <Ntt> Method for manufacturing light emitting substrate and light emitting element
US20030157325A1 (en) * 2002-02-20 2003-08-21 International Business Machines Corporation Monodisperse nanoparticle containing thin films via self-assembly

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