WO2005112113A2 - Mounting with auxiliary bumps - Google Patents

Mounting with auxiliary bumps Download PDF

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Publication number
WO2005112113A2
WO2005112113A2 PCT/US2005/013400 US2005013400W WO2005112113A2 WO 2005112113 A2 WO2005112113 A2 WO 2005112113A2 US 2005013400 W US2005013400 W US 2005013400W WO 2005112113 A2 WO2005112113 A2 WO 2005112113A2
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
mounting
auxiliary
mounting surface
elements
Prior art date
Application number
PCT/US2005/013400
Other languages
French (fr)
Other versions
WO2005112113A3 (en
Inventor
Edwin F. Johnson
Original Assignee
Endwave Corporation
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Filing date
Publication date
Application filed by Endwave Corporation filed Critical Endwave Corporation
Publication of WO2005112113A2 publication Critical patent/WO2005112113A2/en
Publication of WO2005112113A3 publication Critical patent/WO2005112113A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
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    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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    • H01L2224/818Bonding techniques
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    • H01L2924/151Die mounting substrate
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    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
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    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
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    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
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    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
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    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

An electronic circuit (10) can be produced by placing an electrically conductive compressible circuit bump (28) on a circuit electrode (32) of a mounting surface (20, 46) of first and second circuit devices (12, 38), such as an integrated circuit and a base substrate. One or more auxiliary bumps (40) can also be placed on one or both of the mounting surfaces (20, 46) of the circuit devices (12, 38). During mounting, the first circuit device (12) can be positioned over the second circuit device (38) with the circuit bumps (28) connecting circuit contacts (14, 32) on the two mounting surfaces (20, 46). Pressure can be applied so that the circuit bumps (28) and the auxiliary bumps (40) are compressed between the integrated circuit and the base device sufficiently for adhering at least the circuit bumps (28) to the circuit contacts (14, 32).

Description

MOUNTING WITH AUXILIARY BUMPS BACKGROUND The disclosed devices relate to an electrical circuit formed by mounting two electrical circuit devices together with interconnections between electrodes on facing surfaces, and with auxiliary elements disposed between the two circuit devices at positions spaced from the interconnections. Electrical circuits can be formed by mounting one circuit device onto another circuit device and connecting electrodes on the respective circuit devices. The devices, such as chips, dies, integrated circuits, printed circuits and other devices formed on a substrate, have electrodes that are distributed around the periphery of a planar mounting surface and sometimes on the interior. In one mounting method, conductive bumps are applied to the electrodes of one device and the bumps are pressed against corresponding electrodes of another device. The electrodes are typically distributed around the edges of one of the devices, so the force applied to the devices is relatively balanced by the distributed bumps. This mounting method is referred to as flip mounting.
SUMMARY A first circuit device and a second circuit device are mounted together with face-to-face electrodes interconnected. Disclosed embodiments include mounting elements interconnecting opposing electrodes as well as auxiliary elements. A first circuit device can have a first mounting surface including at least one first circuit contact. Similarly, a second circuit device can have a second mounting surface including at least one second circuit contact, with the second mounting surface facing the first mounting surface. A conductive compressed interconnection, formed of a material suitable for compression bonding, can interconnect a pair of opposing circuit contacts. In some embodiments, at least one auxiliary mounting element can be positioned between the first and second mounting surfaces at a location spaced from the circuit contacts. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a simplified isometric view of an electrical circuit including first and second circuit devices prior to mounting. FIG. 2 is a view of the electrical circuit of FIG. 1 after mounting. FIG. 3 is an exaggerated cross section of the electrical circuit of FIG. 1 immediately prior to mounting. FIG. 4 is a cross section similar to FIG. 3 taken along line 4-4 in FIG. 2, showing the electrical circuit after mounting. FIG. 5 is an enlarged view of an example of a mounting surface of a circuit device that can be mounted as illustrated in FIGS. 1 and 2. FIG. 6 is a view of a mounting surface of another circuit device mountable on a second corresponding circuit device. FIG. 7 is a side view of another electrical circuit showing a first circuit device in an optional position prior to mounting on a second circuit device. FIG. 8 is a side view of the electrical circuit of FIG. 7 during one example of mounting. FIG. 9 is a side view of the electrical circuit of FIG. 7 illustrating one example of the electrical circuit after mounting. DESCRIPTION OF THE PREFERRED EMBODIMENTS This disclosure includes circuit devices that are mounted together with interconnections that interconnect circuits on the circuit devices. A circuit can include an electrical or electromagnetic component or device, a configuration of electrically or electromagnetically connected components or devices, as well as a closed path followed or capable of being followed by an electric current. Circuit devices can include, for example, chips, microchips, integrated circuits, dies, printed circuits, chip carriers, circuit boards, and other circuit structures, and can have a body such as a substrate. A substrate can be insulating, conducting or semiconducting in nature, can include one layer or a combination of layers and materials, can be active, passive or inactive in the function of the circuit, and can have planar or non-planar surfaces. Circuit devices can include one or more circuit contacts through which electrical communication is provided to another circuit device. A circuit contact, which can include an electrode, terminal, or other element on the device, is typically a layer, strip or pad of conductive or semiconductive material, and it can be of any form or material that provides for functional interface between the associated circuit device and a circuit mounting element, such as a conductive mounting element, also referred to as an interconnection. A mounting element may be of any suitable shape, size or material that provides support between the circuit devices during or after mounting, and may be formed by any suitable technique. A mounting element is of a type that is compressible and useable in a pressure-based mounting technique, such as thermocompression bonding, thermosonic bonding, cold welding, or fusion bonding, in which the mounting element is compressed between the mounting surfaces of the circuit devices. It has been found in designing circuits having face-to-face mounted circuit devices, particularly for use at microwave and millimeter wave frequencies, that circuit operation and performance characteristics are enhanced if the electrodes are placed as defined by the circuit rather than by the chip geometry. However, in some applications and designs, there can be a significant region of the chip surface, such as adjacent to one or more sides or corners, that is unsupported, or insufficiently or incompletely supported, by mounting elements, such as mounting bumps, placed on circuit device electrodes. In other words, the positions of such electrodes may be located in a variety of configurations. These configurations can be unbalanced or unsymmetrical relative to the center of a mounting surface; with the result that there can be one or more regions inadequately supported by electrode-mounted bumps. One solution is to design the chip so that the electrically conductive bumps provide balanced support for the chip. This can result in modified circuit designs that compromise the functions or operations of the circuits. Circuit design can be simplified with the placement of auxiliary elements between mounting surfaces of the two circuit devices. The auxiliary elements can be spaced from the circuit electrodes. An auxiliary element can be a bump that is not an essential part of the electrical circuit formed by the combination of mounting device and base device. This allows placement of the circuit contacts on the mounting device according to circuit requirements substantially without regard for the geometry of the mounting surfaces. In a general sense, then an electrical circuit may include a first circuit device having a first mounting surface including at least one first circuit contact, and a second circuit device having a second mounting surface including at least one second circuit contact, the second mounting surface facing the first mounting surface. A conductive compressed interconnection formed of a material suitable for compression bonding, may connect to and extend between a first circuit contact and a second circuit contact. Further, at least one auxiliary element, also formed of a material suitable for compression bonding, may be positioned between the first and second mounting surfaces and spaced from the circuit contacts. In some examples, a combination of the at least one circuit mounting element may be disposed predominantly on one side of the center of the first mounting surface; and at least one auxiliary mounting element mounted onto at least one of the first and second mounting surfaces, and the combination of the at least one auxiliary mounting element being disposed predominantly on another side of the center of the first mounting surface. In some examples, a plurality of circuit contacts may be disposed away from at least a portion of the periphery of the second mounting surface. With the second mounting surface facing the first mounting surface and pairs of the first and second circuit contacts aligned, a plurality of conductive compressed interconnections formed of a material suitable for compression bonding, may be connected to and extend between respective pairs of first and second circuit contacts. Further, a plurality of auxiliary elements also formed of the material suitable for compression bonding, may be positioned between the first and second mounting surfaces and spaced from the circuit contacts. The auxiliary elements may be disposed along the portion of the periphery of the mounting surfaces, and a centroid of the combination of the plurality of interconnections and the plurality of auxiliary elements being more centrally located in the first mounting surface than a centroid of the plurality of interconnections. As an example, an electrical circuit can include a mounting device, such as a chip, having a circuit contact on a planar mounting surface, and a base device, such as a motherboard, with a planar mounting surface on which is mounted at least one electrode associated with a circuit contact on the base device. The base device typically includes a substrate on which or in which a circuit is formed or fabricated. In some examples, a compressible auxiliary element, such as an auxiliary bump, is mounted on one of the mounting surfaces of the mounting device and the base device spaced from a circuit bump and associated circuit contacts. The mounting device is positioned over a mounting surface of the base device with the circuit bump contacting the other of the pair of associated contacts, and with the at least one auxiliary bump contacting the opposing mounting surfaces of the mounting device and the base device. Pressure can be applied so that the circuit bump and the auxiliary bump are compressed between the mounting device and the base device sufficiently for adhering the circuit bump to the contacts. The auxiliary bumps can be made of the same material as the circuit bumps. This can simplify construction of the auxiliary bumps and can make the forces applied to the circuit and auxiliary bumps more uniform. FIGS. 1-5 illustrate an example of an electrical circuit 10 and a method of making the circuit. Circuit 10 includes a first circuit device, referred to as a mounting device or chip 12, with a plurality of circuit contacts, such as electrodes 14, 15, and 16. In this embodiment, these electrodes are integral with a circuit element in the form of a planar conductive device or resonator 18 formed on a mounting surface 20 of an electronic circuit substrate 22. Electrodes 14-16 are disposed along one edge 20a, including corners 20b and 20c, of the mounting surface in a contact region 24. Opposite from region 24, along an edge 20d, including corners 20e and 20f, is a second, auxiliary region 26 that is opposite and spaced from the electrodes and contact region 24. In region 26, a portion 20g of mounting surface 20 includes a corresponding portion of the face of substrate 22 that is exposed. Mounting surface 20 can be considered to include the exposed surfaces on the underside of chip 12, as shown. Surface 20 can accordingly include the surface of substrate 22 or any layer or material existing on the surface of substrate 22, such as electrodes 14-16 or resonator 18. Further, in this case, the entire underside of the chip may be considered to be mounting surface 20, although it may be only a portion of the underside, depending upon the structures and relative positions of the circuit devices being mounted together. For instance, if a portion of each circuit device extends beyond the edge of the other circuit device, the mounting surface may be limited to the common areas of overlap. In the present example, the mounting surface is that portion of the underside of chip 22 that faces a base circuit device 38 described below. Circuit mounting elements, referred to as circuit bumps 28, 29 and 30, are shown mounted on electrodes 14, 15 and 16, respectively. These bumps are referred to as circuit bumps in that they provide an electrical path between the electrodes on the chip and respective metallization strips terminating in circuit contacts 32, 33 and 34 mounted on a surface 36 of base circuit device 38, and may also be referred to as means for electrically conductively interconnecting each pair of associated circuit contacts with compression bonding. These circuit contacts and the electrodes form associated pairs of circuit contacts 14 and 32, 15 and 33, and 16 and 34. Three auxiliary bumps 40, 41 and 42, that also function as mounting elements, are mounted in an auxiliary region 44 of a chip mounting surface 46 on surface 36. These mounting elements may also be referred to as means for maintaining the spacing between the first and second mounting surfaces in at least one location spaced from the at least one pair of associated first and second circuit contacts. Mounting surface 46 corresponds to the area of surface 36 adjacent to which chip 12 is to be mounted, and region 44 corresponds to region 26 on chip 12. The positions where bumps 40, 41 and 42 contact chip 12 are shown in dashed lines in region 26 in FIGS. 1 and 5. Correspondingly, mounting surface 46 includes an edge 46a, including corners 46b and 46c, of the mounting surface in a contact region 47. Opposite from region 47, along an edge 46d, including corners 46e and 46f, is second, auxiliary region 44, which is opposite and spaced from the electrodes and contact region 47. It is seen then, that a method is provided that includes forming a first circuit device having a first mounting surface and at least one first circuit contact on the first mounting surface; forming a second circuit device having a second mounting surface including a second circuit contact associated with a respective first circuit contact, the first and second circuit contacts forming at least one pair of associated circuit contacts; placing an electrically conductive circuit mounting element on one circuit contact of each pair of associated circuit contacts; placing each of at least one auxiliary mounting element on a respective one of the first and second mounting surfaces spaced from the at least one circuit contact on the one mounting surface; positioning the first circuit device relative to the second circuit device with the first mounting surface facing the second mounting surface, and with each circuit mounting element extending between a pair of associated circuit contacts, and with the at least one auxiliary mounting element positioned between the first and second mounting surfaces; and compressing each circuit mounting element sufficiently for adhering each circuit mounting element to the other circuit contact associated with the one circuit contact. As particularly shown in FIG. 5, it is seen that there is an auxiliary bump opposite each circuit bump, and the auxiliary bumps are symmetrically placed opposite from the circuit bumps relative to an axis 48 of symmetry passing through a center 50 of and coplanar with mounting surface 20, as well as relative to center 50. The auxiliary bumps thus form a mirror image of the circuit bumps relative to axis 48. In a more general sense, the auxiliary bumps used in electrical circuit 10 allow the application of a mounting force that is centered on chip 12 during mounting. For instance, if only circuit bumps 28, 29 and 30 were used, a force directly in line with the circuit bumps would be required in order to avoid directly pressing edge 20d against base device 38. In other terms, the force would generally be applied in alignment with the centroid of the circuit bumps in order to provide even pressure on the circuit bumps and balanced force on the chip. The positions of the bumps during mounting determine how a mounting force is applied, so it does not matter on which of the mounting surfaces a bump is initially placed. A reference to a bump being on one mounting surface correspondingly includes a configuration where the bump is on the other mounting surface. A definition of a centroid (X, Y ) is
(χ,f) = - -fj(AiXi , AiYi) (1)
where (Xi, Yj) represents the coordinates in a Cartesian coordinate system having an origin coincident with the center of the mounting surface, and represents the relative value of a particular bump, such as the size, thickness, density, force resistance or other weighting factor. For example, in FIG. 5, point 50 is the center of mounting surface 20 as well as the origin of a coordinate system 51 having an x- axis 49 and a y-axis 48. The three circuit bumps 28, 29 and 30 have a centroid coincident with bump 29, assuming the bumps are assigned equal weighting. With auxiliary bumps 40, 41 and 42 mounted equal distances opposite from the three circuit bumps, a resultant centroid for all of the bumps will be coincident with the center 50 of the mounting surface. Ideally the center of force applied to a circuit device during mounting is substantially coincident with the center of the device, which corresponds with the center of the mounting surface of the device. The closer the centroid of the combination of circuit and auxiliary bumps is to the center of the mounting surface, the more evenly the pressure is applied to the various bumps. When the circuit bumps are predominantly on one side of the center, improvement is obtained by placing auxiliary bumps that are predominantly on another side of the center, and in particular on the opposite side of the center. Thus, the addition of auxiliary bumps that shift the centroid from the centroid of the circuit bumps toward the center of the mounting surface is an improvement. The center of force applied to a circuit device can be in the general proximity of the centroid, such as within a distance of one half of the distance from the center to the outer edge of the mounting surface, as illustrated by central region 44 defined by dashed line 45. A region 43 outside of dashed line 45 accordingly may be considered the general periphery of the mounting surface. To obtain an improved centroid for the combination of bumps, positions and characteristics of auxiliary bumps can be selected so that
C+A + C+A < where the subscripts C and A indicate circuit and
Figure imgf000011_0001
auxiliary bumps, respectively, X C+A and C+A represent the absolute values of the coordinates for the centroid for the combination of circuit and auxiliary bumps, and Xr and represent the absolute values of the coordinates for the centroid for the circuit bumps. To obtain a centered centroid for the combination of bumps, auxiliary bumps can be selected such that
, or (xc, Yc ) = (-xA,-YA ), where
Figure imgf000011_0002
A and Bj represent weighting values of respective circuit and auxiliary bumps, and N and M are the respective number of circuit and auxiliary bumps. N and M do not need to be equal, and for i=j, and Bjdo not need to be equal and (Xi,Y and (Xj,Yj) do not need to be equal in absolute value. FIG. 1 shows chip 12 tilted next to base device 38 so that the mounting surfaces of each are visible. It is seen that the circuit bumps are mounted on the electrodes of the chip and the auxiliary bumps are mounted on the mounting surface of the base device. Each of the circuit and auxiliary bumps may be mounted initially on either device. FIG. 3 shows the chip in position above the base device, prior to contact, with the circuit bumps aligned over the circuit contacts on the base device, and the auxiliary bumps aligned with the auxiliary region of the mounting surface of the chip. In FIG. 3, the separation Dl between the circuit bump 29 and contact pad 33 and the separation D2 between auxiliary bump 41 and mounting surface 20 are substantially equal. In this example, the heights of the auxiliary bumps are more than the heights of the circuit bumps, in order to compensate for the thicknesses of the contacts on the mounting surfaces of the mounting device and the base device. These dimensions tend to keep the mounting device and base device parallel during mounting. Equal spacing between each bump and an associated mounting surface is not necessary, nor is it necessary that the height of the auxiliary bump correspond to the height of the circuit bump and associated circuit contact. Other, unequal configurations can also be used. FIGS. 2 and 4 show apparatus 10 after thermocompression mounting of the chip on the base device. Construction of the bumps can be facilitated by forming the auxiliary bumps and the circuit bumps out of the same material, such as gold or a gold alloy. The pressures applied to the bumps are also more even when the bumps are made of the same material, or materials having similar compression characteristics. Because of the softness of gold, the sizes of the auxiliary bumps relative to each other and relative to the circuit bumps do not have to be uniform. As has been mentioned, more or fewer auxiliary bumps may be provided relative to the number of circuit bumps. Auxiliary bumps distributed in areas devoid of circuit bumps, particularly along portions of the chip periphery, better balance and distribute the forces of mounting between the chip and the base device. It is clear that without the auxiliary bumps, the right edge of chip 12 could press directly on the base device, possibly resulting in damage to the chip and the base device. Stability of the chip during mounting is improved when the auxiliary bumps are predominantly to the right of axis 48, as viewed in FIG. 5, and therefore generally on the side opposite from the circuit bumps. Gold bumps generally adhere readily to metal, such as to the circuit contacts. Gold does not adhere as well to other materials, such as some insulating and semi- insulating materials, including, for example, alumina, beryllia, glass or ceramic, out of which the substrates of the base and mounting devices can be made. This produces a further advantage in the embodiment shown in FIGS. 1-5, in that the chip substrate is movable in the plane of the mounting surface relative to the abutting face of the auxiliary bump, such as face 52 of bump 41 shown in FIG. 4. This movement of chip 12 is illustrated by double-arrow 53, without corresponding movement of bump 41. This feature allows for expansion and contraction of chip 12 relative to substrate 38 due primarily to temperature fluctuations in the respective substrates. This is particularly advantageous when the chip contains heat- generating active or passive components, such as a transistor. This reduces the stress put on the circuit bumps and makes the circuit structure more durable. A second example of a circuit device supported on both circuit and auxiliary bumps, is illustrated in FIG. 6 as a chip 54. Chip 54, for purposes of illustration, has a chip substrate 56 with a surface 58 on which is mounted a coil 60. The circuit contact electrodes 62 and 64 for the coil are positioned in close proximity in a central region 66 of substrate surface 58. The illustrated surface of chip 54, including the exposed surfaces of the substrate, coil and electrodes forms a mounting surface 67. Circuit bumps 68 and 70 are mounted onto electrodes 62 and 64 during use, with chip 54 mounted onto a base circuit device, not shown. If support of the chip were limited to circuit bumps 68 and 70, the chip would be very unstable, and mounting forces would have to be applied very precisely, even though the centroid of the circuit bumps is midway between the circuit bumps, at a mounting surface center 71. In order to compensate for this, an auxiliary bump can be positioned at each corner, as is illustrated by phantom bumps 72, 73, 74 and 75. These bumps are positioned in a peripheral region 76 spaced from the electrodes in central region 66. This assures a broad, stable base of support for the chip during and after mounting, and also maintains mounting surface 67 generally horizontal with the mounting surface of a base circuit device during mounting of chip 54 onto a base circuit device. FIGS. 7, 8 and 9 illustrate a simple electrical circuit 80 including a first circuit device 82, a second circuit device 84, exemplary circuit mounting bumps 86 and 88, and an exemplary auxiliary bump 90. First circuit device 82 includes a substrate 92, circuit electrodes 94 and 96, and an auxiliary pad 98. A mounting surface 100 of the first circuit device accordingly includes the downwardly facing surfaces, as viewed in the figures, of substrate 92, circuit electrodes 94 and 96, and auxiliary pad 98. In this example, bumps 86 and 88 include a first layer 102 having a thickness D3 and a width D4, and a second layer 104 having a thickness D5 and a width D6. Although various bump dimensions may be used, including different dimensions for different bumps, layers 102 and 104 can have the same thickness, such as 11 microns. The layers 102 can have the same width, such as 40 microns, with layers 104 having a reduced width, such as 30 microns. In this example, rather than being taller than the circuit bumps, auxiliary bump 90 has a single layer having a thickness D7 and a width D8 that are the same as layer 102 of the circuit bumps. As a result, the auxiliary bumps can be formed in the same processing step as layers 102 of the circuit bumps. Similarly, even though it does not have an electrical circuit function, auxiliary pad 98 can be made the same as the circuit electrodes, and be made at the same time. Second circuit device 84 includes a substrate 106, circuit electrodes 108 and 110, and an auxiliary pad 112. A mounting surface 114 is formed by the surfaces of the substrate, electrodes and pad facing first circuit device 82 corresponding to mounting surface 100. In some applications, substrate 92 of first circuit device 82 can have a length that is close to two orders of magnitude longer than the width of the bumps, such as a substrate length of 2 mm, or 2000 microns. With a total circuit bump height of 22 microns, it can be necessary to mount first circuit device 82 to second circuit device 84 with the mounting surfaces within an angle Al, shown in FIG. 8, of 0.6 degrees from parallel. In such applications, this means that one edge of the mounting surface first circuit device is no more than about 20 microns closer or further from the mounting surface of the second circuit device compared to the opposite edge. Referring to FIG. 7 in particular, an angle A2 indicates the angle that would exist between mounting surface 100 and mounting surface 114, if auxiliary bump 90 and associated pad 98 did not exist, and an edge 100a, distal from circuit bump 86, contacted mounting surface 114. With the existence of auxiliary bump 90 close to edge 100a, then bump 90, rather than the edge of mounting surface 100, contacts mounting surface 114. The angle A3 represents this reduced angle that is related to the relative sizes of the circuit and auxiliary bumps. For an auxiliary bump having a height of about one-half of the height of the circuit bump, angle A3 is about half of angle A2. When a bond head or other mounting apparatus, not shown, applies a downward force on first circuit device 82, as represented by arrow 116, the relative angle between mounting surfaces 100 and 114 will be limited to angle A3. As shown in FIG. 8, when mounting surface 100 is oriented at an angle Al greater than A3, auxiliary bump 90 contacts mounting surface 114 before circuit bumps 86 and 88 do. This causes first circuit device 82 to pivot, as represented by arrow 118, about the point of contact of bump 90 on auxiliary pad 112 until circuit bump 88 contacts mounting surface 114. With continued force on first circuit device 82, second layer 102 of circuit bump 88 compresses, as does auxiliary bump 90. This attaches bump 88 to electrode 110. Since the angle is not as great as shown in FIG. 8 in this example, circuit bump 86 contacts mounting surface 114 as well, and is also compressed sufficiently to attach to electrode 108. A possible resultant mounting position is illustrated in FIG. 9. As can be seen, then, auxiliary bumps and circuit bumps can have various configurations and functions, depending upon the application. The auxiliary bumps can be placed in any suitable configuration that does not interfere with placement or function of the circuit bumps and balances a chip relative to the base device. As mentioned previously, the circuit and auxiliary bumps may be placed on the mounting surface of either circuit device. Auxiliary bumps can also be mounted on electrodes in addition to the circuit bumps if appropriate. These bumps may or may not be mounted on the contacts of the base device. The auxiliary bumps are not necessarily only for the purpose of support. They may also provide conduction of heat energy, and even possibly electrical energy. The primary and auxiliary bumps may be made of various materials, and do not need to be made of the same material, nor do they necessarily have to have equivalent heights or the same shape. Also, auxiliary bumps may be used in a wide variety of circuit and chip configurations. It is believed that the disclosure set forth above encompasses multiple distinct apparatus and processes with independent utility. While each of these disclosures has been disclosed in a particular form, the specific examples thereof as disclosed and illustrated herein are not to be considered in a limiting sense as numerous variations are possible. The subject matter of the disclosures includes all novel and non-obvious combinations and subcombinations of the various elements, features, functions and/or properties disclosed herein. Similarly, where the claims recite "a" or "a first" element or the equivalent thereof, such claims should be understood to include incorporation of one or more such elements, neither requiring nor excluding two or more such elements. It is believed that the following claims particularly point out certain combinations and subcombinations that correspond to disclosed examples and are novel and non- obvious. Other combinations and subcombinations of features, functions, elements and/or properties may be claimed through amendment of the present claims or presentation of new claims in this or a related application. Such amended or new claims, whether they are directed to different combinations or directed to the same combinations, whether different, broader, narrower or equal in scope to the original claims, are also regarded as included within the subject matter of the present disclosure.

Claims

CLAIMSWhat is claimed is:
1. An electrical circuit (10) comprising: a first circuit device (12) having a first mounting surface (20) including at least one first circuit contact (14); a second circuit device (38) having a second mounting surface (46) including at least one second circuit contact (32), the second mounting surface facing the first mounting surface; a conductive compressed interconnection (28) formed of a material suitable for compression bonding, and connected to and extending between a first circuit contact (14) and a second circuit contact (32); and at least one auxiliary element (40) also formed of a material suitable for compression bonding, positioned between the first and second mounting surfaces (20, 46) and spaced from the circuit contacts (14, 32).
2. The circuit (10) of claim 1 further comprising a plurality of interconnections (28) interconnecting a corresponding plurality of pairs of first and second circuit contacts (14, 32), and a plurality of the auxiliary elements (40) spaced from the circuit contacts (14, 32).
3. The circuit (10) of claim 2 of which the first mounting surface(20) has a center (50) and the first circuit contacts (14, 15, 16) are disposed predominantly on one side (24) of the center (50) of the first mounting surface (20), and the auxiliary elements (40, 41, 42) are disposed predominantly on another side (26) of the center (50) of the first mounting surface (20).
4. The circuit (10) of claim 3 of which there is an auxiliary element (40, 41, 42) associated with and generally opposite from each interconnection (30, 29, 28).
5. The circuit (10) of claim 2 of which the interconnections (28, 29, 30) are disposed one of centrally of the mounting surfaces (38, 58) and along the periphery (43) of the mounting surfaces (20, 46), and the auxiliary elements (40, 41, 42) are disposed the other of centrally of the mounting surfaces (38, 58) and along the periphery (43) of the mounting surfaces (38, 58).
6. The circuit (10) of claim 2 of which a centroid (50) of the combination of the plurality of interconnections (28, 29, 30) and the plurality of auxiliary elements (40, 41, 42) is more centrally located in the first mounting surface (20) than a centroid (29) of the plurality of interconnections (28, 29, 30).
7. The circuit (10) of claim 6 of which the centroid (50) of the combination of the plurality of interconnections (28, 29, 30) and the plurality of auxiliary elements (40, 41, 42) is located adjacent to a center (50) of the first mounting surface (20).
8. The circuit (10) of claim 7 of which the centroid (50) of the combination of the plurality of interconnections (28, 29, 30) and the plurality of auxiliary elements (40, 41, 42) is substantially coincident with the center (50) of the first mounting surface (20).
9. The circuit (10) of claim 2 of which the interconnections (28, 29, 30) are disposed away from at least a portion (26) of the periphery (43) of the mounting surfaces (20, 46), and the auxiliary elements (40, 41, 42) are disposed along the portion (26) of the periphery (43) of the mounting surfaces (20, 46).
10. The circuit (80) of claim 2 of which each interconnection (86, 88) and each auxiliary element (90) includes at least a first layer (102) having a given thickness (D3, D7).
11. The circuit (80) of claim 10 of which each interconnection (86, 88) further includes a second layer (104) of a material suitable for compression bonding.
12. A circuit (10) according to claim 1 of which there is an auxiliary element (40, 41, 42) disposed symmetrically about a center (50) of one of the first and second mounting surfaces (20, 46), relative to each interconnection (28, 29, 30).
13. A circuit (10) according to claim 1 of which the at least one auxiliary element (40) is not mechanically connected to one of the first and second mounting surfaces (20, 46), thereby allowing movement of the one mounting surface (20, 46) relative to the at least one auxiliary element (40).
14. A circuit (10) according to claim 1 of which a centroid (50) of the combination of the at least one interconnection (28, 29, 30) and the at least one auxiliary element (40, 41, 42) is more centrally located in the first mounting surface (20) than a centroid (29) of the at least one interconnection (28, 29, 30).
15. The circuit (80) of claim 1 of which each interconnection (86, 88) and each auxiliary element (90) includes at least a first layer (102) having substantially a given thickness (D3, D7).
16. The circuit (80) of claim 15 of which each interconnection (86, 88) further includes a second layer (104) of a material suitable for compression bonding.
17. The circuit (80) of claim 16 of which the second layer (104) is also substantially of the given thickness (D5).
18. The circuit (80) of claim 15 of which the at least a first layer (102) of each interconnection (86, 88) and each auxiliary element (90) is made of the same material.
19. An electrical circuit (10) comprising: a first circuit device (12) having a first mounting surface (20) with a center (50) and including at least one first circuit contact (14); a second circuit device (38) having a second mounting surface (46) including at least one second circuit contact (32), the second mounting surface (46) facing the first mounting surface (20); at least one circuit mounting element (28) connected to and extending between a first circuit contact (14) and a second circuit contact (32), the at least one circuit mounting element (28) mounting the first and second circuit devices (12, 38) together, the combination of the at least one circuit mounting element (28) being disposed predominantly on one side (24) of the center (50) of the first mounting surface (20); and at least one auxiliary mounting element (40) mounted onto at least one of the first and second mounting surfaces (20, 46), and the combination of the at least one auxiliary mounting element (40) being disposed predominantly on another side (26) of the center (50) of the first mounting surface (20).
20. The circuit (10) of claim 19 of which there is an auxiliary mounting element (40, 41, 42) associated with and generally opposite from each circuit mounting element (30, 29, 28).
21. The circuit (10) of claim 19 of which each first circuit contact (14) is spaced from a portion (26) of a periphery (43) of the first mounting surface (20), and at least one auxiliary mounting element (40) is disposed in the portion (26) of the periphery (43) of the first mounting surface (20).
22. The circuit (10) of claim 21 of which the portion (26) of the periphery (43) of the first mounting surface (20) includes a corner (20e).
23. The circuit (10) of claim 19 of which each circuit mounting element (28) is disposed one of centrally of the first mounting surface (20) and along the periphery (43) of the first mounting surface (20), and each auxiliary mounting element (40) is disposed the other of centrally of the first mounting surface (20) and along the periphery (43) of the first mounting surface (20).
24. The circuit (10) of claim 19 of which there are a plurality of circuit mounting elements (28, 29, 30) and a plurality of auxiliary mounting elements (40, 41, 42), a centroid (50) of the combination of the plurality of circuit mounting elements (28, 29, 30) and the plurality of auxiliary mounting elements (40, 41, 42) being more centrally located on the first mounting surface (20) than a centroid (29) of the plurality of circuit mounting elements (28, 29, 30).
25. The circuit (10) of claim 24 of which the centroid (50) of the combination of the plurality of circuit mounting elements (28, 29, 30) and the plurality of auxiliary mounting elements (40, 41, 42) is located adjacent to a center (50) of the first mounting surface (20).
26. The circuit (10) of claim 25 of which the centroid (50) of the combination of the plurality of circuit mounting elements (28, 29, 30) and the plurality of auxiliary mounting elements (40, 41, 42) is substantially coincident with the center (50) of the first mounting surface (20).
27. The circuit (10) of claim 20 of which the circuit mounting elements (28, 29, 30) are disposed away from at least a portion of the periphery (43) of the mounting surfaces (20, 46), and the auxiliary mounting elements (40, 41, 42) are disposed along the portion (26) of the periphery (43) of the mounting surfaces (20, 46).
28. An electrical circuit (10) comprising: a first circuit device (12) having a first mounting surface (20) including a plurality of first circuit contacts (14, 15, 16) disposed away from at least a portion (26) of the periphery (43) of the first mounting surface (20); a second circuit device (38) having a second mounting surface (46) including a plurality of second circuit contacts (32, 33, 34) disposed away from at least a portion (26) of the periphery (43) of the second mounting surface (46), the second mounting surface (46) facing the first mounting surface (20) with pairs of the first and second circuit contacts (14, 32; 15, 33; 16, 34) aligned; a plurality of conductive compressed interconnections (28, 29, 30) formed of a material suitable for compression bonding, the interconnections (28, 29 30) connected to and extending between respective pairs of first and second circuit contacts (14, 32; 15, 33; 16, 34); and a plurality of auxiliary elements (40, 41, 42) also formed of the material suitable for compression bonding, positioned between the first and second mounting surfaces (20, 46) and spaced from the circuit contacts (14, 15, 16, 32, 33, 34), the auxiliary elements (40, 41, 42) being disposed along the portion (26) of the periphery (43) of the mounting surfaces (20, 46), and a centroid (50) of the combination of the plurality of interconnections (28, 29, 30) and the plurality of auxiliary elements (40, 41, 42) being more centrally located in the first mounting surface (20) than a centroid (29) of the plurality of interconnections (28, 29, 30).
29. The circuit (80) of claim 28 of which each interconnection (86, 88) and each auxiliary element (90) includes at least a first layer (102) having substantially a given thickness (D3, D7), and each interconnection (86, 88) further includes a second layer (104) of a material suitable for compression bonding.
30. An electrical circuit (10) comprising: a first circuit device (12) having a first mounting surface (20) nd at least one first circuit contact (14) on the first mounting surface (20); a second circuit device (38) having a second mounting surface (46) including a second circuit contact (32) associated with each first circuit contact (14), the first and second circuit contacts (14, 32) forming at least one pair of associated first and second circuit contacts (14, 32); means (28) for electrically conductively interconnecting each pair of associated circuit contacts (14, 32) with compression bonding; and means (40) for maintaining the spacing between the first and second mounting surfaces (20, 46) in at least one location (26) spaced from the at least one pair of associated first and second circuit contacts (14, 32) with a material suitable for compression bonding.
31. The circuit (10) of claim 30 further comprising a plurality of pairs of associated first and second circuit contacts (14, 32; 15, 33; 16, 34), each respective circuit contact (14, 15, 16, 32, 33, 34) disposed predominantly on one side (24) of a center (50) of a respective one of the first and second mounting surfaces (20, 46), and a plurality of the means (40, 41, 42) for maintaining spacing disposed predominantly on the other side (26) of a center (50) of the one of the first and second mounting surfaces (20, 46).
32. A method of making an electrical circuit (10) comprising: forming a first circuit device (12) having a first mounting surface (20) and at least one first circuit contact (14) on the first mounting surface (20); forming a second circuit device (38) having a second mounting surface (46) including a second circuit contact (32) associated with a respective first circuit contact (14), the first and second circuit contacts (14, 32) forming at least one pair of associated circuit contacts (14, 32); placing an electrically conductive circuit mounting element (28) on one circuit (14) contact of each pair of associated circuit contacts (14, 32); placing each of at least one auxiliary mounting element (40) on a respective one (46) of the first and second mounting surfaces (20, 46) spaced from the at least one circuit contact (32) on the one mounting surface (46); positioning the first circuit device (12) relative to the second circuit device (38) with the first mounting surface (20) facing the second mounting surface (38), and with each circuit mounting element (28) extending between a pair of associated circuit contacts (14, 32), and with the at least one auxiliary mounting element (40) positioned between the first and second mounting surfaces (20, 46); and compressing each circuit mounting element (28) sufficiently for adhering each circuit mounting element (28) to the other circuit contact (32) associated with the one circuit contact (14).
33. The method of claim 32 in which forming the first and second circuit devices (12, 38) with the first and second mounting surfaces (20, 46) having a plurality of pairs of associated first and second circuit contacts (14, 32) disposed predominantly on one side (24) of a center (50) of each of the respective first and second mounting surfaces (20, 46), and placing the at least one auxiliary mounting element (40) includes placing each of a plurality of auxiliary mounting elements (40, 41, 42) relative to one of the first and second mounting surfaces (20, 46) predominantly on an other side (26) of the centers (50) of the first and second mounting surfaces (20, 46).
34. The method of claim 33 in which placing each auxiliary mounting element (40) includes placing each auxiliary mounting element (40) on the other side (26) of the respective center (50) opposite from a circuit contact (14).
35. The method of claim 32 in which forming the first and second circuit devices (12, 38) includes forming the first and second circuit devices (12, 38) with the circuit contacts (14, 32) disposed centrally of trie respective mounting surfaces (20, 46), and placing the at least one auxiliary mounting element (40) includes placing each of a plurality of auxiliary mounting elements (40, 41, 42) along the periphery (43) of at least one (20) of the first and second mounting surfaces (20, 46).
36. The method of claim 32 in which forming the first and second circuit devices (12, 38) includes forming the first and second mounting surfaces (20, 46) with a plurality of pairs of associated first and second circuit contacts (14, 32; 15, 33; 16, 34), placing a circuit mounting element (28) includes placing a plurality of circuit mounting elements (28, 29, 30), and placing the at least one auxiliary mounting element (40) includes placing each of a plurality of auxiliary mounting elements (40, 41, 42) relative to at least one of the first and second mounting surfaces (20, 46) such that a centroid (50) of the combination of the circuit mounting elements (28, 29, 30) and the auxiliary mounting elements (40, 41, 42), after compressing, is more centrally located on at least one of the first and second mounting surfaces (20, 38) than a centroid (29) of the circuit mounting elements (28, 29, 30).
37. The method of claim 36 in which placing the auxiliary mounting elements (40, 41, 42) includes placing the auxiliary mounting elements (40, 41, 42) such that a centroid (50) of the combination of the circuit mounting elements (28, 29, 30) and the auxiliary mounting elements (40, 41, 42), after compressing, is located adjacent to a center (50) of at least one (20) of the first and second mounting surfaces (20, 46).
38. The method of claim 37 in which placing the auxiliary mounting elements (40, 41, 42) includes placing the auxiliary mounting elements (40, 41, 42) such that a centroid (50) of the combination of the circuit mounting elements (28, 29, 30) and the auxiliary mounting elements (40, 41, 42), after compressing, is substantially coincident with the center (50) of the at least one (20) of the first and second mounting surfaces (20, 46).
39. The method of claim 32 in which forming a first circuit device (12) and forming a second circuit device (38) includes forming at least a portion (24) of the mounting surface (20) that is not the one mounting surface (46) on which the at least one auxiliary mounting element (40) is placed out of a material that does not readily adhere to at least a first auxiliary mounting element (40), the method further comprising, during compressing each circuit mounting element (28), pressing the first auxiliary mounting element (40) against the portion (24) of the mounting surface (20), whereby the portion (24) of the mounting surface (20) remains laterally movable relative to the first auxiliary mounting element (40).
40. The method of claim 32 further comprising making the at least one circuit mounting element (28) and the at least one auxiliary mounting element (40) out of the same material.
41. The method of claim 32 further comprising making at least a first circuit mounting element (86) with at least a first layer (102) having substantially the same thickness as the thickness of at least a first auxiliary mounting element (90).
42. The method of claim 41 in which making at least a first circuit mounting element (86) further includes making at least the first circuit mounting element (86) with a second layer (104) of a material suitable for compression bonding.
43. The method of claim 41 of which making at least a first circuit mounting element (86) further includes making at least the first circuit mounting element (86) with a second layer (104) substantially of the same thickness as the first layer (102).
44. The method of claim 32 further comprising making each circuit mounting element (86) and each auxiliary mounting element (90) with at least a first layer of the same material.
PCT/US2005/013400 2004-05-06 2005-04-20 Mounting with auxiliary bumps WO2005112113A2 (en)

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US7109583B2 (en) 2006-09-19
TW200901346A (en) 2009-01-01
TW200541002A (en) 2005-12-16
US20050248031A1 (en) 2005-11-10

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