WO2006016970A3 - High speed integrated circuit - Google Patents

High speed integrated circuit Download PDF

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Publication number
WO2006016970A3
WO2006016970A3 PCT/US2005/021531 US2005021531W WO2006016970A3 WO 2006016970 A3 WO2006016970 A3 WO 2006016970A3 US 2005021531 W US2005021531 W US 2005021531W WO 2006016970 A3 WO2006016970 A3 WO 2006016970A3
Authority
WO
WIPO (PCT)
Prior art keywords
driver
outputs
differential
integrated circuit
high speed
Prior art date
Application number
PCT/US2005/021531
Other languages
French (fr)
Other versions
WO2006016970A2 (en
Inventor
Richard Kao
Original Assignee
Richard Kao
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Richard Kao filed Critical Richard Kao
Priority to JP2007520325A priority Critical patent/JP2008506311A/en
Priority to EP05773377A priority patent/EP1782535A4/en
Priority to CN2005800300062A priority patent/CN101032077B/en
Priority to CA002573085A priority patent/CA2573085A1/en
Priority to TW096101614A priority patent/TWI330940B/en
Priority to TW094122753A priority patent/TWI324854B/en
Publication of WO2006016970A2 publication Critical patent/WO2006016970A2/en
Priority to US11/471,294 priority patent/US7554363B2/en
Priority to US11/471,463 priority patent/US7501858B2/en
Publication of WO2006016970A3 publication Critical patent/WO2006016970A3/en
Priority to US12/245,704 priority patent/US7679396B1/en
Priority to US12/459,035 priority patent/US8149013B2/en
Priority to US13/385,895 priority patent/US20120235706A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557—Coupling arrangements; Impedance matching circuits
    • H03K19/018571—Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS
    • H03K19/018578—Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS with at least one differential stage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Abstract

A novel driver circuit that uses a differential driver as a design backbone is described. Unlike a conventional differential interface, which typically has two or more outputs for providing an output signal and its complement, one of the differential driver's outputs is coupled to drive an output signal onto a signal line (22a), while another one of the differential driver's outputs is unused and terminated (22b), for instance by coupling the output to package ground or a voltage source via a capacitor. The performance of the driver circuit is significantly improved over conventional singled-ended driver designs.
PCT/US2005/021531 2004-07-07 2005-06-16 High speed integrated circuit WO2006016970A2 (en)

Priority Applications (11)

Application Number Priority Date Filing Date Title
JP2007520325A JP2008506311A (en) 2004-07-07 2005-06-16 High-speed integrated circuit
EP05773377A EP1782535A4 (en) 2004-07-07 2005-06-16 High speed integrated circuit
CN2005800300062A CN101032077B (en) 2004-07-07 2005-06-16 High speed integrated circuit
CA002573085A CA2573085A1 (en) 2004-07-07 2005-06-16 High speed integrated circuit
TW094122753A TWI324854B (en) 2004-07-07 2005-07-05 High speed integrated circuit
TW096101614A TWI330940B (en) 2004-07-07 2005-07-05 High speed integrated circuit
US11/471,294 US7554363B2 (en) 2004-07-07 2006-06-19 High speed integrated circuit
US11/471,463 US7501858B2 (en) 2004-07-07 2006-06-19 High speed integrated circuit
US12/245,704 US7679396B1 (en) 2004-07-07 2008-10-04 High speed integrated circuit
US12/459,035 US8149013B2 (en) 2004-07-07 2009-06-26 High speed integrated circuit
US13/385,895 US20120235706A1 (en) 2004-07-07 2012-03-13 High speed integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/887,363 2004-07-07
US10/887,363 US7102380B2 (en) 2004-07-07 2004-07-07 High speed integrated circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10/887,363 Continuation-In-Part US7102380B2 (en) 2004-07-07 2004-07-07 High speed integrated circuit

Related Child Applications (3)

Application Number Title Priority Date Filing Date
US10/887,363 Continuation US7102380B2 (en) 2004-07-07 2004-07-07 High speed integrated circuit
US11/471,294 Continuation US7554363B2 (en) 2004-07-07 2006-06-19 High speed integrated circuit
US11/471,463 Continuation US7501858B2 (en) 2004-07-07 2006-06-19 High speed integrated circuit

Publications (2)

Publication Number Publication Date
WO2006016970A2 WO2006016970A2 (en) 2006-02-16
WO2006016970A3 true WO2006016970A3 (en) 2006-10-26

Family

ID=35656464

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/021531 WO2006016970A2 (en) 2004-07-07 2005-06-16 High speed integrated circuit

Country Status (7)

Country Link
US (6) US7102380B2 (en)
EP (1) EP1782535A4 (en)
JP (1) JP2008506311A (en)
CN (2) CN101924549B (en)
CA (1) CA2573085A1 (en)
TW (2) TWI324854B (en)
WO (1) WO2006016970A2 (en)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4683833B2 (en) 2003-10-31 2011-05-18 株式会社半導体エネルギー研究所 Functional circuit and design method thereof
US7102380B2 (en) 2004-07-07 2006-09-05 Kao Richard F C High speed integrated circuit
US7224180B2 (en) * 2004-11-18 2007-05-29 Seiko Epson Corporation Methods and systems for rise-time improvements in differential signal outputs
US7522670B2 (en) * 2005-02-03 2009-04-21 International Business Machines Corporation Digital transmission circuit and method providing selectable power consumption via single-ended or differential operation
US7365570B2 (en) * 2005-05-25 2008-04-29 Micron Technology, Inc. Pseudo-differential output driver with high immunity to noise and jitter
JP4241772B2 (en) * 2005-07-20 2009-03-18 キヤノン株式会社 Printed circuit board and differential signal transmission structure
US7953162B2 (en) * 2006-11-17 2011-05-31 Intersil Americas Inc. Use of differential pair as single-ended data paths to transport low speed data
DE102006058889B3 (en) * 2006-12-04 2008-05-21 Atmel Germany Gmbh Signals flank formation method for use in bus system i.e. local interconnect network bus system, involves reducing rate of change of outputted signals, when high frequency noise signals on bus line is decreased
JP4946497B2 (en) * 2007-02-20 2012-06-06 富士通株式会社 Design apparatus, design method, and program
US20110024890A1 (en) 2007-06-29 2011-02-03 Stats Chippac, Ltd. Stackable Package By Using Internal Stacking Modules
US7733118B2 (en) * 2008-03-06 2010-06-08 Micron Technology, Inc. Devices and methods for driving a signal off an integrated circuit
EP2237419B1 (en) * 2009-03-31 2015-06-10 EqcoLogic N.V. Transceiver for single ended communication with low EMI
US8295056B2 (en) * 2009-07-22 2012-10-23 International Business Machines Corporation Silicon carrier structure and method of forming same
US8379701B2 (en) * 2010-03-16 2013-02-19 Micrel, Inc. High bandwidth dual programmable transmission line pre-emphasis method and circuit
US8379702B2 (en) * 2010-03-16 2013-02-19 Micrel, Inc. High bandwidth programmable transmission line pre-emphasis method and circuit
US8295336B2 (en) * 2010-03-16 2012-10-23 Micrel Inc. High bandwidth programmable transmission line pre-emphasis method and circuit
US9106329B2 (en) 2011-01-31 2015-08-11 Mediatek Inc. Apparatus for communicating another device
JP2013074560A (en) * 2011-09-29 2013-04-22 Elpida Memory Inc Logic circuit and data processing system
CN104115086B (en) * 2011-12-22 2017-11-07 英特尔公司 The non-linear termination of input/output architecture on packaging part
JP5910081B2 (en) * 2011-12-28 2016-04-27 富士通株式会社 Emphasis circuit
US9013425B2 (en) * 2012-02-23 2015-04-21 Cypress Semiconductor Corporation Method and apparatus for data transmission via capacitance sensing device
WO2014056201A1 (en) * 2012-10-12 2014-04-17 Mediatek Inc. Layout module for printed circuit board
CN102983811B (en) * 2012-11-23 2016-04-27 无锡中感微电子股份有限公司 A kind of pierce circuit
US8813016B1 (en) * 2013-01-28 2014-08-19 Taiwan Semiconductor Manufacturing Company Limited Multiple via connections using connectivity rings
US20140362482A1 (en) * 2013-06-06 2014-12-11 Media Tek Inc. Electrostatic discharge structure for enhancing robustness of charge device model and chip with the same
KR101414447B1 (en) * 2013-07-02 2014-07-08 옵티시스 주식회사 Dual mode Display-Port connector
WO2015118908A1 (en) * 2014-02-05 2015-08-13 ソニー株式会社 Transmitting apparatus, receiving apparatus, communication processing method, and cable
JP2016018628A (en) * 2014-07-07 2016-02-01 住友電気工業株式会社 Signal transmission cable
CN104135269A (en) * 2014-07-16 2014-11-05 北京无线电测量研究所 High-speed clock signal transmission system and method
JP2016066946A (en) * 2014-09-25 2016-04-28 住友電気工業株式会社 Signal transmission cable
US10679120B2 (en) * 2014-11-10 2020-06-09 International Business Machines Corporation Power driven synaptic network synthesis
US9490775B2 (en) * 2014-12-19 2016-11-08 International Business Machines Corporation Implementing adaptive control for optimization of pulsed resonant drivers
US10494106B2 (en) * 2015-05-11 2019-12-03 United Technologies Corporation Environmental cooling systems for aircraft
JP2017011613A (en) * 2015-06-25 2017-01-12 株式会社オートネットワーク技術研究所 Cable device and communication system
US10298010B2 (en) * 2016-03-31 2019-05-21 Qualcomm Incorporated Electrostatic discharge (ESD) isolated input/output (I/O) circuits
CN110249516B (en) 2017-02-03 2022-03-11 哈佛大学校长及研究员 Highly integrated high-voltage actuator driver
CN110932714B (en) * 2019-12-18 2023-05-16 吉林大学 Transmission interface circuit based on SUBLVDS

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6070211A (en) * 1997-06-11 2000-05-30 International Business Machines Corporation Driver/receiver circuitry for enhanced PCI bus with differential signaling
US6396329B1 (en) * 1999-10-19 2002-05-28 Rambus, Inc Method and apparatus for receiving high speed signals with low latency
US6836290B1 (en) * 1998-04-17 2004-12-28 Conexant Systems, Inc. Combined single-ended and differential signaling interface

Family Cites Families (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4575648A (en) * 1983-12-23 1986-03-11 At&T Bell Laboratories Complementary field effect transistor EXCLUSIVE OR logic gates
US4782300A (en) 1986-03-03 1988-11-01 International Business Machines Corporation Differential transceiver with line integrity detection
JP3031419B2 (en) 1990-06-13 2000-04-10 三菱電機株式会社 Semiconductor integrated circuit
US5121080A (en) 1990-12-21 1992-06-09 Crystal Semiconductor Corporation Amplifier with controlled output impedance
US5315175A (en) 1993-03-18 1994-05-24 Northern Telecom Limited Quasi-differential bus
US5382838A (en) 1993-03-18 1995-01-17 Northern Telecom Limited Digital driver with class AB output stage
US5687330A (en) 1993-06-18 1997-11-11 Digital Equipment Corporation Semiconductor process, power supply and temperature compensated system bus integrated interface architecture with precision receiver
US5479124A (en) 1993-08-20 1995-12-26 Nexgen Microsystems Slew rate controller for high speed bus
US5541957A (en) 1994-06-15 1996-07-30 National Semiconductor Corporation Apparatus for transmitting and/or receiving data at different data transfer rates especially in applications such as dual-rate ethernet local-area networks
JPH0818437A (en) * 1994-01-25 1996-01-19 Texas Instr Inc <Ti> Logical gate having accorded rise time and fall time and itsconstruction
US5440515A (en) 1994-03-08 1995-08-08 Motorola Inc. Delay locked loop for detecting the phase difference of two signals having different frequencies
US5714904A (en) 1994-06-06 1998-02-03 Sun Microsystems, Inc. High speed serial link for fully duplexed data communication
US5585763A (en) 1995-03-30 1996-12-17 Crystal Semiconductor Corporation Controlled impedance amplifier
US6060905A (en) * 1996-02-07 2000-05-09 International Business Machines Corporation Variable voltage, variable impedance CMOS off-chip driver and receiver interface and circuits
US5838723A (en) 1996-03-28 1998-11-17 Micro Linear Corporation Dual 10BASE-T and 100BASE-TX transmission termination circuit
US5963047A (en) * 1996-07-23 1999-10-05 Pericom Semiconductor Corp. Noise supression using neighbor-sensing for a CMOS output buffer with a large DC current sink
KR100254317B1 (en) * 1997-04-30 2000-09-01 윤종용 Operation cycle adaptive data output buffer
WO1998045719A1 (en) * 1997-04-04 1998-10-15 University Of Florida Method for testing and diagnosing mos transistors
US5949253A (en) 1997-04-18 1999-09-07 Adaptec, Inc. Low voltage differential driver with multiple drive strengths
US6459323B2 (en) * 1997-08-14 2002-10-01 Dolphin Interconnect Solutions As Interface isolator and method for communication of differential digital signals
US6163579A (en) 1998-03-04 2000-12-19 Analog Devices, Inc. Broadband modem transformer hybird
DE19821458C1 (en) * 1998-05-13 1999-11-18 Siemens Ag Circuit arrangement for generating complementary signals
US6448812B1 (en) * 1998-06-11 2002-09-10 Infineon Technologies North America Corp. Pull up/pull down logic for holding a defined value during power down mode
US6433579B1 (en) * 1998-07-02 2002-08-13 Altera Corporation Programmable logic integrated circuit devices with differential signaling capabilities
US6128858A (en) * 1998-07-06 2000-10-10 Truth Hardware Corporation Window operator with locking worm drive system
US6721379B1 (en) 1998-09-25 2004-04-13 International Business Machines Corporation DAC/Driver waveform generator with phase lock rise time control
US6100717A (en) 1998-10-16 2000-08-08 Motorola Inc. Line driver circuit with reduced power consumption
US6678721B1 (en) 1998-11-18 2004-01-13 Globespanvirata, Inc. System and method for establishing a point-to-multipoint DSL network
US6252419B1 (en) * 1999-01-08 2001-06-26 Altera Corporation LVDS interface incorporating phase-locked loop circuitry for use in programmable logic device
US6218858B1 (en) * 1999-01-27 2001-04-17 Xilinx, Inc. Programmable input/output circuit for FPGA for use in TTL, GTL, GTLP, LVPECL and LVDS circuits
US6211719B1 (en) 1999-04-19 2001-04-03 Globespan Semiconductor Inc. Power control circuit for a line driver
CN1173405C (en) * 1999-05-06 2004-10-27 松下电器产业株式会社 CMOS semiconductor integral circuit
EP1073232A1 (en) 1999-07-27 2001-01-31 Koninklijke Philips Electronics N.V. Bidirectional interface
US6218872B1 (en) 1999-12-23 2001-04-17 Orckit Communications Ltd. Line driver with output impedance synthesis
US6373277B1 (en) 2001-02-22 2002-04-16 Sigmatel, Inc Line driver having variable impedance termination
US6624670B2 (en) * 2001-03-21 2003-09-23 Texas Instruments Incorporated High speed voltage mode differential digital output driver with edge-emphasis and pre-equalization
US6724219B1 (en) 2001-06-15 2004-04-20 Lsi Logic Corporation Amplifier and line driver for broadband communications
JP4627928B2 (en) * 2001-06-28 2011-02-09 ルネサスエレクトロニクス株式会社 Semiconductor integrated circuit
US6552582B1 (en) * 2001-09-27 2003-04-22 Applied Micro Circuits Corporation Source follower for low voltage differential signaling
US6744276B1 (en) * 2002-01-31 2004-06-01 Grass Valley (Us), Inc. Serial digital audio data port with multiple functional configurations
US6683472B2 (en) * 2002-02-19 2004-01-27 Rambus Inc. Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
KR100468728B1 (en) * 2002-04-19 2005-01-29 삼성전자주식회사 On-chip terminator, Control circuit there-of and Control method there-of in semiconductor integrated circuit
US6815980B2 (en) * 2003-02-27 2004-11-09 International Business Machines Corporation Termination circuit for a differential transmission line
ITRM20030085A1 (en) 2003-02-27 2004-08-28 Micron Technology Inc VARIABLE IMPEDANCE OUTPUT BUFFER.
US6856178B1 (en) * 2003-07-31 2005-02-15 Silicon Bridge, Inc. Multi-function input/output driver
US6828833B1 (en) 2003-09-15 2004-12-07 Phaselink Corporation Clipped complementary metal-oxide semiconductor
US7102380B2 (en) 2004-07-07 2006-09-05 Kao Richard F C High speed integrated circuit
US7208984B1 (en) 2004-07-15 2007-04-24 Linear Technology Corporation CMOS driver with minimum shoot-through current

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6070211A (en) * 1997-06-11 2000-05-30 International Business Machines Corporation Driver/receiver circuitry for enhanced PCI bus with differential signaling
US6836290B1 (en) * 1998-04-17 2004-12-28 Conexant Systems, Inc. Combined single-ended and differential signaling interface
US6396329B1 (en) * 1999-10-19 2002-05-28 Rambus, Inc Method and apparatus for receiving high speed signals with low latency

Also Published As

Publication number Publication date
US20060290376A1 (en) 2006-12-28
CN101924549B (en) 2012-07-04
EP1782535A4 (en) 2009-04-22
US20070007993A1 (en) 2007-01-11
US20060290375A1 (en) 2006-12-28
TW200737713A (en) 2007-10-01
CN101032077B (en) 2010-06-23
JP2008506311A (en) 2008-02-28
US7501858B2 (en) 2009-03-10
US7501857B2 (en) 2009-03-10
TW200625804A (en) 2006-07-16
US7554363B2 (en) 2009-06-30
EP1782535A2 (en) 2007-05-09
WO2006016970A2 (en) 2006-02-16
TWI324854B (en) 2010-05-11
US20100090722A1 (en) 2010-04-15
US20060017462A1 (en) 2006-01-26
CN101032077A (en) 2007-09-05
TWI330940B (en) 2010-09-21
US7102380B2 (en) 2006-09-05
CA2573085A1 (en) 2006-02-16
US20120235706A1 (en) 2012-09-20
US8149013B2 (en) 2012-04-03
CN101924549A (en) 2010-12-22

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