WO2006132939A3 - Robust index storage for non-volatile memory - Google Patents

Robust index storage for non-volatile memory Download PDF

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Publication number
WO2006132939A3
WO2006132939A3 PCT/US2006/021364 US2006021364W WO2006132939A3 WO 2006132939 A3 WO2006132939 A3 WO 2006132939A3 US 2006021364 W US2006021364 W US 2006021364W WO 2006132939 A3 WO2006132939 A3 WO 2006132939A3
Authority
WO
WIPO (PCT)
Prior art keywords
address translation
data
volatile memory
hierarchal
stored
Prior art date
Application number
PCT/US2006/021364
Other languages
French (fr)
Other versions
WO2006132939A2 (en
Inventor
Wanmo Wong
Original Assignee
Micron Technology Inc
Wanmo Wong
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc, Wanmo Wong filed Critical Micron Technology Inc
Publication of WO2006132939A2 publication Critical patent/WO2006132939A2/en
Publication of WO2006132939A3 publication Critical patent/WO2006132939A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Abstract

A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non- volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures/tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables/data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation.
PCT/US2006/021364 2005-06-08 2006-06-02 Robust index storage for non-volatile memory WO2006132939A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/148,028 2005-06-08
US11/148,028 US7509474B2 (en) 2005-06-08 2005-06-08 Robust index storage for non-volatile memory

Publications (2)

Publication Number Publication Date
WO2006132939A2 WO2006132939A2 (en) 2006-12-14
WO2006132939A3 true WO2006132939A3 (en) 2007-03-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/021364 WO2006132939A2 (en) 2005-06-08 2006-06-02 Robust index storage for non-volatile memory

Country Status (3)

Country Link
US (5) US7509474B2 (en)
TW (1) TWI319530B (en)
WO (1) WO2006132939A2 (en)

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Publication number Publication date
US8135939B2 (en) 2012-03-13
US8019967B2 (en) 2011-09-13
US7509474B2 (en) 2009-03-24
TW200710654A (en) 2007-03-16
US20110307651A1 (en) 2011-12-15
US7734891B2 (en) 2010-06-08
TWI319530B (en) 2010-01-11
US20100241798A1 (en) 2010-09-23
US20060282644A1 (en) 2006-12-14
US8316209B2 (en) 2012-11-20
US20090172342A1 (en) 2009-07-02
US20120166759A1 (en) 2012-06-28
WO2006132939A2 (en) 2006-12-14

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