WO2006135861B1 - Power semiconductor device - Google Patents

Power semiconductor device

Info

Publication number
WO2006135861B1
WO2006135861B1 PCT/US2006/022804 US2006022804W WO2006135861B1 WO 2006135861 B1 WO2006135861 B1 WO 2006135861B1 US 2006022804 W US2006022804 W US 2006022804W WO 2006135861 B1 WO2006135861 B1 WO 2006135861B1
Authority
WO
WIPO (PCT)
Prior art keywords
region
insulation
semiconductor device
power semiconductor
field
Prior art date
Application number
PCT/US2006/022804
Other languages
French (fr)
Other versions
WO2006135861A3 (en
WO2006135861A2 (en
Inventor
Hugo R G Burge
Simon Green
Original Assignee
Int Rectifier Corp
Hugo R G Burge
Simon Green
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Rectifier Corp, Hugo R G Burge, Simon Green filed Critical Int Rectifier Corp
Publication of WO2006135861A2 publication Critical patent/WO2006135861A2/en
Publication of WO2006135861A3 publication Critical patent/WO2006135861A3/en
Publication of WO2006135861B1 publication Critical patent/WO2006135861B1/en
Priority to GB0724091A priority Critical patent/GB2455510A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/408—Electrodes ; Multistep manufacturing processes therefor with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor

Abstract

A power semiconductor device that includes a plurality of gate structure each having a gate insulation of a first thickness, and a termination region, the termination including a field insulation body surrounding the active region and having a recess that includes a bottom insulation thicker than the first thickness.

Claims

AMENDED CLAIMS received by the International Bureau on 29 March 2007 (29.03.07)
1. A power semiconductor device comprising: an active region, said active region including a plurality of gate structures each having a gate insulation of a first thickness; a termination region, said termination including a field insulation body surrounding said active region, said Geld insulation body having a recess formed therein said recess having a bottom insulation of a second thickness that is thicker than said first thickness; a conductive body formed in said recess on said bottom insulation; and a PN region disposed under said bottom insulation, wherein PN region extends below said field plate structure and into said active region.
2. A power semiconductor device according to claim 1, further comprising a field plate structure adjacent said field insulation body and said active region, said field plate region including a field plate insulation body thicker than said first thickness, and a conductive field plate body disposed over said field plate insulation body.
3. Canceled
4. A power semiconductor device according to claim 3, wherein said region includes at least one source region an a source electrode ohmically connected to said source region.
5. A power semiconductor device according to claim 1, wherein said first thickness is less than 1000 angstroms and said second thickness is less than 3000 angstroms.
6. A power semiconductor device according to claim 2, wherein said first thickness is less than 1000 angstroms and said field plate insulation body is less than 3000 angstroms.
7. A power semiconductor device according to claim 1, wherein said field insulation body is a field oxide having a first density and said bottom insulation is comprised of a grown oxide having a second density, said first density being less than said second density.
8. A power semiconductor device according to claim 2, wherein said field insulation body is a field oxide having a first density and said field plate insulation body is comprised of a grown oxide having a second density, said first density being less than said second density.
9. A power semiconductor device according to claim I, wherein said PN region includes a region of one conductivity foτmed in a region of another conductivity, said region of one conductivity being disposed directly under said bottom insulation, wherein said bottom insulation includes conductive impurities of said one conductivity.
10. A power semiconductor device according to claim I, wherein, said PN region includes a region of one conductivity formed in a region of another conductivity, said region of one conductivity being disposed directly under said field plate insulation body, wherein said field plate insulation body insulation includes conductive impurities of said one conductivity.
11. A power semiconductor device according to claim I, further comprising a metallic body in ohmic contact with said conductive body in said recess.
12. A power semiconductor device according to claim 2, wherein said conductive body in said recess and said field plate conductive body are comprised of conductive polysilicon.
13. A method for manufacturing a power semiconductor device, comprising: depositing a field oxide body on a surface of a semiconductor body of a first conductivity; forming an opening in said field oxide body whereby a portion of said semiconductor body is exposed; implanting dopants of a second conductivity in said semiconductor body through said opening in said field oxide body; growing an oxide body on said semiconductor body having a first thickness; removing a portion of said field oxide body to define an active region; growing a gate oxide body over said defined active region, said gate oxide having a second thickness less than said first thickness; depositing polysilicon over said gate oxide body and inside said opening; and removing portions of said polysilicon to define a plurality of gate electrodes, and a conductive body inside said opening.
14. The method of claim 13, further comprising forming another opening in said field oxide body exposing another portion of said semiconductor body, implanting dopants of said second conductivity in said semiconductor body through said another opening, and growing another oxide body over said second portion.
PCT/US2006/022804 2005-06-10 2006-06-12 Power semiconductor device WO2006135861A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0724091A GB2455510A (en) 2006-06-12 2007-12-10 Power semiconductor device

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US68929305P 2005-06-10 2005-06-10
US60/689,293 2005-06-10
US11/449,940 US7385273B2 (en) 2005-06-10 2006-06-09 Power semiconductor device
US11/449,940 2006-06-09

Publications (3)

Publication Number Publication Date
WO2006135861A2 WO2006135861A2 (en) 2006-12-21
WO2006135861A3 WO2006135861A3 (en) 2007-05-18
WO2006135861B1 true WO2006135861B1 (en) 2007-07-05

Family

ID=37532875

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/022804 WO2006135861A2 (en) 2005-06-10 2006-06-12 Power semiconductor device

Country Status (3)

Country Link
US (1) US7385273B2 (en)
TW (1) TW200705573A (en)
WO (1) WO2006135861A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501669B2 (en) 2003-09-09 2009-03-10 Cree, Inc. Wide bandgap transistor devices with field plates
US9773877B2 (en) 2004-05-13 2017-09-26 Cree, Inc. Wide bandgap field effect transistors with source connected field plates
US11791385B2 (en) 2005-03-11 2023-10-17 Wolfspeed, Inc. Wide bandgap transistors with gate-source field plates
US9847411B2 (en) * 2013-06-09 2017-12-19 Cree, Inc. Recessed field plate transistor structures
US9755059B2 (en) 2013-06-09 2017-09-05 Cree, Inc. Cascode structures with GaN cap layers
US9679981B2 (en) 2013-06-09 2017-06-13 Cree, Inc. Cascode structures for GaN HEMTs

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4290078A (en) * 1979-05-30 1981-09-15 Xerox Corporation High voltage MOSFET without field plate structure
US4680853A (en) * 1980-08-18 1987-07-21 International Rectifier Corporation Process for manufacture of high power MOSFET with laterally distributed high carrier density beneath the gate oxide
US4399449A (en) * 1980-11-17 1983-08-16 International Rectifier Corporation Composite metal and polysilicon field plate structure for high voltage semiconductor devices
US4789882A (en) * 1983-03-21 1988-12-06 International Rectifier Corporation High power MOSFET with direct connection from connection pads to underlying silicon
IT1272567B (en) * 1992-09-15 1997-06-23 Int Rectifier Corp Power transistor having an ultradeep region of improved concentration
US5474946A (en) * 1995-02-17 1995-12-12 International Rectifier Corporation Reduced mask process for manufacture of MOS gated devices
US5869371A (en) * 1995-06-07 1999-02-09 Stmicroelectronics, Inc. Structure and process for reducing the on-resistance of mos-gated power devices
US6104060A (en) * 1996-02-20 2000-08-15 Megamos Corporation Cost savings for manufacturing planar MOSFET devices achieved by implementing an improved device structure and fabrication process eliminating passivation layer and/or field plate
US6784489B1 (en) * 1997-03-28 2004-08-31 Stmicroelectronics, Inc. Method of operating a vertical DMOS transistor with schottky diode body structure
US6602759B2 (en) * 2000-12-07 2003-08-05 International Business Machines Corporation Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon
US6893923B2 (en) 2001-03-21 2005-05-17 International Rectifier Corporation Reduced mask count process for manufacture of mosgated device
US6563197B1 (en) * 2001-11-20 2003-05-13 International Rectifier Corporation MOSgated device termination with guard rings under field plate

Also Published As

Publication number Publication date
TW200705573A (en) 2007-02-01
US7385273B2 (en) 2008-06-10
US20060286732A1 (en) 2006-12-21
WO2006135861A3 (en) 2007-05-18
WO2006135861A2 (en) 2006-12-21

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