WO2007016302A3 - Direct-update software transactional memory - Google Patents

Direct-update software transactional memory Download PDF

Info

Publication number
WO2007016302A3
WO2007016302A3 PCT/US2006/029327 US2006029327W WO2007016302A3 WO 2007016302 A3 WO2007016302 A3 WO 2007016302A3 US 2006029327 W US2006029327 W US 2006029327W WO 2007016302 A3 WO2007016302 A3 WO 2007016302A3
Authority
WO
WIPO (PCT)
Prior art keywords
transaction
memory
thread
memory location
directly
Prior art date
Application number
PCT/US2006/029327
Other languages
French (fr)
Other versions
WO2007016302A2 (en
Inventor
Timothy L Harris
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to BRPI0613946-9A priority Critical patent/BRPI0613946A2/en
Priority to MX2008001159A priority patent/MX2008001159A/en
Priority to EP06788738.0A priority patent/EP1910929B1/en
Priority to CN200680026687XA priority patent/CN101495976B/en
Priority to KR1020087002433A priority patent/KR101203297B1/en
Priority to CA002616422A priority patent/CA2616422A1/en
Application filed by Microsoft Corp filed Critical Microsoft Corp
Priority to JP2008524174A priority patent/JP5010601B2/en
Priority to AU2006275736A priority patent/AU2006275736A1/en
Publication of WO2007016302A2 publication Critical patent/WO2007016302A2/en
Priority to IL188665A priority patent/IL188665A0/en
Priority to NO20080235A priority patent/NO20080235L/en
Publication of WO2007016302A3 publication Critical patent/WO2007016302A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G06F9/467—Transactional memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00—Data processing: database and file management or data structures
    • Y10S707/99931—Database or file accessing
    • Y10S707/99938—Concurrency, e.g. lock management in shared database
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00—Data processing: database and file management or data structures
    • Y10S707/99931—Database or file accessing
    • Y10S707/99939—Privileged access

Abstract

A transactional memory programming interface allows a thread to directly and safely access one or more shared memory locations within a transaction while maintaining control structures to manage memory accesses to those same locations by one or more other concurrent threads. Each memory location accessed by the thread is associated with an enlistment record, and each thread maintains a transaction log of its memory accesses. Within a transaction, a read operation is performed directly on the memory location, and a write operation is attempted directly on the memory location, as opposed to some intermediate buffer. The thread can detect inconsistencies between the enlistment record of a memory location and the thread's transaction log to determine whether the memory accesses within the transaction are not reliable and the transaction should be re-tried.
PCT/US2006/029327 2005-07-29 2006-07-28 Direct-update software transactional memory WO2007016302A2 (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
MX2008001159A MX2008001159A (en) 2005-07-29 2006-07-28 Direct-update software transactional memory.
EP06788738.0A EP1910929B1 (en) 2005-07-29 2006-07-28 Direct-update software transactional memory
CN200680026687XA CN101495976B (en) 2005-07-29 2006-07-28 Direct-update software transactional memory
KR1020087002433A KR101203297B1 (en) 2005-07-29 2006-07-28 Direct update software transactional memory
CA002616422A CA2616422A1 (en) 2005-07-29 2006-07-28 Direct-update software transactional memory
BRPI0613946-9A BRPI0613946A2 (en) 2005-07-29 2006-07-28 direct update software transactional memory
JP2008524174A JP5010601B2 (en) 2005-07-29 2006-07-28 Direct update software transactional memory
AU2006275736A AU2006275736A1 (en) 2005-07-29 2006-07-28 Direct-update software transactional memory
IL188665A IL188665A0 (en) 2005-07-29 2008-01-08 Direct-update software transactional memory
NO20080235A NO20080235L (en) 2005-07-29 2008-01-15 Software for instant transaction memory updating

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/192,784 US7536517B2 (en) 2005-07-29 2005-07-29 Direct-update software transactional memory
US11/192,784 2005-07-29

Publications (2)

Publication Number Publication Date
WO2007016302A2 WO2007016302A2 (en) 2007-02-08
WO2007016302A3 true WO2007016302A3 (en) 2009-04-16

Family

ID=37695711

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/029327 WO2007016302A2 (en) 2005-07-29 2006-07-28 Direct-update software transactional memory

Country Status (13)

Country Link
US (1) US7536517B2 (en)
EP (1) EP1910929B1 (en)
JP (1) JP5010601B2 (en)
KR (1) KR101203297B1 (en)
CN (1) CN101495976B (en)
AU (1) AU2006275736A1 (en)
BR (1) BRPI0613946A2 (en)
CA (1) CA2616422A1 (en)
IL (1) IL188665A0 (en)
MX (1) MX2008001159A (en)
NO (1) NO20080235L (en)
RU (1) RU2008103273A (en)
WO (1) WO2007016302A2 (en)

Families Citing this family (84)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7818513B2 (en) * 2004-08-10 2010-10-19 Oracle America, Inc. Coordinating accesses to shared objects using transactional memory mechanisms and non-transactional software mechanisms
US8261024B1 (en) * 2005-09-15 2012-09-04 Oracle America, Inc. Address level synchronization of shared data
US7630991B2 (en) * 2005-10-27 2009-12-08 Microsoft Corporation Compiling join patterns using software transactional memories
US8799882B2 (en) * 2005-12-07 2014-08-05 Microsoft Corporation Compiler support for optimizing decomposed software transactional memory operations
US8266609B2 (en) * 2005-12-07 2012-09-11 Microsoft Corporation Efficient placement of software transactional memory operations around procedure calls
US8271994B2 (en) * 2006-02-11 2012-09-18 International Business Machines Corporation Reduced data transfer during processor context switching
US8065499B2 (en) * 2006-02-22 2011-11-22 Oracle America, Inc. Methods and apparatus to implement parallel transactions
US8028133B2 (en) * 2006-02-22 2011-09-27 Oracle America, Inc. Globally incremented variable or clock based methods and apparatus to implement parallel transactions
US8181158B2 (en) * 2006-06-09 2012-05-15 Oracle America, Inc. Viewing and modifying transactional variables
US8316352B2 (en) * 2006-06-09 2012-11-20 Oracle America, Inc. Watchpoints on transactional variables
US8601456B2 (en) * 2006-08-04 2013-12-03 Microsoft Corporation Software transactional protection of managed pointers
US7788242B2 (en) * 2006-08-23 2010-08-31 Oracle America, Inc. Method and system for implementing a concurrent set of objects
US8024714B2 (en) 2006-11-17 2011-09-20 Microsoft Corporation Parallelizing sequential frameworks using transactions
US7860847B2 (en) 2006-11-17 2010-12-28 Microsoft Corporation Exception ordering in contention management to support speculative sequential semantics
US8010550B2 (en) * 2006-11-17 2011-08-30 Microsoft Corporation Parallelizing sequential frameworks using transactions
US8132158B2 (en) * 2006-12-28 2012-03-06 Cheng Wang Mechanism for software transactional memory commit/abort in unmanaged runtime environment
US7908255B2 (en) * 2007-04-11 2011-03-15 Microsoft Corporation Transactional memory using buffered writes and enforced serialization order
US8621468B2 (en) * 2007-04-26 2013-12-31 Microsoft Corporation Multi core optimizations on a binary using static and run time analysis
US8117403B2 (en) * 2007-05-14 2012-02-14 International Business Machines Corporation Transactional memory system which employs thread assists using address history tables
US8095750B2 (en) * 2007-05-14 2012-01-10 International Business Machines Corporation Transactional memory system with fast processing of common conflicts
US9009452B2 (en) * 2007-05-14 2015-04-14 International Business Machines Corporation Computing system with transactional memory using millicode assists
US8688920B2 (en) 2007-05-14 2014-04-01 International Business Machines Corporation Computing system with guest code support of transactional memory
US8321637B2 (en) * 2007-05-14 2012-11-27 International Business Machines Corporation Computing system with optimized support for transactional memory
US8095741B2 (en) * 2007-05-14 2012-01-10 International Business Machines Corporation Transactional memory computing system with support for chained transactions
US8719514B2 (en) * 2007-06-27 2014-05-06 Intel Corporation Software filtering in a transactional memory system
US7890725B2 (en) * 2007-07-09 2011-02-15 International Business Machines Corporation Bufferless transactional memory with runahead execution
US20090064141A1 (en) * 2007-08-29 2009-03-05 Microsoft Corporation Efficient utilization of transactions in computing tasks
US8245232B2 (en) * 2007-11-27 2012-08-14 Microsoft Corporation Software-configurable and stall-time fair memory access scheduling mechanism for shared memory systems
US7793052B2 (en) * 2007-12-31 2010-09-07 Oracle America, Inc. System and method for implementing hybrid single-compare-single-store operations
US8200914B2 (en) * 2008-01-03 2012-06-12 International Business Machines Corporation Apparatus, system, and method for a read-before-write storage controller instruction
US8359437B2 (en) * 2008-05-13 2013-01-22 International Business Machines Corporation Virtual computing memory stacking
US8839213B2 (en) 2008-06-27 2014-09-16 Microsoft Corporation Optimizing primitives in software transactional memory
US8341133B2 (en) 2008-06-27 2012-12-25 Microsoft Corporation Compressed transactional locks in object headers
US8769514B2 (en) * 2008-06-27 2014-07-01 Microsoft Corporation Detecting race conditions with a software transactional memory system
US9047139B2 (en) * 2008-06-27 2015-06-02 Microsoft Technology Licensing, Llc Primitives for software transactional memory
US20100017581A1 (en) * 2008-07-18 2010-01-21 Microsoft Corporation Low overhead atomic memory operations
US8627292B2 (en) * 2009-02-13 2014-01-07 Microsoft Corporation STM with global version overflow handling
JP5433676B2 (en) * 2009-02-24 2014-03-05 パナソニック株式会社 Processor device, multi-thread processor device
US8688921B2 (en) * 2009-03-03 2014-04-01 Microsoft Corporation STM with multiple global version counters
JP5338435B2 (en) * 2009-03-31 2013-11-13 富士通株式会社 Information processing program, information processing apparatus, and information processing method
US20120117317A1 (en) * 2009-08-20 2012-05-10 Rambus Inc. Atomic memory device
US8566524B2 (en) 2009-08-31 2013-10-22 International Business Machines Corporation Transactional memory system with efficient cache support
US8239635B2 (en) 2009-09-30 2012-08-07 Oracle America, Inc. System and method for performing visible and semi-visible read operations in a software transactional memory
US9104715B2 (en) 2010-06-23 2015-08-11 Microsoft Technology Licensing, Llc Shared data collections
US8595426B2 (en) * 2011-04-11 2013-11-26 Sandisk Il Ltd. Handling commands within a write-once read-many storage device configuration
US9043363B2 (en) * 2011-06-03 2015-05-26 Oracle International Corporation System and method for performing memory management using hardware transactions
US9164753B2 (en) 2013-01-08 2015-10-20 Sap Se Generating software updates
US20160239372A1 (en) * 2013-09-26 2016-08-18 Hewlett Packard Enterprise Development Lp Undoing changes made by threads
US9524195B2 (en) 2014-02-27 2016-12-20 International Business Machines Corporation Adaptive process for data sharing with selection of lock elision and locking
US9575890B2 (en) 2014-02-27 2017-02-21 International Business Machines Corporation Supporting atomic accumulation with an addressable accumulator
US9411729B2 (en) 2014-02-27 2016-08-09 International Business Machines Corporation Salvaging lock elision transactions
US9645879B2 (en) 2014-02-27 2017-05-09 International Business Machines Corporation Salvaging hardware transactions with instructions
US9329946B2 (en) 2014-02-27 2016-05-03 International Business Machines Corporation Salvaging hardware transactions
US9442775B2 (en) 2014-02-27 2016-09-13 International Business Machines Corporation Salvaging hardware transactions with instructions to transfer transaction execution control
US9336097B2 (en) 2014-02-27 2016-05-10 International Business Machines Corporation Salvaging hardware transactions
US9442853B2 (en) 2014-02-27 2016-09-13 International Business Machines Corporation Salvaging lock elision transactions with instructions to change execution type
US9471371B2 (en) 2014-02-27 2016-10-18 International Business Machines Corporation Dynamic prediction of concurrent hardware transactions resource requirements and allocation
US9311178B2 (en) 2014-02-27 2016-04-12 International Business Machines Corporation Salvaging hardware transactions with instructions
US9262206B2 (en) 2014-02-27 2016-02-16 International Business Machines Corporation Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environments
US9424072B2 (en) 2014-02-27 2016-08-23 International Business Machines Corporation Alerting hardware transactions that are about to run out of space
US9430273B2 (en) 2014-02-27 2016-08-30 International Business Machines Corporation Suppressing aborting a transaction beyond a threshold execution duration based on the predicted duration
US9361041B2 (en) 2014-02-27 2016-06-07 International Business Machines Corporation Hint instruction for managing transactional aborts in transactional memory computing environments
US20150242216A1 (en) 2014-02-27 2015-08-27 International Business Machines Corporation Committing hardware transactions that are about to run out of resource
US9465673B2 (en) 2014-02-27 2016-10-11 International Business Machines Corporation Deferral instruction for managing transactional aborts in transactional memory computing environments to complete transaction by deferring disruptive events handling
US9524187B2 (en) 2014-03-02 2016-12-20 International Business Machines Corporation Executing instruction with threshold indicating nearing of completion of transaction
US9448939B2 (en) 2014-06-30 2016-09-20 International Business Machines Corporation Collecting memory operand access characteristics during transactional execution
US9348643B2 (en) 2014-06-30 2016-05-24 International Business Machines Corporation Prefetching of discontiguous storage locations as part of transactional execution
US9600286B2 (en) 2014-06-30 2017-03-21 International Business Machines Corporation Latent modification instruction for transactional execution
US9710271B2 (en) 2014-06-30 2017-07-18 International Business Machines Corporation Collecting transactional execution characteristics during transactional execution
US9336047B2 (en) 2014-06-30 2016-05-10 International Business Machines Corporation Prefetching of discontiguous storage locations in anticipation of transactional execution
US9754001B2 (en) 2014-08-18 2017-09-05 Richard Banister Method of integrating remote databases by automated client scoping of update requests prior to download via a communications network
US9665280B2 (en) * 2014-09-30 2017-05-30 International Business Machines Corporation Cache coherency verification using ordered lists
US10540524B2 (en) * 2014-12-31 2020-01-21 Mcafee, Llc Memory access protection using processor transactional memory support
US10838983B2 (en) 2015-01-25 2020-11-17 Richard Banister Method of integrating remote databases by parallel update requests over a communications network
CN105045563B (en) * 2015-06-19 2017-10-10 陕西科技大学 A kind of method for collision management for speculating nested software transaction storage
US10990586B2 (en) 2015-09-16 2021-04-27 Richard Banister System and method for revising record keys to coordinate record key changes within at least two databases
US10838827B2 (en) 2015-09-16 2020-11-17 Richard Banister System and method for time parameter based database restoration
US10003634B2 (en) * 2016-05-14 2018-06-19 Richard Banister Multi-threaded download with asynchronous writing
US10860246B2 (en) 2016-12-21 2020-12-08 Hewlett-Packard Development Company, L.P. Persistent memory updating
EP3610373B1 (en) 2017-04-19 2022-03-30 Huawei Technologies Co., Ltd. Updating metadata in hardware transactional memory user aborts
CN110546609B (en) * 2017-04-19 2022-06-14 华为技术有限公司 Method and system for assisting database transaction by Hardware Transactional Memory (HTM)
US10521116B2 (en) * 2018-01-23 2019-12-31 Nutanix, Inc. System and method for managing object store
US10445238B1 (en) * 2018-04-24 2019-10-15 Arm Limited Robust transactional memory
US11194769B2 (en) 2020-04-27 2021-12-07 Richard Banister System and method for re-synchronizing a portion of or an entire source database and a target database

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5983225A (en) * 1998-01-26 1999-11-09 Telenor As Parameterized lock management system and method for conditional conflict serializability of transactions
US6586993B2 (en) * 2000-11-08 2003-07-01 Research In Motion Limited Impedance matching low noise amplifier having a bypass switch

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6856993B1 (en) * 2000-03-30 2005-02-15 Microsoft Corporation Transactional file system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5983225A (en) * 1998-01-26 1999-11-09 Telenor As Parameterized lock management system and method for conditional conflict serializability of transactions
US6586993B2 (en) * 2000-11-08 2003-07-01 Research In Motion Limited Impedance matching low noise amplifier having a bypass switch

Also Published As

Publication number Publication date
CA2616422A1 (en) 2007-02-08
EP1910929A4 (en) 2010-12-08
EP1910929B1 (en) 2016-02-17
KR20080031039A (en) 2008-04-07
AU2006275736A1 (en) 2007-02-08
JP5010601B2 (en) 2012-08-29
JP2009506403A (en) 2009-02-12
WO2007016302A2 (en) 2007-02-08
NO20080235L (en) 2008-02-28
BRPI0613946A2 (en) 2011-02-22
US20070028056A1 (en) 2007-02-01
CN101495976B (en) 2011-11-09
KR101203297B1 (en) 2012-11-20
US7536517B2 (en) 2009-05-19
CN101495976A (en) 2009-07-29
RU2008103273A (en) 2009-08-10
EP1910929A2 (en) 2008-04-16
IL188665A0 (en) 2008-08-07
MX2008001159A (en) 2008-03-13

Similar Documents

Publication Publication Date Title
WO2007016302A3 (en) Direct-update software transactional memory
KR101475171B1 (en) Cpu in memory cache architecture
KR101388865B1 (en) Performing mode switching in an unbounded transactional memory (utm) system
US20110307664A1 (en) Cache device for coupling to a memory device and a method of operation of such a cache device
CN101558391B (en) Configurable cache for a microprocessor
AU2001292928A1 (en) Posted write-through cache for flash memory
CN101038531A (en) Shared interface for cmponents in an embedded system
Khan et al. Improving cache performance using read-write partitioning
Seongil et al. Row-buffer decoupling: A case for low-latency DRAM microarchitecture
CN101689147A (en) Data prefetch throttle
JPH0668735B2 (en) Cache memory
US20180113648A1 (en) Software mode register access for platform margining and debug
IL183470A0 (en) Managing multiprocessor operations
KR910003496A (en) How to increase performance of multilevel cache system by forcing cache miss
US20230384854A1 (en) Static power reduction in caches using deterministic naps
Khan et al. Improving cache performance by exploiting read-write disparity
EP1039382A4 (en) Memory access optimizing method
WO2008074830A3 (en) System, method and computer program product for managing data using a write-back cache unit
Gaur et al. Base-victim compression: An opportunistic cache compression architecture
CN105718242A (en) Processing method and system for supporting software and hardware data consistency in multi-core DSP (Digital Signal Processing)
US11188464B2 (en) System and method for self-invalidation, self-downgrade cachecoherence protocols
CN206193777U (en) LPC interface visit device, notebook computer based on platform of soaring
Kruger et al. DONUTS: An efficient method for checkpointing in non‐volatile memories
Meyer et al. Dynamic and Transparent Data Tiering for In-Memory Databases in Mixed Workload Environments.
WO2004066084A3 (en) Cache only queue option for cache controller

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200680026687.X

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 188665

Country of ref document: IL

WWE Wipo information: entry into national phase

Ref document number: 12008500113

Country of ref document: PH

WWE Wipo information: entry into national phase

Ref document number: 611/DELNP/2008

Country of ref document: IN

ENP Entry into the national phase

Ref document number: 2616422

Country of ref document: CA

WWE Wipo information: entry into national phase

Ref document number: 2006788738

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: MX/a/2008/001159

Country of ref document: MX

WWE Wipo information: entry into national phase

Ref document number: 565417

Country of ref document: NZ

WWE Wipo information: entry into national phase

Ref document number: 2008103273

Country of ref document: RU

Ref document number: 2008010163

Country of ref document: EG

WWE Wipo information: entry into national phase

Ref document number: 2006275736

Country of ref document: AU

Ref document number: 2008524174

Country of ref document: JP

Ref document number: 1020087002433

Country of ref document: KR

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2006275736

Country of ref document: AU

Date of ref document: 20060728

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: PI0613946

Country of ref document: BR

Kind code of ref document: A2

Effective date: 20080125