WO2007035197A3 - Streaming data interface device and method for automatic generation thereof - Google Patents

Streaming data interface device and method for automatic generation thereof Download PDF

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Publication number
WO2007035197A3
WO2007035197A3 PCT/US2006/025904 US2006025904W WO2007035197A3 WO 2007035197 A3 WO2007035197 A3 WO 2007035197A3 US 2006025904 W US2006025904 W US 2006025904W WO 2007035197 A3 WO2007035197 A3 WO 2007035197A3
Authority
WO
WIPO (PCT)
Prior art keywords
interface device
streaming data
data interface
candidate
streaming
Prior art date
Application number
PCT/US2006/025904
Other languages
French (fr)
Other versions
WO2007035197A2 (en
Inventor
Sek M Chai
Nikos Bellas
Malcolm R Dwyer
Erica M Lau
Zhiyuan Li
Daniel A Linzmeier
Original Assignee
Motorola Inc
Sek M Chai
Nikos Bellas
Malcolm R Dwyer
Erica M Lau
Zhiyuan Li
Daniel A Linzmeier
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc, Sek M Chai, Nikos Bellas, Malcolm R Dwyer, Erica M Lau, Zhiyuan Li, Daniel A Linzmeier filed Critical Motorola Inc
Publication of WO2007035197A2 publication Critical patent/WO2007035197A2/en
Publication of WO2007035197A3 publication Critical patent/WO2007035197A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6028—Prefetching based on hints or prefetch instructions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A streaming data interface device (700) of a streaming processing system (200) is automatically generated by selecting a set of circuit parameters (610) consistent with a set of circuit constraints and generating (612, 614) a representation of a candidate memory interface device based upon a set of stream descriptors. The candidate streaming data interface device is evaluated (616) with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output (622) if the candidate memory interface device satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate memory interface devices
PCT/US2006/025904 2005-09-20 2006-06-30 Streaming data interface device and method for automatic generation thereof WO2007035197A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/231,171 2005-09-20
US11/231,171 US7603492B2 (en) 2005-09-20 2005-09-20 Automatic generation of streaming data interface circuit

Publications (2)

Publication Number Publication Date
WO2007035197A2 WO2007035197A2 (en) 2007-03-29
WO2007035197A3 true WO2007035197A3 (en) 2007-08-09

Family

ID=37885546

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/025904 WO2007035197A2 (en) 2005-09-20 2006-06-30 Streaming data interface device and method for automatic generation thereof

Country Status (2)

Country Link
US (1) US7603492B2 (en)
WO (1) WO2007035197A2 (en)

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US9342383B2 (en) * 2007-12-28 2016-05-17 Sap Se Streaming operations for workflow process models using multiple views on a same buffer
US8055950B2 (en) * 2008-01-11 2011-11-08 Arm Limited Method and apparatus for improved timing for trace synchronization
TWI390442B (en) * 2008-10-24 2013-03-21 Univ Nat Taiwan System and method for digital signal processing using stream processing
US8176366B2 (en) * 2009-04-03 2012-05-08 Arm Limited Trace synchronization
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US8972923B2 (en) * 2011-02-08 2015-03-03 Maxeler Technologies Ltd. Method and apparatus and software code for generating a hardware stream processor design
US20130151766A1 (en) * 2011-12-12 2013-06-13 Moon J. Kim Convergence of memory and storage input/output in digital systems
US9449359B2 (en) * 2012-09-13 2016-09-20 Ati Technologies Ulc Rendering settings in a multi-graphics processing unit system
US11226768B2 (en) * 2018-01-04 2022-01-18 Montage Technology Co., Ltd. Memory controller and method for accessing memory module

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Also Published As

Publication number Publication date
WO2007035197A2 (en) 2007-03-29
US7603492B2 (en) 2009-10-13
US20070067508A1 (en) 2007-03-22

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