WO2007089660A3 - Multi-voltage synchronous systems - Google Patents

Multi-voltage synchronous systems Download PDF

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Publication number
WO2007089660A3
WO2007089660A3 PCT/US2007/002296 US2007002296W WO2007089660A3 WO 2007089660 A3 WO2007089660 A3 WO 2007089660A3 US 2007002296 W US2007002296 W US 2007002296W WO 2007089660 A3 WO2007089660 A3 WO 2007089660A3
Authority
WO
WIPO (PCT)
Prior art keywords
power plane
subcircuit
operable
voltage
voltage synchronous
Prior art date
Application number
PCT/US2007/002296
Other languages
French (fr)
Other versions
WO2007089660A2 (en
Inventor
William Henry Mangione-Smith
Original Assignee
Searete Llc
William Henry Mangione-Smith
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/343,927 external-priority patent/US8214191B2/en
Priority claimed from US11/343,745 external-priority patent/US8209524B2/en
Priority claimed from US11/364,130 external-priority patent/US7493516B2/en
Application filed by Searete Llc, William Henry Mangione-Smith filed Critical Searete Llc
Publication of WO2007089660A2 publication Critical patent/WO2007089660A2/en
Publication of WO2007089660A3 publication Critical patent/WO2007089660A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/1407Checkpointing the instruction stream
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/3471Address tracing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Embodiments include a system, a device, and a method. A computing system includes a synchronous circuit. The synchronous circuit includes a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The system also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The system further includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The system may include a power supply operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
PCT/US2007/002296 2006-01-31 2007-01-26 Multi-voltage synchronous systems WO2007089660A2 (en)

Applications Claiming Priority (14)

Application Number Priority Date Filing Date Title
US11/343,927 US8214191B2 (en) 2005-08-29 2006-01-31 Cross-architecture execution optimization
US11/343,927 2006-01-31
US11/343,745 2006-01-31
US11/343,745 US8209524B2 (en) 2005-08-29 2006-01-31 Cross-architecture optimization
US11/364,130 US7493516B2 (en) 2005-08-29 2006-02-28 Hardware-error tolerant computing
US11/364,131 US8375247B2 (en) 2005-08-29 2006-02-28 Handling processor computational errors
US11/364,573 2006-02-28
US11/364,130 2006-02-28
US11/364,573 US7607042B2 (en) 2005-08-29 2006-02-28 Adjusting a processor operating parameter based on a performance criterion
US11/364,131 2006-02-28
US11/384,236 2006-03-17
US11/384,236 US7653834B2 (en) 2005-08-29 2006-03-17 Power sparing synchronous apparatus
US11/384,237 2006-03-17
US11/384,237 US7512842B2 (en) 2005-08-29 2006-03-17 Multi-voltage synchronous systems

Publications (2)

Publication Number Publication Date
WO2007089660A2 WO2007089660A2 (en) 2007-08-09
WO2007089660A3 true WO2007089660A3 (en) 2008-08-07

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2007/002296 WO2007089660A2 (en) 2006-01-31 2007-01-26 Multi-voltage synchronous systems
PCT/US2007/002298 WO2007089661A2 (en) 2006-01-31 2007-01-26 Power sparing synchronous apparatus

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2007/002298 WO2007089661A2 (en) 2006-01-31 2007-01-26 Power sparing synchronous apparatus

Country Status (2)

Country Link
US (2) US7512842B2 (en)
WO (2) WO2007089660A2 (en)

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US8423824B2 (en) * 2005-08-29 2013-04-16 The Invention Science Fund I, Llc Power sparing synchronous apparatus
US7739524B2 (en) * 2005-08-29 2010-06-15 The Invention Science Fund I, Inc Power consumption management
US7725693B2 (en) * 2005-08-29 2010-05-25 Searete, Llc Execution optimization using a processor resource management policy saved in an association with an instruction group
US8516300B2 (en) * 2005-08-29 2013-08-20 The Invention Science Fund I, Llc Multi-votage synchronous systems
US8181004B2 (en) * 2005-08-29 2012-05-15 The Invention Science Fund I, Llc Selecting a resource management policy for a resource available to a processor
US7779213B2 (en) 2005-08-29 2010-08-17 The Invention Science Fund I, Inc Optimization of instruction group execution through hardware resource management policies
US7627739B2 (en) 2005-08-29 2009-12-01 Searete, Llc Optimization of a hardware resource shared by a multiprocessor
US7512842B2 (en) * 2005-08-29 2009-03-31 Searete Llc Multi-voltage synchronous systems
US8209524B2 (en) 2005-08-29 2012-06-26 The Invention Science Fund I, Llc Cross-architecture optimization
US7539852B2 (en) * 2005-08-29 2009-05-26 Searete, Llc Processor resource management
US8402257B2 (en) * 2005-08-29 2013-03-19 The Invention Science Fund I, PLLC Alteration of execution of a program in response to an execution-optimization information
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Also Published As

Publication number Publication date
US7653834B2 (en) 2010-01-26
WO2007089661A3 (en) 2009-03-26
US7512842B2 (en) 2009-03-31
WO2007089660A2 (en) 2007-08-09
US20070050582A1 (en) 2007-03-01
US20070050581A1 (en) 2007-03-01
WO2007089661A2 (en) 2007-08-09

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