WO2007090195A1 - Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity - Google Patents

Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity Download PDF

Info

Publication number
WO2007090195A1
WO2007090195A1 PCT/US2007/061486 US2007061486W WO2007090195A1 WO 2007090195 A1 WO2007090195 A1 WO 2007090195A1 US 2007061486 W US2007061486 W US 2007061486W WO 2007090195 A1 WO2007090195 A1 WO 2007090195A1
Authority
WO
WIPO (PCT)
Prior art keywords
memory
virtual
physical
pages
mrrs
Prior art date
Application number
PCT/US2007/061486
Other languages
French (fr)
Inventor
Keith Olson
Alex Kuang-Hsuan Tu
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to JP2008553514A priority Critical patent/JP2009525555A/en
Priority to EP07762665A priority patent/EP1979818A1/en
Publication of WO2007090195A1 publication Critical patent/WO2007090195A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622—Partial refresh of memory arrays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4067—Refresh in standby or low power modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the disclosed embodiments relate Io disabling the refreshing of portions of dynamic random access memory (DRAM) to conserve power in a mobile communication device.
  • DRAM dynamic random access memory
  • a mobile communication device such as a cellular telephone
  • a cellular telephone may have many more functions than just the cellular telephone function.
  • the cellular telephone is actually becoming somewhat of a general purpose hardware platform upon which an operating system executes.
  • Each of the various functions of the cellular telephone platform generally has its own application layer program. Executing some of these application layer programs may involve using a large amount of memory and processing resources.
  • the cellular telephone m&y have a digital camera functionality in addition to its cellular telephone communication functionality.
  • DRAM dynamic random access memory
  • the power co ⁇ sfurap ⁇ on of a mobile communication device (for example, a cellular telephone) Js reduced by disabling the refreshing of unused portions of the mobile commumcatiori device * s DRAM.
  • the DRAM includes multiple memory refresh ranges (MRRs). Refreshing of each MRR can be enabled and disabled independently of the refreshing of each other MRR.
  • a .novel memory refresh manager Is provided vvkhin the operating system of the mobile communication device.
  • the MRM identifies ranges of virtual memory space that do not need to be .maintained during subsequent sleep /node operation.
  • a heap manager of the operating system provides a list of ranges of heap virtual memory that will not be used by the heap during sleep mode operation. This list is provided to the MRM.
  • a task manager of the operating system provides a ⁇ ist of ranges of stack virtual memory that will not be used by stacks during sleep mode operation. This list is also provided to the MRM.
  • the MRM uses the information, in the lists, rearranges the data in physical memory space, and remaps virtual to physical memory space to conglomerate the physical memory pages (associated with ranges of virtual memory that will not need to be maintained during sleep .mode) into a set of MRRs.
  • the remapping is such that, ao portion of any one of the MRRs of the set is a portion that must be maintaiaed in sleep mode.
  • the MRM. selects the MRRs that will be in the set so as to maximize tbe sum MRR memory space of all the MRRs in the set. By maximizing this MRR memory space, the amount of DRAM! that is not refreshed during subsequent sleep mode operation is maximized. By maximizmg the amount of DRAM that is not refreshed, the amount of power savings is also maximized.
  • JOO ⁇ SJ Information in any remapped physical memory page that needs to be refreshed during sleep mode operation is copied to a new physical memory page so that it resides at the same virtual address after the remapping as before. This copying is done by the MRM before the remapping operation described above. Because other software (other than the MRM) operating on the mobile communication device operates in virtual memory space, operation of this other software is not affected by the remapping.
  • the MRM reconfigures the memory system of the mobile communication device to disable refreshing of the MRMs of the set.
  • the MRM disables refreshing by writing appropriate control information into a memory controller of the memory system.
  • the memory controller controls the refreshing of each MRK in DRAM in accordance with the control mfbrrnation.
  • the mobile communication device then begins sleep .mode operation. During sleep mode operation, none of the MRMs of the set is refreshed;, thereby conserving the power that would otherwise be consumed where the set of MRRs refreshed during sleep mode.
  • Other MSMs (other than the MRMs of the set) that contain information that must be maintained or that will be used during sleep .mode are refreshed so that the software that is running during sleep mode works properly.
  • the MRM reconfigures the memory system to enable refreshing of all MRMs. Once all MRMs of DRAM are being refreshed and are operational, then normal operational mode operation resumes.
  • Figure 1 is a block diagram that illustrates selected functional components
  • O ⁇ iOJ Figure 2 is a diagram that illustrates heap memory space. A portion of heap memory space is allocated, and a portion is free.
  • JOOIlJ Figure 3 A is a diagram that illustrates stack memory space. A portion of stack memory space Is being used by stacks, and a portion ⁇ s rsoi being used by stacks.
  • J0012J Figure 3B is a diagram of pseudocode that illustrates how nested procedure calls result in pushing items onto the stack of Figure 3 A
  • ⁇ 00*3 ⁇ Figure 3C is a diagram that lists pushing, and popping operations carried out when the pseudocode of Figure 3B is executed.
  • Figure 4A is a diagram that illustrates how a. .memory management unit. (MMU) maps virtual memory addresses output by the CPU to physical memory addresses used by the memory system.
  • MMU memory management unit
  • Figure 4B is a table that illustrates a virtual to physical memory space translation.
  • J0O16J Figure 5 is a diagram that illustrates how DRAM memory space is sectioned up into multiple memory refresh regions (MRRs). Refreshing of each MRR. cars be enabled or disabled independently of the refreshing of the other MRRs.
  • MRRs memory refresh regions
  • FIG. 6 is a simplified flowchart of a first novel method. Refreshing of MRRs during sleep mode is disabled without MMU remapping of virtual to physical address space.
  • FIG. 7 is a memory space diagram for the first method of Figure 6.
  • J0OI.9J Figure 8 is a simplified flowchart of a second novel method.
  • MMU remapping of virtual to physical memory space is performed to conglomerate physical memory pages, the contents of which do not need to be maintained during subsequent sleep mode operation.
  • the conglomerated physical memory pages are mapped so that they entirely occupy a set of MRRs.
  • the mapping is performed so that the total amount of MRR. memory space that need not. be maintained during sleep mode is maximized or is substantially maximized.
  • sleep mode operation occurs without the set of MRRs being refreshed, thereby reducing power consumption.
  • Figure 9 is a memory space diagram for the second method of Figure S.
  • FIG. 1.0 is a simplified flowchart of a third method wherein refreshing of a!!
  • MRMs is enabled prior to returning from sleep mode operation to normal operational mode operation.
  • Mobile communication device 1 includes software and hardware.
  • the software includes an operating system 13 that in turn includes a steep manager (SM) 2, a memory refresh manager (MRM) 3, a heap manager (HM) 4 and a task manager (TM) 5.
  • the hardware includes a central processing unit (CFU), a memory management unit (MMII) 6 and a memory system 7.
  • Memory system 7 includes a memory controller (MC) 8 aud an amount of dynamic random access memory (DRAM) 9.
  • the CPU, MMU and MC are integrated onto a single integrated circuit, the DRAM is realised as a discrete DRAM integrated circuit in order to fake advantage of high volume production of such DRAM int.egn.ited circuits.
  • FIG. 2 is a diagram that illustrates a heap 10 of memory space that is managed by heap manager 4.
  • the vertical dimension in th ⁇ diagram represents the overt?! memory address space reserved for the heap and made available to the CPU of the mobile communication device 1.
  • the memory space may represent space in various types of storage devices including, for example, DRAM % static random access memory (SRAMX non-volatile storage, and other types of data storage, ⁇ ti the example illustrated in Figure 2, the heap 10 is sectioned up into six sections. The sections are denoted Al, A2. Fi, A3, F2 and A4. The "A" in this notation indicates that, the section has been "allocated" by heap manager 4 to a software entity (for example, an application program, a procedure or a task).
  • a software entity for example, an application program, a procedure or a task.
  • the T' in this notation indicates thai the section of memory is "free". Free means that the section of memory is not being used by any software. Heap manager 4 maintains an awareness of each of the sections of the .memory space and whether each section has been "allocated" or is "free”.
  • the application program When an application program is launched, the application program will typically make a request- to heap manager 4 for an amount of memory space. The heap manager 4 will respond by allocating one or more free sections of memory to the application program.
  • the application program t ⁇ > longer needs use of the sections of memory allocated to it, then the application program will typically make a request to free the memory to heap manager 4. Heap manager 4 responds and considers the section or sections of memory to be '"free" and available for future allocation to other software entities, As indicated by the diagram, the sizes of the various sections of memory of heap ⁇ 0 typically vary.
  • Mobile communication device also has a low power sleep mode.
  • mobile communication device 1 When mobile communication device 1 is operating in sleep mode, very few or no application layer programs are active. The mobile eor ⁇ rouni cation device 1 may be doing little more than monitoring communication traffic to determine whether a .message is destined for the .mobile communication, device and to determine whether the mobile communication device should exit sleep mode and resume normal operation. When mobile communication device 1 is operating in the sleep mode, a great, deai of the DRAM in the heap is "free" and is not in use. The free portion of DRAM heap memory need not be refreshed when it is not in use.
  • Figrires 3 A, 3B and 3C are diagrams that illustrate operation- of a stack managed by task manager 2.
  • the stack occupies a portion of memory space 11. reserved tor stack usage.
  • Stack memory space .1.1 is represented in Figure 3A as a column of memory space extending downward.
  • Figure 3B illustrates a portion of pseudocode that, Includes a procedure "main", a procedure "A”, and a procedure "B”.
  • Figure 3C illustrates a sequence of events that might take place when the code of Figure 3B is executed.
  • software is Initially executing from some memory location. When the procedure "main” is invoked, the program counter of the CPU and the CPU's state is pushed onto the stack.
  • This information pushed onto the stack is denoted S3 m Figure 3A. Accordingly, as execution of the software gets deeper and deeper into nested procedure calls, more and more information is pushed onto the stack.
  • the amount of memory space 1 S that .is used increases.
  • the amount of memory space 1.1. that is .free decreases.
  • procedure B execution of procedure B begins.
  • the RETURN at the end of procedure B is readied, then processing is to return to procedure A.
  • the items S3 are popped off the stack and ate used to restore the CPU's program counter and the CPU's state.
  • the used portion of the memory space 1 1 therefore decreases. Processing returns to procedure A.
  • the RETURN at the end of procedure A is reached, then processing is to return to procedure "main".
  • the items S 2 are popped off the stack and are used to restore program counter «nd processor state.
  • the used portion of memory space 1.1 therefore decreases further.
  • the CPU is executing in the procedure "main”
  • the only items on the stack are the items Sl .
  • the “EXIT (TO OS)" operation at the end of the procedure "main” is reached, then the items Sl are popped off the stack and are used to restore program counter and processor state.
  • FIG. 4 ⁇ is a simplified diagram that illustrates how the MMU ' 6 of mobile communication device i maps virtual memory address space to physical memory address space.
  • the physical memory of memory system 7 is organized as a. plurality of physical memory pases (MPs). ⁇ n the present example, each physical MP contains 2k memory locations.
  • the software executing on the CPU operates in virtual memory space as if the addresses specified by the software were addresses in one continuous address space.
  • Each 2k address space (referred to here as a "virtual memory page") of the virtual memory space is, however, mapped by MMU 6 to a corresponding one of the physical MPs.
  • FIG. 4B is a diagram of a table that sets forth one example of such a virtual memory space to physical memory space mapping.
  • Virtual address range (1G2k ⁇ (.l04k ⁇ I)) is mapped to physical address range (0 ⁇ (2k-l)) and to physical memory page 0; virtual address raage (1.8k ⁇ (20k ⁇ 1)) is mapped to physical address range (2k-(4k-l)) a.nd to physical memory page I.; and so forth down the rows of the table.
  • Physical page size is dependent on. the characteristics of the MMU and the physical memory used.
  • the operating system of mobile communication device 1 can write to MMU 6 and change the virtual to physical mapping. By changing the mapping, the virtual address range that addresses a.
  • memory 11 can be changed so that it is no longer mapped to a first page of physical m ⁇ mory but rather now is mapped to a second page of physical memory. If the contents of the portion of stack memory space 1.1 is copied from the first page to the second page, then when the software executes in virtual address space and accesses a memory location in the virtual address raage, the same contents of stack memory space will be available to the software. Because the software operates in. virtual address space, from the software's perspective the content of memory is identical before and after the remapping.
  • FIG. 5 is a diagram that illustrates an example of a plurality of memory refresh regions (MRRs) of the DRAIVi 9 of memory system 7.
  • DRAM 9 includes three MRRs denoted MRRl 5 MRR2 and MRR3, respectively.
  • Memory controller 8 controls the refreshing of the MRRs of the DRAM. Due to the construction of memory system 7, the refreshing of each MRR can be disabled or enabled independently of the refreshing of the other MRRs. ⁇ n the illustrated example of Figure 5, the sizes of each of the MRRs is different
  • MRy.3 writes appropriate control information into memory controller (MC) 8.
  • Memory controller S responds to the control information by stopping the refreshing of the designated MRR.
  • MRM 3 can write appropriate control information into memory controller S such that refreshing of a selected MRR is enabled.
  • Memory controller S responds to the control information by initiating refreshing of the designated MRR.
  • Figure 6 Is a flowchart of a first novel method of operation of the mobile communication device 1 of Figure i wherein refreshing of an MRR is disabled, thereby saving power that would otherwise be consumed refreshing the MRR.
  • Figure 7 is a diagram that illustrates the contents and organisation of memory in the first method.
  • This decision may, for example, be made by sleep manager 2 m response to user input (such, as, for example, due to the user's pressing a power off key).
  • MRRs memory refresh ranges
  • memory refresh ranges (MRRs) are identified that do not contain information that needs to be maintained during sleep mode.
  • Memory refresh manger 3 may, for example, become aware of these MRRs due to heap manager 4 reporting ranges of heap virtual memory space that will not be allocated by the heap manager 4 in upcoming simp mode operation.
  • task manager 5 may report ranges of stack virtual memory space that will not used by stacks in the upcoming sleep mode operation.
  • Memory refresh manager 3 maintains knowledge of which virtual memory spaces are mapped to which physical memory pages (MPs), and which physical memory pages (MPs) are disposed in which physical memory refresh regions (MRRs) of -DRAM..
  • memory refresh manager 3 identifies any MRRs that do not contain information, that needs to be maintained during the sleep mode, (Although the identification of 3VlRRs of step 201 is described here as occurring after the decision of step 200 is made to mier sleep mode, the order of the two steps can be reversed. Alternatively, the identification of MRRs of step 201 csn be a continuously ongoing process.)
  • ranges of virtual addresses NPRl, " NPRZ and NPR3 are ranges of virtual address space, the contents of which do not need to be retained during sleep mode. These ranges NPIUJ , NPR2 ami NFR3 are reported by heap manager 4 and task manager 5 to memory refresh manager 3. Memory refresh manager 3 determines that MRR3 is only mapped to non-preserved ranges (NPR3 in this case) and that MMR3 contains no i «.f ⁇ m$atioft that needs to be maintained during the sleep mode.
  • step 202 memory refresh manager 3 disables refreshing of the identified physical MRRs so that these MRRs are not refreshed during the subsequent sleep mode operation.
  • memory refresh manager 3 disables refreshing of these MRRs by writing appropriate control information into tibe memory controller (MC) S of raemory system 7.
  • the control information includes a refresh enable command as well a$ &n indication of the MRRs that need to be refreshed.
  • MC 8 tibe memory controller
  • memory refresh manager 3 does not change the virtual memory space to physical memory space mapping stored by KHS-CU 6.
  • MRRs that will not store information that needs to be retained during sleep mode operation are simply identified and. refreshing of those MRRs is disabled by writing appropriate control information to memory controller S.
  • MRR3 contains no information that must be retained during sleep mode operation. Memory refresh manager 3 therefore controls memory controller 8 to disable refreshing of MRR3.
  • step 203 mobile communication device 1 enters sleep mode. Ia the example of Figure 7, when mobile communication device .1 is operating in sleep mode MRR3 is not refreshed. As a result, power consumption is reduced in comparison to a system where unused DRAM is refreshed during sleep mode operation,
  • FIG. 8 is a flowchart of a second novel method of operation of mobile communication device 1 of Figure 1.
  • Figure 9 is a. diagram that illustrates the contents and organization of memory in the second method.
  • a decision is made that mobile communication device 1 is to enter a low power sleep mode. This decision may, for example, be made by sleep manager 2 in response to user input (such as s for example, due to the user's pressing a power off key).
  • step 301 sleep manager 2 invokes MRM 3.
  • MRM 3 responds by disabling task switching and by disabling interrupts (step 302). This disabling is performed so that software that is using memory space that is to be remapped will not be affected during the subsequent remapping process,
  • MRM 3 Invokes heap manager (HM) 4 and obtains from the heap manager 4 a list of virtual memory ranges in stack memory space, where each virtual memory range is a range of memory spaces that does not need to be refreshed during sleep mode.
  • Heap manager 4 may, for example, designate a predetermined ⁇
  • This predetermined amount of heap memory 1.0 may be empirically determined by keeping track of the amount of heap that is not used during multiple periods of sleep mode operation,
  • MRM 3 invokes task manager (TM) S and obtains from task manager 5 a list of virtual memory ranges in stack memory space, where each virtual .memory range is a range of memory spaces that will not be used by any stack during sleep mode.
  • Task manager 5 may identify these ranges empirically by keeping track of how deep in the various stacks values were pushed during multiple periods of sleep mode operation.
  • TM task manager
  • MRM 3 determines aa arrangement, that would place the non-preserved ranges (NPRs) in physical memory adjacent to one another, such that entire memory refresh ranges (MEJRs) of DRAM contain only MPRs, This arrangement maximizes or substantially maximizes the total amount of !VIRRs within. DRAM that contain only NFRs.
  • Figure 9 shows the arrangement of NPRs and physical pages before and after step 306 of Figure 8.
  • the leftmost two columns show how MRRs are organized in physical memory.
  • the first coHimxi shows physical memory space realized entirely in DRAM, with the DRAM divided into three different memory refresh ranges (MRRs).
  • the second column shows how memory is organized into physical memory pages (MPs).
  • Physical MPs 0-4 are in MRRL
  • Physical MPs 5-9 are in MRR2
  • Physical MPs 10-12 are in MR.R3.
  • the third and fourth columns in Figure 9 show the non-preserved ranges (NPRs) and their corresponding physical memory pages (MPs) before step 306 of Figure 8.
  • the third column shows the NPRs thai heap manager 4 and task manager 5 marked as not needing refresh during sleep mode.
  • the fourth column shows the physical memory pages thai the corresponding NPRs occupy. Memory space extends downward in the figure so that the page numbers increase from top to bottom of the figure (0-12 in this example), ⁇ n the third column (which shows the MPs a «d NPRs before step 306), NPRl includes part of MP 0, all of MP 1 , and part of MP 2.
  • NPR2 includes part of MP 3, all of MP 4, m ⁇ part of MP 5.
  • NPR3 includes part of MP 6, all of MP 7, and part of MP 8.
  • each MMR (MRRl 3 MRR2 and MRR3) contains at least some information that must be preserved during sleep mode; therefore, refresh cannot be disabled on any of the MMRs during sleep mode unless the NPRs are rearranged.
  • MMR3 memory management region 3
  • step 307 of Figure 8 MRM. 3 configures MMU ⁇ > so that all memory locations that were moved in. physical address space will have the same virtual addresses they had before step 306 ⁇ this step is not shown in Figure 9). Step 30? ensures that the software continues to work properly without requiring changes to the software itself.
  • step 307 the software remains unaware of changes to the physical memory arranges ent determined in step 305 and performed in step 306, and it can retrieve information from the same virtual addresses as it did before physical memory was rearranged.
  • MRM 3 reconfigures the memory controller 7 to disable refresh of KlRRs that contain non-preserved regions (NPRs) only, ⁇ n Figure 9, only MRR3 can have refresh disabled because if. is the only MRR that consists solely of NfRs (as indicated by the vertical lines next to "OLD PAGE F ⁇ "OLD PAGE 4", and "OLD PAGE T in the fifth column of Figure 9), j ' 0049
  • MRR3 is only • mapped to fragments of non-preserved ranges. This is indicated by the vertical lines m the second rightmost column of Figure 9 in the rows thai correspond to MRR3.
  • MRM 3 enables task switching and interrupts ⁇ ' step 309) so that application layer programs can ru» again and can be allocated sections of heap and can use stacks.
  • Sleep manager 2 then puts mobile communication device 1 into sleep mode (step 3 ⁇ 0). When mobile communication device 1 is in sleep mode, the DRAM of MRR3 is not used by software and is not refreshed.
  • FIG. 10 is a flowchart of a third novel method wherein mobile communication device I wakes up after a period of sleep mode operation.
  • Sleep manager 2 decides (step 400) that mobile communication, device 1 is to recover from sleep mode operation and is to return to normal operating mode operation.
  • Sleep manager 2 invokes MRM 3 (step 401).
  • MRM 3 disables task switching and interrupts (step 402) so that a subsequent reconfiguring of memory controller S will not compromise the operation of application layer programs and tasks.
  • MRM 3 then reconfigures the memory controller S so that all MRRs are refreshed (step 403).
  • the refreshing of MRR3 is again enabled, thereby reversing the refresh disabling of step 3OS of Figure S.
  • Memory controller S resumes refreshing MRRI, MRR2 and !VfRRS.
  • MRM! 3 enables task switching and interrupts.
  • Sleep manager 2 then causes mobile communication device 1 to exit sleep .mode operation and the start operation in normal operation mode (step 405).
  • Application layer programs are allowed to run. Where mobile comr ⁇ unicalion device ] is a cellular telephone, application layer programs are operable to analyze incoming cellular telephone messages m ⁇ to perform other functions such as operation as a digital camera. All heap memory space 10 and all stack memory space 11 realized in DRAM is available for use.

Abstract

Power consumption of a mobile communication device is reduced by disabling refreshing of unused portions of DRAM. DRAM includes multiple separately refreshable memory refresh ranges (MRRs). A memory refresh manager (MRM) within the device's operating system identifies ranges of virtual memory (305) that will not be used during subsequent sleep mode operation. The MRM (307) remaps virtual to physical memory space to conglomerate the physical memory pages (associated with virtual memory that will not be used) in certain MRRs such that the contents of entire MRRs need not be maintained in sleep mode (308). Information in any remapped physical page that needs to be maintained during sleep mode is copied so that it resides at the same virtual address after the remapping as before. Other software operates in virtual memory space and is not affected by the remapping (309). Refreshing of the certain MRRs is then disabled for sleep mode (310), thereby reducing power consumption.

Description

REDUCING POWER CONSUMPTION BY DISABLING REFRESH OF UNt)SEB PORTIONS OF .DRAM DURING PERIODS OF
DEVICE INACTIVITY
BACKGROUND
Field
}OOβ.i.j The disclosed embodiments relate Io disabling the refreshing of portions of dynamic random access memory (DRAM) to conserve power in a mobile communication device.
Backgroimd Information
J0G021 How long a mobile communication device (such as a cellular telephone) caa operate between battery recharging operations is m important to users. Accordingly, reducing power consumption of iaobite communication devices is desired. Complicating matters, a cellular telephone today may have many more functions than just the cellular telephone function. The cellular telephone is actually becoming somewhat of a general purpose hardware platform upon which an operating system executes. Each of the various functions of the cellular telephone platform generally has its own application layer program. Executing some of these application layer programs may involve using a large amount of memory and processing resources. For example, the cellular telephone m&y have a digital camera functionality in addition to its cellular telephone communication functionality. When the cellular telephone is being used as a digital camera, a large amount of memory may be used to capture, process and store megapixel digital images. A large amount of memory is therefore now provided on contemporary cellular telephones. Due to the large amount of memory provided, the memory is often dynamic random access memory (DRAM). DRAM requires refreshing and this refreshing consumes power. A. solution that reduces amount of power consumed performing DRAM refresh is desired so that the mobile communication device can operate for longer periods between battery r echargings,
SUMMARY INFORMATION
J(H)OSf The power coπsfurapϋon of a mobile communication device (for example, a cellular telephone) Js reduced by disabling the refreshing of unused portions of the mobile commumcatiori device* s DRAM. In one exemplary mobile communication device, the DRAM, includes multiple memory refresh ranges (MRRs). Refreshing of each MRR can be enabled and disabled independently of the refreshing of each other MRR.
|0OΘ4| A .novel memory refresh manager (IVIRM) Is provided vvkhin the operating system of the mobile communication device. The MRM identifies ranges of virtual memory space that do not need to be .maintained during subsequent sleep /node operation. In one example, a heap manager of the operating system provides a list of ranges of heap virtual memory that will not be used by the heap during sleep mode operation. This list is provided to the MRM.. In another example, a task manager of the operating system provides a ϊist of ranges of stack virtual memory that will not be used by stacks during sleep mode operation. This list is also provided to the MRM. The MRM uses the information, in the lists, rearranges the data in physical memory space, and remaps virtual to physical memory space to conglomerate the physical memory pages (associated with ranges of virtual memory that will not need to be maintained during sleep .mode) into a set of MRRs. The remapping is such that, ao portion of any one of the MRRs of the set is a portion that must be maintaiaed in sleep mode. Ia one example, the MRM. selects the MRRs that will be in the set so as to maximize tbe sum MRR memory space of all the MRRs in the set. By maximizing this MRR memory space, the amount of DRAM! that is not refreshed during subsequent sleep mode operation is maximized. By maximizmg the amount of DRAM that is not refreshed, the amount of power savings is also maximized.
JOOΘSJ Information in any remapped physical memory page that needs to be refreshed during sleep mode operation is copied to a new physical memory page so that it resides at the same virtual address after the remapping as before. This copying is done by the MRM before the remapping operation described above. Because other software (other than the MRM) operating on the mobile communication device operates in virtual memory space, operation of this other software is not affected by the remapping.
|0006| Once the copying and remapping has been earned out, then the MRM reconfigures the memory system of the mobile communication device to disable refreshing of the MRMs of the set. In one example, the MRM disables refreshing by writing appropriate control information into a memory controller of the memory system. The memory controller controls the refreshing of each MRK in DRAM in accordance with the control mfbrrnation. The mobile communication device then begins sleep .mode operation. During sleep mode operation, none of the MRMs of the set is refreshed;, thereby conserving the power that would otherwise be consumed where the set of MRRs refreshed during sleep mode. Other MSMs (other than the MRMs of the set) that contain information that must be maintained or that will be used during sleep .mode are refreshed so that the software that is running during sleep mode works properly.
[0007J When the mobile communication device is to cease low power sleep mode operation and resume norms! operational mode operation, the MRM reconfigures the memory system to enable refreshing of all MRMs. Once all MRMs of DRAM are being refreshed and are operational, then normal operational mode operation resumes.
[OiM)S] Additional embodiments and details are described in the detailed description below. This summary does not purport to define the invention. The invention is defined by tbe claims.
BRIEF DESCRIPTION OF THE DRAWINGS {0CΘ9| Figure 1 is a block diagram that illustrates selected functional components
(software and hardware) of a mobile communication device 1 in accordance with one novel embodiment (OβiOJ Figure 2 is a diagram that illustrates heap memory space. A portion of heap memory space is allocated, and a portion is free. JOOIlJ Figure 3 A is a diagram that illustrates stack memory space. A portion of stack memory space Is being used by stacks, and a portion ϊs rsoi being used by stacks. J0012J Figure 3B is a diagram of pseudocode that illustrates how nested procedure calls result in pushing items onto the stack of Figure 3 A, {00*3} Figure 3C is a diagram that lists pushing, and popping operations carried out when the pseudocode of Figure 3B is executed. fθβϊ.4j Figure 4A is a diagram that illustrates how a. .memory management unit. (MMU) maps virtual memory addresses output by the CPU to physical memory addresses used by the memory system. {00J5{ Figure 4B is a table that illustrates a virtual to physical memory space translation.
J0O16J Figure 5 is a diagram that illustrates how DRAM memory space is sectioned up into multiple memory refresh regions (MRRs). Refreshing of each MRR. cars be enabled or disabled independently of the refreshing of the other MRRs.
{OOJ7{ Figure 6 is a simplified flowchart of a first novel method. Refreshing of MRRs during sleep mode is disabled without MMU remapping of virtual to physical address space.
[0OiSJ Figure 7 is a memory space diagram for the first method of Figure 6.
J0OI.9J Figure 8 is a simplified flowchart of a second novel method. MMU remapping of virtual to physical memory space is performed to conglomerate physical memory pages, the contents of which do not need to be maintained during subsequent sleep mode operation.. The conglomerated physical memory pages are mapped so that they entirely occupy a set of MRRs. The mapping is performed so that the total amount of MRR. memory space that need not. be maintained during sleep mode is maximized or is substantially maximized. After the remapping, sleep mode operation occurs without the set of MRRs being refreshed, thereby reducing power consumption.
[0020] Figure 9 is a memory space diagram for the second method of Figure S.
{0021 \ Figure 1.0 is a simplified flowchart of a third method wherein refreshing of a!!
MRMs is enabled prior to returning from sleep mode operation to normal operational mode operation.
DETAXLE0 DESCRIPTION
{0G22J Figure .1 is a block diagram that illustrates functional components of a mobile communication device I in accordance with one novel embodiment. Mobile communication device 1 includes software and hardware. The software includes an operating system 13 that in turn includes a steep manager (SM) 2, a memory refresh manager (MRM) 3, a heap manager (HM) 4 and a task manager (TM) 5. The hardware includes a central processing unit (CFU), a memory management unit (MMII) 6 and a memory system 7. Memory system 7 includes a memory controller (MC) 8 aud an amount of dynamic random access memory (DRAM) 9. Whereas the CPU, MMU and MC are integrated onto a single integrated circuit, the DRAM is realised as a discrete DRAM integrated circuit in order to fake advantage of high volume production of such DRAM int.egn.ited circuits.
}0023j Figure 2 is a diagram that illustrates a heap 10 of memory space that is managed by heap manager 4. The vertical dimension in thø diagram represents the overt?!! memory address space reserved for the heap and made available to the CPU of the mobile communication device 1. The memory space may represent space in various types of storage devices including, for example, DRAM % static random access memory (SRAMX non-volatile storage, and other types of data storage, ϊti the example illustrated in Figure 2, the heap 10 is sectioned up into six sections. The sections are denoted Al, A2. Fi, A3, F2 and A4. The "A" in this notation indicates that, the section has been "allocated" by heap manager 4 to a software entity (for example, an application program, a procedure or a task). The T' in this notation indicates thai the section of memory is "free". Free means that the section of memory is not being used by any software. Heap manager 4 maintains an awareness of each of the sections of the .memory space and whether each section has been "allocated" or is "free". When an application program is launched, the application program will typically make a request- to heap manager 4 for an amount of memory space. The heap manager 4 will respond by allocating one or more free sections of memory to the application program. When the application program tκ> longer needs use of the sections of memory allocated to it, then the application program will typically make a request to free the memory to heap manager 4. Heap manager 4 responds and considers the section or sections of memory to be '"free" and available for future allocation to other software entities, As indicated by the diagram, the sizes of the various sections of memory of heap Ϊ0 typically vary.
J0024| When mobile communication device 1 is in use, multiple different application programs may be executing simultaneously. These application programs may together require use of a large amount of memory. Accordingly, much of the heap may be allocated. Where DRAM is used to provide the heap memory space, the DRAM memory ceils must be periodically refreshed so that the information stored it* the DRA=VJ memory cells is not lost This refreshing involves charging capacitances in the DRAM memory cells, and therefore involves current flow and power consumption. The use of large amounts of DRAM by application programs when the mobile communication device "1 is in use therefore involves a significant amount of power being consumed just to refresh the DRAM.
[00251 Mobile communication device 1, however, also has a low power sleep mode.
When mobile communication device 1 is operating in sleep mode, very few or no application layer programs are active. The mobile eorαrouni cation device 1 may be doing little more than monitoring communication traffic to determine whether a .message is destined for the .mobile communication, device and to determine whether the mobile communication device should exit sleep mode and resume normal operation. When mobile communication device 1 is operating in the sleep mode, a great, deai of the DRAM in the heap is "free" and is not in use. The free portion of DRAM heap memory need not be refreshed when it is not in use.
[00261 Figrires 3 A, 3B and 3C are diagrams that illustrate operation- of a stack managed by task manager 2. The stack occupies a portion of memory space 11. reserved tor stack usage. Stack memory space .1.1 is represented in Figure 3A as a column of memory space extending downward. Figure 3B illustrates a portion of pseudocode that, Includes a procedure "main", a procedure "A", and a procedure "B". Figure 3C illustrates a sequence of events that might take place when the code of Figure 3B is executed. In the example illustrated, software is Initially executing from some memory location. When the procedure "main" is invoked, the program counter of the CPU and the CPU's state is pushed onto the stack. The information, pushed onto the stack is denoted Sl in Figure 3A. Execution of procedure "main" begins. As illustrated in Figure 3 B, execution of procedure "main" reaches the "CNVOKE A (1,2,3)" operation. Before process flow jumps to procedure A, the program counter and processor state is pushed onto the stack. This information pushed onto the stack is denoted S2 in Figure 3A. Accordingly, as items are pushed onto the stack, the amount of stack memory space 11 that is used by the stack increases such thai the stack grows downward in the direction, of the illustration. Next, as illustrated in Figure 3B, execution of procedure A reaches the "INVOKE B(XY5Z)" operation. Before processing jumps to procedure B, the program counter and processor state is pushed onto the stack-. This information pushed onto the stack is denoted S3 m Figure 3A. Accordingly, as execution of the software gets deeper and deeper into nested procedure calls, more and more information is pushed onto the stack. The amount of memory space 1 S that .is used increases. The amount of memory space 1.1. that is .free decreases.
{0027J Next, execution of procedure B begins. When the RETURN at the end of procedure B is readied, then processing is to return to procedure A. To return to procedure A., the items S3 are popped off the stack and ate used to restore the CPU's program counter and the CPU's state. The used portion of the memory space 1 1 therefore decreases. Processing returns to procedure A. When the RETURN at the end of procedure A is reached, then processing is to return to procedure "main". To return to procedure "main", the items S 2 are popped off the stack and are used to restore program counter «nd processor state. The used portion of memory space 1.1 therefore decreases further. When the CPU is executing in the procedure "main", the only items on the stack are the items Sl . When the "EXIT (TO OS)" operation at the end of the procedure "main" is reached, then the items Sl are popped off the stack and are used to restore program counter and processor state.
|ϊM32Si When mobile communication device 1 is in use. software execution may be SUCH that many items are pushed onto .many different stacks. The amount of memory space 11 actively being used is large. Xn contrast, whea mobile communication device 1 is in the low power sleep mode, very Hitte software activity takes place. Few or no application layer programs are running and Httle of memory space 1 ϊ is being used by stacks. If the unused portion of memory space 1 1. is realized i« DRAM, then that DRAM meά not be refreshed because nothing is being stored in the unused portion of
DRAM:.
|0029| Figure 4Λ is a simplified diagram that illustrates how the MMU' 6 of mobile communication device i maps virtual memory address space to physical memory address space. The physical memory of memory system 7 is organized as a. plurality of physical memory pases (MPs). ϊn the present example, each physical MP contains 2k memory locations. The software executing on the CPU operates in virtual memory space as if the addresses specified by the software were addresses in one continuous address space. Each 2k address space (referred to here as a "virtual memory page") of the virtual memory space is, however, mapped by MMU 6 to a corresponding one of the physical MPs. US2007/061486
8
}0030{ Figure 4B is a diagram of a table that sets forth one example of such a virtual memory space to physical memory space mapping. Virtual address range (1G2k~(.l04k~ I)) is mapped to physical address range (0~(2k-l)) and to physical memory page 0; virtual address raage (1.8k~(20k~1)) is mapped to physical address range (2k-(4k-l)) a.nd to physical memory page I.; and so forth down the rows of the table. Physical page size is dependent on. the characteristics of the MMU and the physical memory used. The operating system of mobile communication device 1 can write to MMU 6 and change the virtual to physical mapping. By changing the mapping, the virtual address range that addresses a. portion of stack, memory 11 can be changed so that it is no longer mapped to a first page of physical mømory but rather now is mapped to a second page of physical memory. If the contents of the portion of stack memory space 1.1 is copied from the first page to the second page, then when the software executes in virtual address space and accesses a memory location in the virtual address raage, the same contents of stack memory space will be available to the software. Because the software operates in. virtual address space, from the software's perspective the content of memory is identical before and after the remapping.
[00311 Figure 5 is a diagram that illustrates an example of a plurality of memory refresh regions (MRRs) of the DRAIVi 9 of memory system 7. The vertical dimension in the diagram represents the physical address space occupied by DRAM 9. DRAM 9 includes three MRRs denoted MRRl5 MRR2 and MRR3, respectively. Memory controller 8 controls the refreshing of the MRRs of the DRAM. Due to the construction of memory system 7, the refreshing of each MRR can be disabled or enabled independently of the refreshing of the other MRRs. ϊn the illustrated example of Figure 5, the sizes of each of the MRRs is different To disable refreshing of an MRR, MRy.3 writes appropriate control information into memory controller (MC) 8. Memory controller S responds to the control information by stopping the refreshing of the designated MRR. Similarly, MRM 3 can write appropriate control information into memory controller S such that refreshing of a selected MRR is enabled. Memory controller S responds to the control information by initiating refreshing of the designated MRR.
[00321 Figure 6 Is a flowchart of a first novel method of operation of the mobile communication device 1 of Figure i wherein refreshing of an MRR is disabled, thereby saving power that would otherwise be consumed refreshing the MRR. Figure 7 is a diagram that illustrates the contents and organisation of memory in the first method.
100331 Ia a first step (step 200 in Figure 6), a decision is made that mobile comitmra cation device i is to enter a low power sleep modφ. This decision may, for example, be made by sleep manager 2 m response to user input (such, as, for example, due to the user's pressing a power off key).
|.0034| in a second step (step 201), memory refresh ranges (MRRs) are identified that do not contain information that needs to be maintained during sleep mode. Memory refresh manger 3 may, for example, become aware of these MRRs due to heap manager 4 reporting ranges of heap virtual memory space that will not be allocated by the heap manager 4 in upcoming simp mode operation. Similarly, task manager 5 may report ranges of stack virtual memory space that will not used by stacks in the upcoming sleep mode operation. Memory refresh manager 3 maintains knowledge of which virtual memory spaces are mapped to which physical memory pages (MPs), and which physical memory pages (MPs) are disposed in which physical memory refresh regions (MRRs) of -DRAM.. .From the information received from heap manager 4 and task manager 5, and from knowledge of which virtual memory space ranges are mapped to which MRRs, memory refresh manager 3 identifies any MRRs that do not contain information, that needs to be maintained during the sleep mode, (Although the identification of 3VlRRs of step 201 is described here as occurring after the decision of step 200 is made to mier sleep mode, the order of the two steps can be reversed. Alternatively, the identification of MRRs of step 201 csn be a continuously ongoing process.)
J0035J In ih<s example of Figure 7, ranges of virtual addresses NPRl, "NPRZ and NPR3 are ranges of virtual address space, the contents of which do not need to be retained during sleep mode. These ranges NPIUJ , NPR2 ami NFR3 are reported by heap manager 4 and task manager 5 to memory refresh manager 3. Memory refresh manager 3 determines that MRR3 is only mapped to non-preserved ranges (NPR3 in this case) and that MMR3 contains no i«.føm$atioft that needs to be maintained during the sleep mode.
[0036] Next (step 202). memory refresh manager 3 disables refreshing of the identified physical MRRs so that these MRRs are not refreshed during the subsequent sleep mode operation. In ons example, memory refresh manager 3 disables refreshing of these MRRs by writing appropriate control information into tibe memory controller (MC) S of raemory system 7. The control information includes a refresh enable command as well a$ &n indication of the MRRs that need to be refreshed. By omitting from the control information the indications of the MKRs that do not need to be refreshed during sleep mode operation, subsequent operation of MC 8 does not involve refreshing of these MSLRs. In this first novel method, memory refresh manager 3 does not change the virtual memory space to physical memory space mapping stored by KHS-CU 6. In this example, application layer software operation is not disabled. MRRs that will not store information that needs to be retained during sleep mode operation are simply identified and. refreshing of those MRRs is disabled by writing appropriate control information to memory controller S. Ia the example of Figure 7, MRR3 contains no information that must be retained during sleep mode operation. Memory refresh manager 3 therefore controls memory controller 8 to disable refreshing of MRR3.
J0037J Next (step 203), mobile communication device 1 enters sleep mode. Ia the example of Figure 7, when mobile communication device .1 is operating in sleep mode MRR3 is not refreshed. As a result, power consumption is reduced in comparison to a system where unused DRAM is refreshed during sleep mode operation,
|0038| Figure 8 is a flowchart of a second novel method of operation of mobile communication device 1 of Figure 1. Figure 9 is a. diagram that illustrates the contents and organization of memory in the second method. In a first step (step 300 in Figure 8), a decision is made that mobile communication device 1 is to enter a low power sleep mode. This decision may, for example, be made by sleep manager 2 in response to user input (such ass for example, due to the user's pressing a power off key).
}0039J In a second step (step 301). sleep manager 2 invokes MRM 3. MRM 3 responds by disabling task switching and by disabling interrupts (step 302). This disabling is performed so that software that is using memory space that is to be remapped will not be affected during the subsequent remapping process,
{.00401 Next (step 303), MRM 3 Invokes heap manager (HM) 4 and obtains from the heap manager 4 a list of virtual memory ranges in stack memory space, where each virtual memory range is a range of memory spaces that does not need to be refreshed during sleep mode. Heap manager 4 may, for example, designate a predetermined π
amount of heap memory 1.0 as being memory that will not be refreshed during sleep raode. This predetermined amount of heap memory 1.0 may be empirically determined by keeping track of the amount of heap that is not used during multiple periods of sleep mode operation,
10041| Next (step 304), MRM 3 invokes task manager (TM) S and obtains from task manager 5 a list of virtual memory ranges in stack memory space, where each virtual .memory range is a range of memory spaces that will not be used by any stack during sleep mode. Task manager 5 may identify these ranges empirically by keeping track of how deep in the various stacks values were pushed during multiple periods of sleep mode operation. Although one order of invoking the heap manager and task, manager to obtain these virtual memory ranges is shown in the flowchart of Figure S5 the heap and task managers can be invoked in. the other order as well. Alternatively, all information about which areas of virtual address space will not be used during sleep mode may be obtained from either the heap manager or the task manager.
[0042J In. step 305 of Figure 8, MRM 3 determines aa arrangement, that would place the non-preserved ranges (NPRs) in physical memory adjacent to one another, such that entire memory refresh ranges (MEJRs) of DRAM contain only MPRs, This arrangement maximizes or substantially maximizes the total amount of !VIRRs within. DRAM that contain only NFRs.
Ϊ00431 Figure 9 shows the arrangement of NPRs and physical pages before and after step 306 of Figure 8. The leftmost two columns show how MRRs are organized in physical memory. The first coHimxi shows physical memory space realized entirely in DRAM, with the DRAM divided into three different memory refresh ranges (MRRs). The second column shows how memory is organized into physical memory pages (MPs). Physical MPs 0-4 are in MRRL Physical MPs 5-9 are in MRR2, Physical MPs 10-12 are in MR.R3.
{0944} The third and fourth columns in Figure 9 show the non-preserved ranges (NPRs) and their corresponding physical memory pages (MPs) before step 306 of Figure 8. The third column shows the NPRs thai heap manager 4 and task manager 5 marked as not needing refresh during sleep mode. The fourth column shows the physical memory pages thai the corresponding NPRs occupy. Memory space extends downward in the figure so that the page numbers increase from top to bottom of the figure (0-12 in this example), ϊn the third column (which shows the MPs a«d NPRs before step 306), NPRl includes part of MP 0, all of MP 1 , and part of MP 2. NPR2 includes part of MP 3, all of MP 4, mά part of MP 5. NPR3 includes part of MP 6, all of MP 7, and part of MP 8. As the BEFORE columns 3 and 4 of Figure 9 show, each MMR (MRRl3 MRR2 and MRR3) contains at least some information that must be preserved during sleep mode; therefore, refresh cannot be disabled on any of the MMRs during sleep mode unless the NPRs are rearranged.
|0045| The rightmost two columns i» Figure 9 show the result of rearranging memory after step 306 of Figure 8 is complete (the arrangement was determined m step 305). ϊ.n this new mapping, MP 10 (denoted as "OLD PAGE 10*' under the "PHYSICAL PAGES'' column 6 of Figure 9) is copied to MP 1 (denoted as numeral " L" under "PHYSICAL PAGES" columns 2 and 4 and in the same row as "OLD PAGE 10"). Similarly, MP J l is copied to MP 4, and MP 12 is copied to MP 7. All three copied, pages 1.0, .1 I 1 12 require refresh during sleep mode, since they did not reside within the .non-preserved ranges NPRI , NFR2, or N.PR3. Old MP i, which contains information that need not be preserved during sleep mode, Js copied to MP 10 (denoted as "OLD PAGE I" under the "PHYSICAL PAGES" column 6), Likewise., oϊd MP 4 and old MP 7, which also do not need to be preserved, are copied to MPs .1 1 and 12, respectively (denoted as "OLD PAGE 4" and "OLD PAGE 7" in column 6). In the new arrangement, note that MJ? 1, MP 4, and MP 7 ali contain information that need not be preserved during sleep mode, and these pages are all mapped into a single memory management region 3 (MMR3), which contains no pages that require preservation; thus, MMR3 is now a candidate for disabling memory refresh and conserving power during subsequent sleep mode operation.
}ΩG46| If the new arrangement were implemented without remapping virtual to physical memory addresses, then the software could no longer use the same virtual addresses to access information stored in the physical MPs that were moved during step 306. The virtual addresses would now be mapped to other physical memory pages, and software that relied on virtual, addresses would not work correctly. Hence, the need for the memory remapping step 307 of Figure 8.
ΪΘO47| In step 307 of Figure 8, MRM. 3 configures MMU <> so that all memory locations that were moved in. physical address space will have the same virtual addresses they had before step 306 {this step is not shown in Figure 9). Step 30? ensures that the software continues to work properly without requiring changes to the software itself. Once step
307 is complete, the software remains unaware of changes to the physical memory arranges ent determined in step 305 and performed in step 306, and it can retrieve information from the same virtual addresses as it did before physical memory was rearranged.
1.00481 In step 308 of Figure 8, MRM 3 reconfigures the memory controller 7 to disable refresh of KlRRs that contain non-preserved regions (NPRs) only, ϊn Figure 9, only MRR3 can have refresh disabled because if. is the only MRR that consists solely of NfRs (as indicated by the vertical lines next to "OLD PAGE F\ "OLD PAGE 4", and "OLD PAGE T in the fifth column of Figure 9), j'0049| Next (step 308)5 MRM 3 reconfigures the memory controller 7 so that refreshing of MRRs that only contain NPRs is disabled. In the example of Figure 9, MRR3 is only •mapped to fragments of non-preserved ranges. This is indicated by the vertical lines m the second rightmost column of Figure 9 in the rows thai correspond to MRR3. Step
308 involves disabling the refresMttg of MRR3.
[00501 Next (step 309), MRM 3 enables task switching and interrupts {'step 309) so that application layer programs can ru» again and can be allocated sections of heap and can use stacks. Sleep manager 2 then puts mobile communication device 1 into sleep mode (step 3 Ϊ0). When mobile communication device 1 is in sleep mode, the DRAM of MRR3 is not used by software and is not refreshed.
[00Sl| Figure 10 is a flowchart of a third novel method wherein mobile communication device I wakes up after a period of sleep mode operation. Sleep manager 2 decides (step 400) that mobile communication, device 1 is to recover from sleep mode operation and is to return to normal operating mode operation. Sleep manager 2 invokes MRM 3 (step 401). MRM 3 disables task switching and interrupts (step 402) so that a subsequent reconfiguring of memory controller S will not compromise the operation of application layer programs and tasks. MRM 3 then reconfigures the memory controller S so that all MRRs are refreshed (step 403). In the example of Figure % the refreshing of MRR3 is again enabled, thereby reversing the refresh disabling of step 3OS of Figure S. Memory controller S resumes refreshing MRRI, MRR2 and !VfRRS. Next (step 404), MRM! 3 enables task switching and interrupts. Sleep manager 2 then causes mobile communication device 1 to exit sleep .mode operation and the start operation in normal operation mode (step 405). Application layer programs are allowed to run. Where mobile comrøunicalion device ] is a cellular telephone, application layer programs are operable to analyze incoming cellular telephone messages mά to perform other functions such as operation as a digital camera. All heap memory space 10 and all stack memory space 11 realized in DRAM is available for use. Although certain specific embodiments are described above for instructional purposes, the present invention is not. limited thereto. Accordingly,, various modifications, adaptations, and combinations of the various features of the described specific embodiments can be practiced without departing from the scope of the invention as set forth in the claims.

Claims

What is claimed is:
1, A method* comprising:
(a) storing information hi a memory system of a mobile communication, device, the memory system comprising a plurality of memory refresh .regions (MRRs)3, wherein .refreshing of a particular MRR can be disabled independently of a refreshing of others of the KlRRs, wherein the memory system is organized as a plurality of physics! memory pages (MPs);
(b) maintaining a virtual to physical address translation such that each one of a plurality of virtual address ranges is mapped to a corresponding one of the plurality of physical memory pages (MPs);
(o) maintaining information oα which ones of a plurality of the MPs store information, that needs to be maintained in a sleep mode and which oaes of the plurality of MPs do not store information that needs to be maintained when in the sleep mode, wherein a. first of the MPs stores information thai does not need to be maintained, wherein a second of the MPs does store information that needs to be maintained, wherein a third of the MPs does not store information that needs to be maintained, wherein the second aad third MPs are adjacent pages in the memory system* wherein the first MP is a part of a first of said MRRs, and wherein the second and third MPs are parts of a second of said MRRs;
(d) copying information from the second MP to the first MP;
(e) changing the virtual to physical address translation such that the virtual address range that previously was mapped to the second MP is now mapped to the first MP, and such that the virtual address range that was previously mapped to the first MP is now mapped to the second MP; and
(f) configuring the memory system so that said first N-IRR is refreshed in the $]&§p mode but so that said second MRR is not refreshed in the sleep mode.
2. The method of Claim 1, wherein the mobile communication system is a cellular telephone, wherein, the memory refresh regions (MR-Rs) are regions of dynamic random access memory (DRAM).
3. The method of Claim 2. wherein step (o) further comprises: receiving an indication of a portion of heap memory from a heap manager, wherein the heap manager .manages the heap, and wherein the portion of the heap is a portion that will not be used during the sleep mode.
4. The method of Claim 2, wherein step (c) further comprises: receiving an indication of a portion of a stack memory from a task manager, wherein the portion of the stack memory is a portion that will not be a part of any stack during the sleep mode.
5. The method of Claim 2, wherein execution of application layer programs on the mobile communication device is disabled during said changing of the virtual to physical address translation in step (e).
6. The method of Claim 2e wherein the memory system comprises a memory controller and an amount of dynamic random access memory (DRAM), wherein the configuring m " (f) involves configuring the .memory controller.
7. The method of Claim 2, wherein some of the physical memory pages are DRAM, and wherein others of the physical memory pages are another type of memory.
S, The method of Claim 2, wherein information that needs to be maintained in the sleep mode includes information that will not be accessed during the sleep mode, but rather may be accessed after sleep mode operation.
9. The method of Claim 2, wherein the information on which ones of the plurality of the MPs store information that needs to be maintained in a sleep mode in step (c) includes: 1) a list of virt.ua! memory address ranges,, wherein each virtual memory address range in the list is a range of virtual memory addresses that does not need to be maintained m the sleep mode, 2) virtual memory address range to physical memory page translation information, and 3) information on the physical me.tno.ty pages that correspond to each MRR.
10. A rn.et.liod comprising:
(a) storing information in dynamic random access memory (DRAM) in a .mobile communication device, the DRAM comprising a plurality of memory refresh ranges (MBKs), wherein, a refreshing of each MiRR can. be enabled and disabled independently of a refreshing of each other K-QtCL;
(b) using a memory management unit (MMU) on the mobile eotrununicatiαn device to maintain a virtual to physical address space translation, wherein the translation associates each one of a plurality of physical memory pages with a corresponding one of a plurality of virtual memory pages;
(c) identifying particular virtual memory pages that will not be used during a low power mode of operation of the mobile communication device;
(d) reconfiguring the memory management unit to remap the virtual to physical address space translation such that at. least some of the physical memory pages that are mapped to the particular virtual memory pages identified m step (c) are conglomerated to be adjacent one another in physical memory space, the conglomerated physical memory pages being all. the physical memory pages in a first of the MKRs; and
(e) operating the mobile communication device in the low power mode such that the first MRR is not refreshed but such that others of the MRRs are refreshed.
11. The method of Claim 10, wherein step (c) involves receiving a list of ranges of virtual memory space, wherein each range in the list is a range of virtual memory space that will not be used during the low power mode, and wherein step (c) further involves determining which virtual memory pages correspond to each of the ranges in the list.
12. The method of Claim 10, wherein step (c) involves receiving a list of virtual memory pages, wherein each virtual memory page in. the list h & virtual memory page that, will not be used during the low power mode.
13. The method of Claim 10, wherein step (d) involves remapping the virtual to physical address space translation such that said at least, some physical memory pages that are mapped to the particular virtual .memory pages identified hx step (c) are conglomerated to be in the first of the MRRs so that (here are no physical memory pages in the first MRR that will, be used during the low power mode, and such that others of the physical memory pages that are mapped to the particular virtual memory pages identified in step (c) are conglomerated to be in a second of the MRRs so that there are no physical memory pages in the second MRR that will be used during the low power mode, and wherein neither the first MRR nor the second MRR. is refreshed during said operating in the low power mode in step (e),
14. The method of Claim 10, wherein the mobile communication device is a cellular telephone having a heap, wherein a first portion of the heap is identified in step (c) to be a portion of virtual address space that will not be used during the low power .mode of operation of the mobile com muni cation device, and wherein a second portion of the heap Is a portion of virtual address space that, is used during the low power mode of operation of step (e), and wherein both the first portion and second portion are mapped by the MMU to physical memory pages in dynamic random access memory (DRAM).
Ϊ5. The method of Claim 10, wherein the mobile communication device is a ceiiular telephone having a stack memory space, wherein a first portion of the stack memory space is identified in step (c) to be a portion of virtual address space that will not be used during the low power mode of operation, of the mobile communication device, and wherein a second portion of the stack memory space is a portion of virtual address space that is used during the low power mode of operation of step (e), and wherein both the first portion and secε?nd portion are mapped by the MMU to physical memory pages in dynamic random access memory (DRAM).
.
16. A mobile communication device, comprising: aw amount of dynamic random access memory' (DEAM), the DRAM comprising a plurality of memory refresh ranges (MRRs)5 wherein a refreshing of each MRR can be enabled and disabled independently of a refreshing of each other MRR; a memory management unit (MMU) that .maintains a virtual to physical address space translation, wherein the translation associates each one of a plurality of physical memory pages with a corresponding one of a plurality of virtual memory pages; a processor that executes a set of processor-executable instructions, wherein the set of processor-executable Instructions is for performing the steps of:
(a) identifying particular virtual memory pages that will not be used during a low power mode of operation of the mobile communication device;
(b) reconfiguring the MMU to remap the virtual to physical address space translation such that at least some of the physical memory pages that are mapped to the particular virtual memory pages identified, in step (a) are conglomerated to be adjacent one another in physical memory space, the conglomerated physical memory pages being all the physical memory pages in a first of the ME-Rs; and
(c) operating the mobile communication, device in the low power mode such that the first MRR is not. refreshed but such that others of the WRRs are refreshed.
17. The mobile communication, device of Claim 16, wherein step <h) involves remapping a virtual memory page that is used in the operating in step (c), wherein the virtual memory page before the remapping of step (b) is mapped to a first physical memory page, wherein the virtual memory page after the remapping of step (b) is mapped to a second physical memory page, and wherein the set of processor-executable instructions is also for performing the step of:
(d) copying information stored in the first physical memory page to the second physical memory page, and wherein the copying is performed after step (a) and before step (c).
IS. Trie mobile communication device of Claim 17, wherein the second physical memory page is refreshed during operation in. the low power mode in step (c).
19. A device, comprising; an amount of dynamic random access memory (DRAM), the DRAM comprising a plurality of memory refresh ranges (MRRs), wherein a refreshing of each MRR can be independently enabled and disabled; and means for remappiag a virtual to physical address space transtatϊoti such that portions of virtual memory space that will not be used during a subsequent period of relative device inactivity are mapped to physical memory space such all the virtual address space mapped to a set of MRRs is virtual address space that will not be used during the subsequent period, wherein the MRRs of the set are chosen by the means such that the sum of ail the address spaces of the MRRs in the set is substantially maximized.
20. The device of Claim .!£, wherein the device is a cellular telephone, wherein the means comprises a processor, a memory management unit, and set of processor- executable instructions, wherein the means is also for; operating the device m the subsequent period such that refreshing of each, of the M.RRs of the sei is disabled, and such that refreshing of other !VJRRs is enabled.
21. A set of processor-executable instructions stored on a processor-readable medium, the set of processor-executable instructions being for performing the steps of:
(a) storing information in an amount of dynamic random access memory (DRAM) within a device, the DRAM comprising a plurality of memory refresh ranges (MRRs), wherein a refreshing of each MRR can. be enabled and. disabled independently of a refreshing of each, other NfRR:
(b) using a memory management unit (.VtML;) that maintains a virtual to physical address space translation, wherein the translation associates each one of a plurality of physical memory pages with a corresponding one of a plurality of virtual memory pages;
(c) identifying particular virtual memory pages that will not be used during a low power mode of operation of the device; (d) reconfiguring the MMU' to remap the virtual to physical address space translation such ifoat at least some of the physical memory pages that are mapped to the particular virtual memory pages identified in step (c) are conglomerated to bo adjacent one another In physical memory space, the conglomerated physical memory pages being all the physical .memory pages in one of the MRRs; and
(e) operating the device in the low power mode such that said one MRR is not refreshed bι?t such that others of the KIRRs are refreshed.
22. The set of processor-executable instructions of Claim 21, wherein step (d) involves remapping a virtual memory page that is used in the operating m step (e), wherein the virtual memory page before the remapping of step (d) is mapped to a first physical memory page, wherein the virtual memory page after the remapping of step (d) is mapped to a second physical memory page, and wherein the set of processor-executable instructions is also for performing the step of;
(f) copying information stored in the first physical memory page to the second physical memory page5 and wherein the copying is performed after step (c) and before step (d).
23. The set of processor-executable instructions of Claim 21, wherein the device is a mobile communication device.
24. The set of processor-executable instructions of Claim 21, wherein the processor- executable instructions that perform steps (b) through (e) are processor-executable instructions of an operating system executable on th& device.
PCT/US2007/061486 2006-02-01 2007-02-01 Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity WO2007090195A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008553514A JP2009525555A (en) 2006-02-01 2007-02-01 Reduce power consumption by disabling refresh of unused portions of DRAM during periods of device inactivity
EP07762665A EP1979818A1 (en) 2006-02-01 2007-02-01 Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/345,975 US20070180187A1 (en) 2006-02-01 2006-02-01 Reducing power consumption by disabling refresh of unused portions of DRAM during periods of device inactivity
US11/345,975 2006-02-01

Publications (1)

Publication Number Publication Date
WO2007090195A1 true WO2007090195A1 (en) 2007-08-09

Family

ID=38197700

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/061486 WO2007090195A1 (en) 2006-02-01 2007-02-01 Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity

Country Status (6)

Country Link
US (1) US20070180187A1 (en)
EP (1) EP1979818A1 (en)
JP (1) JP2009525555A (en)
KR (1) KR20080094938A (en)
CN (1) CN101379472A (en)
WO (1) WO2007090195A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2466264A (en) * 2008-12-17 2010-06-23 Symbian Software Ltd Memory defragmentation and compaction into high priority memory banks
US11029747B2 (en) 2018-03-30 2021-06-08 Panasonic Intellectual Property Management Co., Ltd. Electronic apparatus and control method for adjusting priority of an application based on activations

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8725992B2 (en) 2008-02-01 2014-05-13 International Business Machines Corporation Programming language exposing idiom calls to a programming idiom accelerator
US8386822B2 (en) 2008-02-01 2013-02-26 International Business Machines Corporation Wake-and-go mechanism with data monitoring
US8316218B2 (en) 2008-02-01 2012-11-20 International Business Machines Corporation Look-ahead wake-and-go engine with speculative execution
US8312458B2 (en) 2008-02-01 2012-11-13 International Business Machines Corporation Central repository for wake-and-go mechanism
US8788795B2 (en) 2008-02-01 2014-07-22 International Business Machines Corporation Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors
US8250396B2 (en) 2008-02-01 2012-08-21 International Business Machines Corporation Hardware wake-and-go mechanism for a data processing system
US8452947B2 (en) 2008-02-01 2013-05-28 International Business Machines Corporation Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms
US8640141B2 (en) * 2008-02-01 2014-01-28 International Business Machines Corporation Wake-and-go mechanism with hardware private array
US8341635B2 (en) 2008-02-01 2012-12-25 International Business Machines Corporation Hardware wake-and-go mechanism with look-ahead polling
US8516484B2 (en) 2008-02-01 2013-08-20 International Business Machines Corporation Wake-and-go mechanism for a data processing system
US8612977B2 (en) 2008-02-01 2013-12-17 International Business Machines Corporation Wake-and-go mechanism with software save of thread state
US8225120B2 (en) * 2008-02-01 2012-07-17 International Business Machines Corporation Wake-and-go mechanism with data exclusivity
US8127080B2 (en) * 2008-02-01 2012-02-28 International Business Machines Corporation Wake-and-go mechanism with system address bus transaction master
US8732683B2 (en) * 2008-02-01 2014-05-20 International Business Machines Corporation Compiler providing idiom to idiom accelerator
US8015379B2 (en) 2008-02-01 2011-09-06 International Business Machines Corporation Wake-and-go mechanism with exclusive system bus response
US8145849B2 (en) 2008-02-01 2012-03-27 International Business Machines Corporation Wake-and-go mechanism with system bus response
US8880853B2 (en) * 2008-02-01 2014-11-04 International Business Machines Corporation CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock
US8171476B2 (en) 2008-02-01 2012-05-01 International Business Machines Corporation Wake-and-go mechanism with prioritization of threads
US7509511B1 (en) * 2008-05-06 2009-03-24 International Business Machines Corporation Reducing register file leakage current within a processor
US8145723B2 (en) 2009-04-16 2012-03-27 International Business Machines Corporation Complex remote update programming idiom accelerator
US8886919B2 (en) 2009-04-16 2014-11-11 International Business Machines Corporation Remote update programming idiom accelerator with allocated processor resources
US8230201B2 (en) 2009-04-16 2012-07-24 International Business Machines Corporation Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system
US8082315B2 (en) 2009-04-16 2011-12-20 International Business Machines Corporation Programming idiom accelerator for remote update
US9411674B2 (en) * 2010-03-19 2016-08-09 Microsoft Technology Licensing, Llc Providing hardware resources having different reliabilities for use by an application
US8412882B2 (en) 2010-06-18 2013-04-02 Microsoft Corporation Leveraging chip variability
EP2715546A1 (en) * 2011-05-26 2014-04-09 Sony Ericsson Mobile Communications AB Optimized hibernate mode for wireless device
JP2013045338A (en) * 2011-08-25 2013-03-04 Fujitsu Mobile Communications Ltd Terminal and memory control method in terminal
JP2013134533A (en) * 2011-12-26 2013-07-08 Fuji Xerox Co Ltd Arithmetic processing system and program
JP5832556B2 (en) * 2012-01-10 2015-12-16 京セラドキュメントソリューションズ株式会社 Image processing apparatus and image forming apparatus
US10157657B2 (en) * 2012-08-28 2018-12-18 Rambus Inc. Selective refresh with software components
KR102062301B1 (en) 2013-01-03 2020-01-03 삼성전자주식회사 Page copy method in memory device and page management method in memory system
JP6163073B2 (en) * 2013-09-26 2017-07-12 キヤノン株式会社 Image processing apparatus, control method therefor, and program
US9972376B2 (en) * 2013-11-07 2018-05-15 International Business Machines Corporation Memory device for interruptible memory refresh
US10096353B2 (en) * 2013-11-07 2018-10-09 International Business Machines Corporation System and memory controller for interruptible memory refresh
US9632562B2 (en) 2014-11-20 2017-04-25 Qualcomm Incorporated Systems and methods for reducing volatile memory standby power in a portable computing device
US9595329B1 (en) 2015-10-16 2017-03-14 Nxp Usa, Inc. Non-volatile random access memory (NVRAM) with backup control
KR102389232B1 (en) * 2015-10-16 2022-04-22 에스케이하이닉스 주식회사 Refresh control device and system including the same
US9972375B2 (en) 2016-04-15 2018-05-15 Via Alliance Semiconductor Co., Ltd. Sanitize-aware DRAM controller
US10664405B2 (en) 2017-11-03 2020-05-26 Google Llc In-memory distributed cache
EP4033365A1 (en) 2021-01-25 2022-07-27 Nordic Semiconductor ASA Memory retention for radio device
US11755496B1 (en) 2021-12-10 2023-09-12 Amazon Technologies, Inc. Memory de-duplication using physical memory aliases

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5928365A (en) * 1995-11-30 1999-07-27 Kabushiki Kaisha Toshiba Computer system using software controlled power management method with respect to the main memory according to a program's main memory utilization states
US20030023825A1 (en) * 2001-07-30 2003-01-30 Woo Steven C Consolidation of allocated memory to reduce power consumption
US20030056079A1 (en) * 2001-09-20 2003-03-20 Shim Jae Wook Method for converting addresses in a semiconductor memory device and apparatus therefor
US20030217246A1 (en) * 2002-05-17 2003-11-20 Kenichi Kubota Memory control apparatus, method and program

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07200295A (en) * 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd Microprocessor, memory controller and computer system
JP2003044354A (en) * 2001-07-26 2003-02-14 Matsushita Electric Ind Co Ltd Memory controller
JP2005011434A (en) * 2003-06-19 2005-01-13 Mitsubishi Electric Corp Dynamic memory control device, and portable terminal using the same
GB2406668B (en) * 2003-10-04 2006-08-30 Symbian Ltd Memory management in a computing device
JP2006012267A (en) * 2004-06-24 2006-01-12 Mitsubishi Electric Corp Memory device
US7823158B2 (en) * 2005-08-18 2010-10-26 International Business Machines Corporation Adaptive scheduling and management of work processing in a target context in resource contention

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5928365A (en) * 1995-11-30 1999-07-27 Kabushiki Kaisha Toshiba Computer system using software controlled power management method with respect to the main memory according to a program's main memory utilization states
US20030023825A1 (en) * 2001-07-30 2003-01-30 Woo Steven C Consolidation of allocated memory to reduce power consumption
US20030056079A1 (en) * 2001-09-20 2003-03-20 Shim Jae Wook Method for converting addresses in a semiconductor memory device and apparatus therefor
US20030217246A1 (en) * 2002-05-17 2003-11-20 Kenichi Kubota Memory control apparatus, method and program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2466264A (en) * 2008-12-17 2010-06-23 Symbian Software Ltd Memory defragmentation and compaction into high priority memory banks
US11029747B2 (en) 2018-03-30 2021-06-08 Panasonic Intellectual Property Management Co., Ltd. Electronic apparatus and control method for adjusting priority of an application based on activations

Also Published As

Publication number Publication date
EP1979818A1 (en) 2008-10-15
CN101379472A (en) 2009-03-04
US20070180187A1 (en) 2007-08-02
JP2009525555A (en) 2009-07-09
KR20080094938A (en) 2008-10-27

Similar Documents

Publication Publication Date Title
WO2007090195A1 (en) Reducing power consumption by disabling refresh of unused portions of dram during periods of device inactivity
US10310757B2 (en) Systems and methods for memory power saving via kernel steering to memory balloons
US20110296095A1 (en) Data movement engine and memory control methods thereof
US9329995B2 (en) Memory device and operating method thereof
US6732241B2 (en) Technique for migrating data between storage devices for reduced power consumption
US6948029B2 (en) DRAM device and refresh control method therefor
US20080320203A1 (en) Memory Management in a Computing Device
US7196961B2 (en) Memory control device
US10878880B2 (en) Selective volatile memory refresh via memory-side data valid indication
US20070005998A1 (en) Various apparatuses and methods for reduced power states in system memory
US20030217246A1 (en) Memory control apparatus, method and program
US9594681B2 (en) Dynamically configurable memory
US10976800B2 (en) Electronic device capable of reducing power consumption and method for reducing power consumption of electronic device
US20040148481A1 (en) Method and apparatus for memory management
CN101743597A (en) Methods, circuits, and systems to select memory regions
KR20050120344A (en) Self refresh current saving method of sdram using data backup
US9411674B2 (en) Providing hardware resources having different reliabilities for use by an application
EP1761932A1 (en) Dram with half and full density operation
US20020138690A1 (en) System and method for performing a partial DRAM refresh
US10430096B2 (en) Hybrid storage device, computer, control device, and power consumption reduction method
CN103207838A (en) Method for improving property of chip
US20210191737A1 (en) System and method for providing system level sleep state power savings
KR100594439B1 (en) Battery saving method of handheld device using memory control
US20060129753A1 (en) Dynamic packing of volatile memory
JP2010286964A (en) Computer and power supply management method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2007762665

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 1534/MUMNP/2008

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 200780003988.5

Country of ref document: CN

WWE Wipo information: entry into national phase

Ref document number: 2008553514

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE