WO2008010919A3 - Methods and apparatus for planar extension of electrical conductors beyond the edges of a substrate - Google Patents

Methods and apparatus for planar extension of electrical conductors beyond the edges of a substrate Download PDF

Info

Publication number
WO2008010919A3
WO2008010919A3 PCT/US2007/015529 US2007015529W WO2008010919A3 WO 2008010919 A3 WO2008010919 A3 WO 2008010919A3 US 2007015529 W US2007015529 W US 2007015529W WO 2008010919 A3 WO2008010919 A3 WO 2008010919A3
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
edge
extended
inquiry
translator
Prior art date
Application number
PCT/US2007/015529
Other languages
French (fr)
Other versions
WO2008010919A2 (en
Inventor
Morgan T Johnson
Original Assignee
Octavian Scient Inc
Morgan T Johnson
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Octavian Scient Inc, Morgan T Johnson filed Critical Octavian Scient Inc
Publication of WO2008010919A2 publication Critical patent/WO2008010919A2/en
Publication of WO2008010919A3 publication Critical patent/WO2008010919A3/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks

Abstract

Concurrent electrical access to the pads of integrated circuits on a wafer is provided by an edge-extended wafer translator that carries signals from one or more pads on one or more integrated circuits to contact terminals on the inquiry-side of the edge-extended wafer translator, including portions of the inquiry-side that are superjacent the wafer when the wafer and the edge-extended wafer translator are in a removably attached state, and portions of the inquiry side that reside outside a region defined by the intersection of the wafer and the edge-extended wafer translator. In a further aspect of the present invention, access to the pads of integrated circuits on a wafer is additionally provided by contact terminals in a second inquiry area located on the wafer-side of the edge-extended wafer translator in a region thereof bounded by its outer circumference and the circumference of the attached wafer.
PCT/US2007/015529 2006-07-07 2007-07-07 Methods and apparatus for planar extension of electrical conductors beyond the edges of a substrate WO2008010919A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US81931806P 2006-07-07 2006-07-07
US60/819,318 2006-07-07

Publications (2)

Publication Number Publication Date
WO2008010919A2 WO2008010919A2 (en) 2008-01-24
WO2008010919A3 true WO2008010919A3 (en) 2008-10-02

Family

ID=38957270

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/015529 WO2008010919A2 (en) 2006-07-07 2007-07-07 Methods and apparatus for planar extension of electrical conductors beyond the edges of a substrate

Country Status (3)

Country Link
US (2) US7459924B2 (en)
TW (2) TWI600099B (en)
WO (1) WO2008010919A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8076216B2 (en) * 2008-11-11 2011-12-13 Advanced Inquiry Systems, Inc. Methods and apparatus for thinning, testing and singulating a semiconductor wafer
US7453277B2 (en) 2006-06-06 2008-11-18 Advanced Inquiry Systems, Inc. Apparatus for full-wafer test and burn-in mechanism
US7459924B2 (en) * 2006-07-07 2008-12-02 Advanced Inquiry Systems, Inc. Apparatus for providing electrical access to one or more pads of the wafer using a wafer translator and a gasket
US8536062B2 (en) * 2007-09-21 2013-09-17 Advanced Inquiry Systems, Inc. Chemical removal of oxide layer from chip pads
US20100066395A1 (en) * 2008-03-13 2010-03-18 Johnson Morgan T Wafer Prober Integrated With Full-Wafer Contacter
US8088634B2 (en) 2008-11-11 2012-01-03 Johnson Morgan T Methods of adding pads and one or more interconnect layers to the passivated topside of a wafer including connections to at least a portion of the integrated circuit pads thereon
US9176186B2 (en) 2009-08-25 2015-11-03 Translarity, Inc. Maintaining a wafer/wafer translator pair in an attached state free of a gasket disposed
US8362797B2 (en) * 2009-08-25 2013-01-29 Advanced Inquiry Systems, Inc. Maintaining a wafer/wafer translator pair in an attached state free of a gasket disposed therebetween
US8344749B2 (en) 2010-06-07 2013-01-01 Texas Instruments Incorporated Through carrier dual side loop-back testing of TSV die after die attach to substrate
US8405414B2 (en) 2010-09-28 2013-03-26 Advanced Inquiry Systems, Inc. Wafer testing systems and associated methods of use and manufacture
US8622752B2 (en) * 2011-04-13 2014-01-07 Teradyne, Inc. Probe-card interposer constructed using hexagonal modules

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098680B2 (en) * 2002-10-31 2006-08-29 Advantest Corp. Connection unit, a board for mounting a device under test, a probe card and a device interfacing part

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912399A (en) * 1987-06-09 1990-03-27 Tektronix, Inc. Multiple lead probe for integrated circuits in wafer form
EP0305951B1 (en) * 1987-08-31 1994-02-02 Everett/Charles Contact Products Inc. Testing of integrated circuit devices on loaded printed circuit boards
JPH06232233A (en) * 1992-12-23 1994-08-19 Honeywell Inc Testing device of nude die
KR0140034B1 (en) * 1993-12-16 1998-07-15 모리시다 요이치 Semiconductor wafer case, connection method and apparatus, and inspection method for semiconductor integrated circuit, probe card, and its manufacturing method
US5600257A (en) * 1995-08-09 1997-02-04 International Business Machines Corporation Semiconductor wafer test and burn-in
DE19654404A1 (en) * 1996-12-24 1998-06-25 Hewlett Packard Co Adaptation device for the electrical test of printed circuit boards
JP3565086B2 (en) * 1999-04-16 2004-09-15 富士通株式会社 Probe card and method for testing semiconductor device
US7215131B1 (en) * 1999-06-07 2007-05-08 Formfactor, Inc. Segmented contactor
US6965244B2 (en) * 2002-05-08 2005-11-15 Formfactor, Inc. High performance probe system
US6991969B2 (en) * 2003-02-19 2006-01-31 Octavian Scientific, Inc. Methods and apparatus for addition of electrical conductors to previously fabricated device
US7282931B2 (en) * 2003-02-19 2007-10-16 Octavian Scientific, Inc. Full wafer contacter and applications thereof
TWI287634B (en) * 2004-12-31 2007-10-01 Wen-Chang Dung Micro-electromechanical probe circuit film, method for making the same and applications thereof
US7570796B2 (en) * 2005-11-18 2009-08-04 Kla-Tencor Technologies Corp. Methods and systems for utilizing design data in combination with inspection data
US7453277B2 (en) * 2006-06-06 2008-11-18 Advanced Inquiry Systems, Inc. Apparatus for full-wafer test and burn-in mechanism
US7456643B2 (en) * 2006-06-06 2008-11-25 Advanced Inquiry Systems, Inc. Methods for multi-modal wafer testing using edge-extended wafer translator
US7459924B2 (en) * 2006-07-07 2008-12-02 Advanced Inquiry Systems, Inc. Apparatus for providing electrical access to one or more pads of the wafer using a wafer translator and a gasket
US7572132B2 (en) * 2006-07-18 2009-08-11 Advanced Inquiry Systems, Inc. Methods and apparatus for flexible extension of electrical conductors beyond the edges of a substrate
US7489148B2 (en) * 2006-07-28 2009-02-10 Advanced Inquiry Systems, Inc. Methods for access to a plurality of unsingulated integrated circuits of a wafer using single-sided edge-extended wafer translator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098680B2 (en) * 2002-10-31 2006-08-29 Advantest Corp. Connection unit, a board for mounting a device under test, a probe card and a device interfacing part

Also Published As

Publication number Publication date
TWI600099B (en) 2017-09-21
US7459924B2 (en) 2008-12-02
WO2008010919A2 (en) 2008-01-24
TWI445109B (en) 2014-07-11
TW201448082A (en) 2014-12-16
US7724008B2 (en) 2010-05-25
US20080018341A1 (en) 2008-01-24
TW200811979A (en) 2008-03-01
US20090189627A1 (en) 2009-07-30

Similar Documents

Publication Publication Date Title
WO2008010919A3 (en) Methods and apparatus for planar extension of electrical conductors beyond the edges of a substrate
WO2007145968A3 (en) Methods and apparatus for multi-modal wafer testing
TW200630672A (en) System and method for display testing
AU2003237195A1 (en) High performance probe system for testing semiconductor wafers
WO2004028120A3 (en) Methods and apparatuses for an integrated wireless device
WO2007038309A3 (en) Magnetic components
AU2001255389A1 (en) Semiconductor handler for rapid testing
TW200638145A (en) Display apparatus and method of manufacturing the same
WO2008099863A1 (en) Semiconductor, semiconductor device, and complementary transistor circuit device
TW200742966A (en) Substrate biasing apparatus
WO2008011428A3 (en) Shape adaptable resistive touchpad
TW200629512A (en) Non-circular via holes for bumping pads and related structures
WO2006113395A3 (en) Parallel field effect transistor structure having a body contact
ATE513303T1 (en) ELECTRICAL SWITCHING DEVICE
TW200625544A (en) Phase change memory device and method of manufacturing
WO2011110255A3 (en) Measuring tip comprising an integrated measuring transducer
HK1128832A1 (en) Antenna device
EP1748476A4 (en) Electrode pad on conductive semiconductor substrate
TW200503111A (en) Semiconductor device and method of manufacturing the same
TW200617410A (en) Semiconductor wafer and inspection method thereof
WO2009001170A3 (en) Filter having impedance matching circuits
TW200741962A (en) Interconnect structure and method of forming the same
WO2006138445A3 (en) Methods and substrates for conducting assays
WO2006113865A3 (en) Auto-calibration label and method of forming the same
NL1035213A1 (en) Base plate for built-in electrical devices.

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07835998

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

NENP Non-entry into the national phase

Ref country code: RU

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC, EPO FORM 1205A DATED 12.05.09

122 Ep: pct application non-entry in european phase

Ref document number: 07835998

Country of ref document: EP

Kind code of ref document: A2