WO2008011296A2 - Process and system for quality management and analysis of via drilling - Google Patents
Process and system for quality management and analysis of via drilling Download PDFInfo
- Publication number
- WO2008011296A2 WO2008011296A2 PCT/US2007/073103 US2007073103W WO2008011296A2 WO 2008011296 A2 WO2008011296 A2 WO 2008011296A2 US 2007073103 W US2007073103 W US 2007073103W WO 2008011296 A2 WO2008011296 A2 WO 2008011296A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- capture pad
- value
- blind via
- appearance
- laser
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/4763—Deposition of non-insulating, e.g. conductive -, resistive -, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/03—Observing, e.g. monitoring, the workpiece
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/06—Shaping the laser beam, e.g. by masks or multi-focusing
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
- B23K26/382—Removing material by boring or cutting by boring
- B23K26/389—Removing material by boring or cutting by boring of fluid openings, e.g. nozzles, jets
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B44—DECORATIVE ARTS
- B44C—PRODUCING DECORATIVE EFFECTS; MOSAICS; TARSIA WORK; PAPERHANGING
- B44C1/00—Processes, not specifically provided for elsewhere, for producing decorative surface effects
- B44C1/22—Removing surface-material, e.g. by engraving, by etching
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L21/00—Vacuum gauges
- G01L21/30—Vacuum gauges by making use of ionisation effects
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/42—Printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/163—Monitoring a manufacturing process
Definitions
- the present invention relates to a process and system for laser forming blind vias in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry.
- CAD computer aided design
- UV laser and image projection processing has been used for drilling blind via in integrated circuits (IC) packaging substrates.
- the current process typically applies a single set of laser operating parameters to all vias or holes that are intended to yield the same geometry between two layers in a printed circuit design.
- capture pad geometry due to varying capture pad geometry, the end results are sometimes less than desirable.
- the results vary from "dark" copper when drilling in a solid copper plane, to delaminated copper on 110 micrometer (Mm) copper capture pads.
- a process for laser forming a blind via in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry can include for at least one blind via to be formed in at least one layer of a circuit substrate, evaluating a capture pad geometry value (such as area and/or volume) within a predetermined distance from a drilling location with respect to a blind via geometry value (such as area and/or volume) to be formed at the drilling location.
- the process can also include setting at least one laser operating parameter based on the evaluation in order to obtain a desired capture pad appearance after blind via formation.
- a process for laser forming a blind via in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry can include imaging a capture pad area defined as an area within a predetermined distance from a blind via drilling location in at least one layer of a circuit substrate, quantifying an appearance value for the imaged capture pad area, and determining acceptability of the imaged capture pad area based on the quantified appearance value.
- FIG. 1 is a simplified schematic view of a system for laser forming vias in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry;
- FIG. 2 is a detail of a CAD/CAM circuit layout pattern having a plurality of capture pads of varying geometry, where a blind via is to be drilled in a center of a capture pad, and where a phantom circle defines a capture pad area within a predetermined distance from a drilling location;
- FIG. 3 is a cross-seclional view taken as shown in FIG. 2 illustrating stacked v ⁇ as and vias drilled in a plurality of capture pads of varying geometry;
- FIGS . 4A through 4E illustrate a comparison of copper appearance in drilled blind via using different laser operating parameters, or applying a fixed set of laser operating parameters to capture pads of varying geometry, where FIG. 4 A corresponds to a subjective "shiny" surface texture, FIG 4C corresponds to a subjective "matt” or “grainy” surface texture and FIG. 4E corresponds to a subjective "dark” surface texture; and
- FIG. 5 illustrates a simplified schematic flow diagram of a process for laser forming a blind via in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry.
- a process or method for quality management and analysis of blind via can include a CAD/CAM system 10 including circuit layout design data.
- the CAD design data can include at least one layer of a circuit substrate having a plurality of capture pads of varying geometry including drilling locations and sizes for forming vias and/or blind vias therein.
- the CAD design data can be transferred by any suitable means, schematically illustrated as arrow 12, to a laser processing system 14.
- laser operating parameters can be set or associated with the CAD design data received from the CAD/CAM system in order to laser form a via or blind via in at least one layer of the circuit substrate.
- the process can then include an imaging device or station 16 located in-line (or on-line) or off-line, to analyze pad and via location to generate a quality index or appearance value.
- Quality index value information can be fed back to the laser processing system 14 through any suitable means, schematically illustrated as arrow 18 for laser operating parameter verification, adjustment or optimization, and/or can be fed back to the CAD/CAM system 10 through any suitable means, schematically illustrated as arrow 20, for verification, adjustment or optimization of the location/geometry of formed via and capture pads, and for mapping quality index or appearance values corresponding to each location/geometry.
- the present invention can be used for quality management and analysis and/or as a feedback signal to the prior design and/or processing systems in order to verify and/or adjust current locations, geometries and/or operating parameters in order to obtain a desired capture pad appearance after blind via formation.
- a CAD/CAM circuit layout pattern 22 is illustrated in detail where a plurality of capture pads 24 of varying geometry are to be formed with a blind via 26 in a drilling location associated with the capture pad.
- the outer phantom perimeter 28 illustrates a radial distance or other predetermined distance for analysis where copper capture pad appearance is not affected outside the boundary of perimeter 28.
- Copper pad geometry data along with via drilling size, can be used to evaluate a capture pad geometry value connected to a drilling location within a predetermined distance from the drilling location versus a blind via geometry value to be formed at the drilling location.
- the evaluation can include value comparison, and/or lookup tables, and/or calculations, or the like.
- a ratio of capture pad geometry value to blind via geometry value can be calculated in order to rank the ratios into predetermined ranges associated with the use of different laser processing parameters.
- the CAD system 10 can send blind via drill location/geometry information, capture pad location/geometry information, and/or pad/via geometry ratio or corresponding laser operating parameters to the laser drill system 14.
- an evaluation of the capture pad geometry value with respect to the blind via geometry value can be performed and/or the values can be ranked by the laser drill system, so that different laser operating parameters can be applied.
- the CAD system can segregate a geometry value, such as a single-tool drill file, into a multi-tool drill file based on the evaluation of capture pad geometry value (such as area and/or volume) with respect to blind via geometry value (such as area and/or volume), as evaluated in the CAD system.
- the analysis can also include a comparison to previous drill steps to determine if stacked vias (such as that illustrated to the left of FIG. 3) are present.
- separate laser drill files can be generated based on capture pad geometry value to blind via geometry value ratios ranked into different groups to set different laser operating parameters for each group, such as a destination layer, laser fluence, number of pulses, pulse width, or any combination thereof.
- stacked blind vias can be assigned a destination layer value of 14; ratios in the range of 1% to 13% can be assigned a destination layer value of 15; ratios greater than 13% and up to 17% can be assigned a destination layer value of 16; ratios greater than 17% and up to 20% can be assigned a destination layer value of 17; and ratios greater than 20% up to 100% can be assigned a destination of layer value of 18.
- a multi tool drill file can be generated based on the ratio of via geometry value (e.g. area or volume) versus capture pad geometry (e.g. area or volume) as evaluated in the CAD system, or in the laser processing system, or any combination thereof.
- the imaging device or station 16 can evaluate and quantify an appearance of the capture pad after via formation.
- the appearance of the capture pad can vary from "dark" copper when drilling in a solid copper plane (illustrated in FIG. 4E) to de laminated copper on 110 micrometer ( ⁇ m) copper pads (illustrated in FIG. 4A). Copper appearances can also vary in drilled blind via using different laser parameters.
- the appearance illustrated in FIG. 4A is typically referred to by the descriptive subjective term "shiny" surface texture.
- the copper appearance illustrated in FIG. 4C is typically referred to by the descriptive subjective term "matt" or "grainy” surface texture.
- FIG. 4E is typically referred to by the descriptive subjective term "dark” surface texture.
- FIG. 4B illustrates a copper appearance which falls between what is subjectively referred to as “shiny” and “matt” surface textures.
- FIG. 4D illustrates a copper appearance that falls between the subjective description of "dark” and “matt” surface textures.
- the subjective character of the terms used to describe the copper capture pad appearance after blind via formation has hindered quality control and processing control efforts.
- the present invention according to one embodiment can use a vision system 16 to quantify an appearance of the capture pad. This enables a user to reference copper appearance as a number, rather than as merely a descriptive subjective term.
- the process or method according to one embodiment of the present invention can include performing a histogram analysis and/or fractal dimension analysis to provide at least one numerical appearance value. For example, if the "matt" or "grainy" surface texture of a copper capture pad is preserved during laser machining of a blind via, then the fractal dimension will be high (salt and pepper effect) and the intensity distribution in the histogram will be bimodal with roughly equal area in each intensity group.
- the properties of an image of a capture pad can be quantified by a number for fractal dimension and by a number for the symmetry between two populations in the histogram.
- a higher fractal dimension value can correspond to a "matt" or "grainy” surface texture of a copper capture pad.
- a lower fractal dimension value can correspond to a "shiny" surface texture of a copper capture pad.
- a histogram value approximating unity (one) can correspond to a "matt” or “grainy” surface texture of a copper capture pad.
- a histogram value less than unity (one) can correspond to a "shiny” surface texture or a copper capture pad.
- a histogram value greater than unity (one) can correspond to a "dark” surface texture of a copper capture pad.
- the quantified numbers can be transferred back to the laser processing system 14 and/or CAD/CAM system 10 to verify, adjust, and/or optimize the laser processing parameters in order to minimize the quality variance in drilling results over an entire circuit pattern.
- the CAD/CAM system can analyze a relation between pad geometry and via quality with the quantified numbers from the vision imaging device or station 16.
- the vision imaging device or a station 16 can also perform other measurements, such as top/bottom diameter and circularity measurements.
- a process for laser forming a blind via in at least one layer of a circuit substrate having a plurality of capture pads of varying geometry can include for at least one blind via to be formed in at least one layer of a circuit substrate, evaluating a capture pad geometry value (such as area and/or volume) within predetermined distance from a drilling location with respect to a blind via geometry value (such as area and/or volume) to be formed at the drilling location.
- the process can include setting at least one laser operating parameter based on the evaluation in order to obtain a desired capture pad appearance after blind via formation.
- the at least one laser process parameter to be set can be selected from a group consisting of laser fluence, number of laser pulses, laser pulse width and any combination thereof.
- the process can include comparing a given drill layer to an adjacent drill layer to determine if blind vias are stacked one on top of another.
- the process according to one embodiment of the present invention can include defining a drill layer, defining a scan area adjacent a drill location in the defined drill layer, defining a set of evaluation ranges, wherein the evaluation ranges can include calculated ratios defined as a capture pad geometry value (such as area and/or volume) within a predetermined distance from a drilling location with respect to a blind via geometry value (such as area and/or volume) to be formed at the drilling location, 'and selecting a destination layer for drill tools corresponding to a particular set of ratio ranges.
- a capture pad geometry value such as area and/or volume
- a blind via geometry value such as area and/or volume
- a process according to one embodiment of the present invention can include imaging a capture pad area defined as an area within a predetermined distance from a blind via drilling location in at least one layer of a circuit substrate, quantifying an appearance value for the imaged capture pad area, and determining acceptability of the imaged capture pad area based on the quantified appearance value.
- the appearance value can be quantified as a numeric appearance value for the imaged capture pad area to minimize subjectivity in a quality judgment of a laser-formed blind via in the imaged capture pad area.
- the numeric appearance value can be obtained according to an embodiment of the present invention by performing a fractal dimension analysis on the imaged capture pad area to obtain a numeric value for fractal dimension, where a higher value corresponds to a subjective "matt” or “grainy” surface texture and a lower value correspondence to a subjective "shiny" surface texture for the imaged capture pad area.
- the numeric appearance value can be obtained according to an embodiment of the present invention by performing a histogram analysis on the imaged capture pad area to obtain a numeric value for symmetry between populations in the histogram, where a value approximating unity (one) corresponds to a subjective "matt” or “grainy” surface texture, a value smaller than unity (one) corresponds to a subjective "shiny” surface texture and a value greater than unity (one) corresponds to a subjective "dark” surface texture of the imaged capture pad area.
- the numerical appearance value according to an embodiment of the present invention can include performing a histogram analysis and a fractal dimension analysis on the imaged capture pad area to quantify one or more numeric appearance values for the image capture pad area.
- Acceptability of the imaged capture pad area can be based on the quantified appearance value.
- the process can include analyzing a relationship between capture pad geometry value (such as area and/or volume) with respect to blind via geometry value (such as area and/or volume) for evaluation/comparison with respect to at least one appearance value for a plurality of imaged capture pad areas to minimize variance in quality of laser formed blind via over an entire circuit pattern.
- At least one laser processing parameter can be verified, adjusted, and/or optimized based on the relationship analyzed between the capture pad geometry value (such as area and/or volume) with respect to blind via geometry value (such as area and/or volume) and at least one appearance value for a plurality of captured pad areas with laser formed blind via located in the imaged capture pad areas.
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE112007001549T DE112007001549T5 (en) | 2006-07-11 | 2007-07-10 | Method and system for quality management and analysis of through-hole drilling |
JP2009519620A JP5330991B2 (en) | 2006-07-11 | 2007-07-10 | Method and system for quality control and analysis of via drilling |
GB0900113A GB2453286A (en) | 2006-07-11 | 2007-07-10 | Process and system for quality management and analysis of via drilling |
CN2007800258810A CN101490826B (en) | 2006-07-11 | 2007-07-10 | Process and system for quality management and analysis of via drilling |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/484,531 US7544304B2 (en) | 2006-07-11 | 2006-07-11 | Process and system for quality management and analysis of via drilling |
US11/484,531 | 2006-07-11 |
Publications (2)
Publication Number | Publication Date |
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WO2008011296A2 true WO2008011296A2 (en) | 2008-01-24 |
WO2008011296A3 WO2008011296A3 (en) | 2008-04-24 |
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ID=38948195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2007/073103 WO2008011296A2 (en) | 2006-07-11 | 2007-07-10 | Process and system for quality management and analysis of via drilling |
Country Status (9)
Country | Link |
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US (2) | US7544304B2 (en) |
JP (2) | JP5330991B2 (en) |
KR (1) | KR101475530B1 (en) |
CN (2) | CN103358031B (en) |
DE (1) | DE112007001549T5 (en) |
GB (1) | GB2453286A (en) |
SG (1) | SG173323A1 (en) |
TW (1) | TWI409007B (en) |
WO (1) | WO2008011296A2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7544304B2 (en) * | 2006-07-11 | 2009-06-09 | Electro Scientific Industries, Inc. | Process and system for quality management and analysis of via drilling |
US7962232B2 (en) * | 2006-10-01 | 2011-06-14 | Dell Products L.P. | Methods and media for processing a circuit board |
FR2957481B1 (en) * | 2010-03-10 | 2012-08-31 | Commissariat Energie Atomique | INTERCONNECTION STRUCTURE COMPRISING VIAS BORGNES FOR METALLIZATION |
CN103245312A (en) * | 2012-02-10 | 2013-08-14 | 文坦自动化有限公司 | Analysis method of drill hole quality |
US9629313B1 (en) * | 2013-01-29 | 2017-04-25 | Victor A. Grossman | System for growing plants and method of operation thereof |
CN103714203B (en) * | 2013-12-20 | 2016-08-03 | 柳州腾龙煤电科技股份有限公司 | Log sheet automatic mapping method based on CAD template binding technology |
CN111610740B (en) * | 2020-06-03 | 2021-07-02 | 上海柏楚数控科技有限公司 | Processing control method and system, first and second control devices, and storage medium |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5879787A (en) * | 1996-11-08 | 1999-03-09 | W. L. Gore & Associates, Inc. | Method and apparatus for improving wireability in chip modules |
US20020021138A1 (en) * | 1996-11-08 | 2002-02-21 | John J. Budnaitis | Method of wafer level burn-in |
US20040146917A1 (en) * | 2001-08-03 | 2004-07-29 | Nanosphere, Inc. | Nanoparticle imaging system and method |
US20040258310A1 (en) * | 2003-02-14 | 2004-12-23 | The University Of Chicago | Method and system for fractal-based analysis of medical image texture |
US20050169514A1 (en) * | 1999-05-04 | 2005-08-04 | Speedline Technologies, Inc. | Systems and methods for detecting defects in printed solder paste |
US20060037192A1 (en) * | 2004-08-17 | 2006-02-23 | Nokia Corporation | Printed wiring board without traces on surface layers enabling PWB's without solder resist |
Family Cites Families (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5227614A (en) | 1986-08-15 | 1993-07-13 | Norand Corporation | Core computer processor module, and peripheral shell module assembled to form a pocket size data capture unit |
US5293026A (en) * | 1991-01-28 | 1994-03-08 | Eaton Corporation | Hardsurfacing material for engine components and method for depositing same |
US5293025A (en) | 1991-08-01 | 1994-03-08 | E. I. Du Pont De Nemours And Company | Method for forming vias in multilayer circuits |
US5243140A (en) | 1991-10-04 | 1993-09-07 | International Business Machines Corporation | Direct distribution repair and engineering change system |
AU5538494A (en) | 1992-10-30 | 1994-05-24 | Microbilt Corporation | Multi-reader transaction terminal |
US5561282A (en) | 1993-04-30 | 1996-10-01 | Microbilt Corporation | Portable signature capture pad |
US5448044A (en) | 1993-04-30 | 1995-09-05 | Microbilt Corporation | Signature capture pad for point of sale system |
US5686790A (en) | 1993-06-22 | 1997-11-11 | Candescent Technologies Corporation | Flat panel device with ceramic backplate |
US5464682A (en) * | 1993-12-14 | 1995-11-07 | International Business Machines Corporation | Minimal capture pads applied to ceramic vias in ceramic substrates |
US5518964A (en) | 1994-07-07 | 1996-05-21 | Tessera, Inc. | Microelectronic mounting with multiple lead deformation and bonding |
US5830782A (en) | 1994-07-07 | 1998-11-03 | Tessera, Inc. | Microelectronic element bonding with deformation of leads in rows |
US5614114A (en) | 1994-07-18 | 1997-03-25 | Electro Scientific Industries, Inc. | Laser system and method for plating vias |
ES2124023T3 (en) | 1994-10-14 | 1999-01-16 | United Parcel Service Inc | MULTI-PHASE PACKAGE TRACKING SYSTEM. |
EP1489550B1 (en) | 1994-10-25 | 2011-07-20 | United Parcel Service Of America, Inc. | Automatic electronic camera for label image capture |
US5813331A (en) | 1995-09-22 | 1998-09-29 | Motorola, Inc. | Method of printing with a differential thickness stencil |
US5724889A (en) | 1995-09-22 | 1998-03-10 | Motorola, Inc. | Stencil shifter |
US5699613A (en) | 1995-09-25 | 1997-12-23 | International Business Machines Corporation | Fine dimension stacked vias for a multiple layer circuit board structure |
US5757079A (en) | 1995-12-21 | 1998-05-26 | International Business Machines Corporation | Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages and the resulting MLTF structure |
US6631558B2 (en) | 1996-06-05 | 2003-10-14 | Laservia Corporation | Blind via laser drilling system |
WO1997046349A1 (en) | 1996-06-05 | 1997-12-11 | Burgess Larry W | Blind via laser drilling system |
US5787578A (en) | 1996-07-09 | 1998-08-04 | International Business Machines Corporation | Method of selectively depositing a metallic layer on a ceramic substrate |
GB9620229D0 (en) | 1996-09-27 | 1996-11-13 | Graphers Systems Ltd | Apparatus for measuring the quality of spot welds |
US6541709B1 (en) | 1996-11-01 | 2003-04-01 | International Business Machines Corporation | Inherently robust repair process for thin film circuitry using uv laser |
WO1998020557A1 (en) | 1996-11-08 | 1998-05-14 | W.L. Gore & Associates, Inc. | Method for reducing via inductance in an electronic assembly and device |
US7301748B2 (en) | 1997-04-08 | 2007-11-27 | Anthony Anthony A | Universal energy conditioning interposer with circuit architecture |
US7110227B2 (en) | 1997-04-08 | 2006-09-19 | X2Y Attenuators, Llc | Universial energy conditioning interposer with circuit architecture |
JP3488614B2 (en) * | 1998-01-09 | 2004-01-19 | 三菱電機株式会社 | Laminate material recess inspection device and laser processing device |
CA2252298A1 (en) * | 1998-03-31 | 1999-09-30 | Molly S. Shoichet | New fluoromonomers and methods of production, and new fluoropolymers produced therefrom |
GB9811328D0 (en) | 1998-05-27 | 1998-07-22 | Exitech Ltd | The use of mid-infrared lasers for drilling microvia holes in printed circuit (wiring) boards and other electrical circuit interconnection packages |
WO2000009993A1 (en) | 1998-08-10 | 2000-02-24 | Mitsubishi Denki Kabushiki Kaisha | Device for inspecting printed boards |
US6400018B2 (en) | 1998-08-27 | 2002-06-04 | 3M Innovative Properties Company | Via plug adapter |
GB9901586D0 (en) * | 1999-01-25 | 1999-03-17 | Alpha Fry Ltd | Process for the recovery of lead and/or tin or alloys thereof from substrate surfaces |
US6444616B1 (en) * | 1999-02-02 | 2002-09-03 | Bayer Aktiengesellschaft | Substituted p-trifluoromethylphenyluracils |
US6235544B1 (en) | 1999-04-20 | 2001-05-22 | International Business Machines Corporation | Seed metal delete process for thin film repair solutions using direct UV laser |
US6534743B2 (en) | 2001-02-01 | 2003-03-18 | Electro Scientific Industries, Inc. | Resistor trimming with small uniform spot from solid-state UV laser |
US6753612B2 (en) | 2001-04-05 | 2004-06-22 | International Business Machines Corporation | Economical high density chip carrier |
US20030066679A1 (en) | 2001-10-09 | 2003-04-10 | Castro Abram M. | Electrical circuit and method of formation |
US6541712B1 (en) | 2001-12-04 | 2003-04-01 | Teradyhe, Inc. | High speed multi-layer printed circuit board via |
TW558823B (en) | 2002-04-10 | 2003-10-21 | Via Tech Inc | Through-hole process of integrated circuit substrate |
US20040112881A1 (en) | 2002-04-11 | 2004-06-17 | Bloemeke Stephen Roger | Circle laser trepanning |
TWI271131B (en) | 2002-04-23 | 2007-01-11 | Via Tech Inc | Pattern fabrication process of circuit substrate |
TW561803B (en) | 2002-10-24 | 2003-11-11 | Advanced Semiconductor Eng | Circuit substrate and manufacturing method thereof |
TW587322B (en) | 2002-12-31 | 2004-05-11 | Phoenix Prec Technology Corp | Substrate with stacked via and fine circuit thereon, and method for fabricating the same |
US6867121B2 (en) | 2003-01-16 | 2005-03-15 | International Business Machines Corporation | Method of apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction |
US7402758B2 (en) | 2003-10-09 | 2008-07-22 | Qualcomm Incorporated | Telescoping blind via in three-layer core |
US7018219B2 (en) | 2004-02-25 | 2006-03-28 | Rosenau Steven A | Interconnect structure and method for connecting buried signal lines to electrical devices |
US20050190959A1 (en) * | 2004-02-26 | 2005-09-01 | Kohler James P. | Drill hole inspection method for printed circuit board fabrication |
US20050189656A1 (en) | 2004-02-26 | 2005-09-01 | Chun Yee Tan | Micro-vias for electronic packaging |
US7755445B2 (en) * | 2004-08-03 | 2010-07-13 | Banpil Photonics, Inc. | Multi-layered high-speed printed circuit boards comprised of stacked dielectric systems |
US20060091023A1 (en) | 2004-10-28 | 2006-05-04 | Ahsan Bukhari | Assessing micro-via formation PCB substrate manufacturing process |
US7544304B2 (en) * | 2006-07-11 | 2009-06-09 | Electro Scientific Industries, Inc. | Process and system for quality management and analysis of via drilling |
US7817685B2 (en) | 2007-01-26 | 2010-10-19 | Electro Scientific Industries, Inc. | Methods and systems for generating pulse trains for material processing |
US9029731B2 (en) | 2007-01-26 | 2015-05-12 | Electro Scientific Industries, Inc. | Methods and systems for laser processing continuously moving sheet material |
-
2006
- 2006-07-11 US US11/484,531 patent/US7544304B2/en not_active Expired - Fee Related
-
2007
- 2007-07-10 DE DE112007001549T patent/DE112007001549T5/en not_active Withdrawn
- 2007-07-10 SG SG2011047156A patent/SG173323A1/en unknown
- 2007-07-10 JP JP2009519620A patent/JP5330991B2/en not_active Expired - Fee Related
- 2007-07-10 CN CN201310308219.3A patent/CN103358031B/en not_active Expired - Fee Related
- 2007-07-10 TW TW096125078A patent/TWI409007B/en not_active IP Right Cessation
- 2007-07-10 KR KR1020097002627A patent/KR101475530B1/en not_active IP Right Cessation
- 2007-07-10 CN CN2007800258810A patent/CN101490826B/en not_active Expired - Fee Related
- 2007-07-10 GB GB0900113A patent/GB2453286A/en not_active Withdrawn
- 2007-07-10 WO PCT/US2007/073103 patent/WO2008011296A2/en active Application Filing
-
2009
- 2009-03-27 US US12/412,853 patent/US8501021B2/en not_active Expired - Fee Related
-
2013
- 2013-07-25 JP JP2013154629A patent/JP5735589B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5879787A (en) * | 1996-11-08 | 1999-03-09 | W. L. Gore & Associates, Inc. | Method and apparatus for improving wireability in chip modules |
US20020021138A1 (en) * | 1996-11-08 | 2002-02-21 | John J. Budnaitis | Method of wafer level burn-in |
US20050169514A1 (en) * | 1999-05-04 | 2005-08-04 | Speedline Technologies, Inc. | Systems and methods for detecting defects in printed solder paste |
US20040146917A1 (en) * | 2001-08-03 | 2004-07-29 | Nanosphere, Inc. | Nanoparticle imaging system and method |
US20040258310A1 (en) * | 2003-02-14 | 2004-12-23 | The University Of Chicago | Method and system for fractal-based analysis of medical image texture |
US20060037192A1 (en) * | 2004-08-17 | 2006-02-23 | Nokia Corporation | Printed wiring board without traces on surface layers enabling PWB's without solder resist |
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KR20090033383A (en) | 2009-04-02 |
JP2009544154A (en) | 2009-12-10 |
CN101490826B (en) | 2013-08-21 |
JP2013225707A (en) | 2013-10-31 |
US7544304B2 (en) | 2009-06-09 |
CN103358031A (en) | 2013-10-23 |
CN101490826A (en) | 2009-07-22 |
CN103358031B (en) | 2016-07-06 |
US20090179017A1 (en) | 2009-07-16 |
US8501021B2 (en) | 2013-08-06 |
JP5330991B2 (en) | 2013-10-30 |
TW200814876A (en) | 2008-03-16 |
US20080011715A1 (en) | 2008-01-17 |
GB0900113D0 (en) | 2009-02-11 |
SG173323A1 (en) | 2011-08-29 |
WO2008011296A3 (en) | 2008-04-24 |
TWI409007B (en) | 2013-09-11 |
KR101475530B1 (en) | 2014-12-22 |
GB2453286A (en) | 2009-04-01 |
DE112007001549T5 (en) | 2009-05-20 |
JP5735589B2 (en) | 2015-06-17 |
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