WO2008078300A3 - Iii-nitride light emitting diodes grown on templates to reduce strain - Google Patents

Iii-nitride light emitting diodes grown on templates to reduce strain Download PDF

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Publication number
WO2008078300A3
WO2008078300A3 PCT/IB2007/055265 IB2007055265W WO2008078300A3 WO 2008078300 A3 WO2008078300 A3 WO 2008078300A3 IB 2007055265 W IB2007055265 W IB 2007055265W WO 2008078300 A3 WO2008078300 A3 WO 2008078300A3
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Prior art keywords
layer
light emitting
strain
lattice constant
grown
Prior art date
Application number
PCT/IB2007/055265
Other languages
French (fr)
Other versions
WO2008078300A2 (en
Inventor
Patrick N Grillot
Nathan F Gardner
Werner K Goetz
Linda T Romano
Original Assignee
Philips Lumileds Lighting Co
Koninkl Philips Electronics Nv
Patrick N Grillot
Nathan F Gardner
Werner K Goetz
Linda T Romano
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Lumileds Lighting Co, Koninkl Philips Electronics Nv, Patrick N Grillot, Nathan F Gardner, Werner K Goetz, Linda T Romano filed Critical Philips Lumileds Lighting Co
Priority to BRPI0721105-8A priority Critical patent/BRPI0721105A2/en
Priority to JP2009542382A priority patent/JP5754886B2/en
Priority to KR1020097015143A priority patent/KR101505833B1/en
Priority to CN2007800476783A priority patent/CN101636849B/en
Priority to EP07859489.2A priority patent/EP2126984B1/en
Publication of WO2008078300A2 publication Critical patent/WO2008078300A2/en
Publication of WO2008078300A3 publication Critical patent/WO2008078300A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

In a Ill-nitride light emitting device, the device layers (10) including the light emitting layer are grown over a template designed to reduce strain in the device, in particular in the light emitting layer. The template comprises: a first layer (22) grown directly on the substrate (20), the first layer being substantially free of indium; a first substantially single crystal layer (24) grown over the first layer, a second layer (26) grown over the first substantially single crystal layer, wherein the second layer is a non-single crystal layer comprising indium. The device layers are grown over the template, the device layers comprising a Ill- nitride light emitting layer disposed between an n-type region and a p-type region. Reducing the strain in the light emitting device may improve the performance of the device. The template may expand the lattice constant in the light emitting layer over the range of lattice constants available from conventional growth templates. Strain is defined as follows: a given layer has a bulk lattice constant abU|k corresponding to a lattice constant of a free standing material of a same composition as that layer and an in-plane lattice constant aln.pιanβ corresponding to a lattice constant of that layer as grown in the structure. The amount of strain in a layer is | (ajn_p|ane - abu)k) |/ abU|fc In some embodiments, the strain in the light emitting layer is less than 1%.
PCT/IB2007/055265 2006-12-22 2007-12-21 Iii-nitride light emitting diodes grown on templates to reduce strain WO2008078300A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
BRPI0721105-8A BRPI0721105A2 (en) 2006-12-22 2007-12-21 METHOD
JP2009542382A JP5754886B2 (en) 2006-12-22 2007-12-21 III-nitride light-emitting devices grown on templates for strain reduction
KR1020097015143A KR101505833B1 (en) 2006-12-22 2007-12-21 Iii-nitride light emitting diodes grown on templates to reduce strain
CN2007800476783A CN101636849B (en) 2006-12-22 2007-12-21 Iii-nitride light emitting devices grown on templates to reduce strain
EP07859489.2A EP2126984B1 (en) 2006-12-22 2007-12-21 Iii-nitride light emitting diodes grown on templates to reduce strain

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/615,826 2006-12-22
US11/615,826 US7534638B2 (en) 2006-12-22 2006-12-22 III-nitride light emitting devices grown on templates to reduce strain

Publications (2)

Publication Number Publication Date
WO2008078300A2 WO2008078300A2 (en) 2008-07-03
WO2008078300A3 true WO2008078300A3 (en) 2008-10-23

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Family Applications (1)

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PCT/IB2007/055265 WO2008078300A2 (en) 2006-12-22 2007-12-21 Iii-nitride light emitting diodes grown on templates to reduce strain

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US (1) US7534638B2 (en)
EP (1) EP2126984B1 (en)
JP (1) JP5754886B2 (en)
KR (1) KR101505833B1 (en)
CN (1) CN101636849B (en)
BR (1) BRPI0721105A2 (en)
RU (1) RU2466479C2 (en)
TW (1) TWI452717B (en)
WO (1) WO2008078300A2 (en)

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US8674405B1 (en) * 2005-04-13 2014-03-18 Element Six Technologies Us Corporation Gallium—nitride-on-diamond wafers and devices, and methods of manufacture
US7777490B2 (en) 2005-10-11 2010-08-17 Koninklijke Philips Electronics N.V. RF antenna with integrated electronics
US8183577B2 (en) 2009-06-30 2012-05-22 Koninklijke Philips Electronics N.V. Controlling pit formation in a III-nitride device
TWI442455B (en) * 2010-03-29 2014-06-21 Soitec Silicon On Insulator Iii-v semiconductor structures and methods for forming the same
JP5259660B2 (en) * 2010-09-06 2013-08-07 株式会社東芝 Semiconductor light emitting device
US10490697B2 (en) 2011-12-03 2019-11-26 Sensor Electronic Technology, Inc. Epitaxy technique for growing semiconductor compounds
US10158044B2 (en) 2011-12-03 2018-12-18 Sensor Electronic Technology, Inc. Epitaxy technique for growing semiconductor compounds
US9831382B2 (en) * 2011-12-03 2017-11-28 Sensor Electronic Technology, Inc. Epitaxy technique for growing semiconductor compounds
US10211048B2 (en) 2012-02-01 2019-02-19 Sensor Electronic Technology, Inc. Epitaxy technique for reducing threading dislocations in stressed semiconductor compounds
JP6316210B2 (en) * 2012-02-28 2018-04-25 コーニンクレッカ フィリップス エヌ ヴェKoninklijke Philips N.V. Integration of gallium nitride LEDs with aluminum gallium nitride / gallium nitride devices on a silicon substrate for AC LEDs
JP5228122B1 (en) 2012-03-08 2013-07-03 株式会社東芝 Nitride semiconductor device and nitride semiconductor wafer
CN103682005B (en) * 2012-09-12 2016-12-07 顾玉奎 LED epitaxial growth processing procedure
US9412902B2 (en) 2014-02-22 2016-08-09 Sensor Electronic Technology, Inc. Semiconductor structure with stress-reducing buffer structure
US10199535B2 (en) 2014-02-22 2019-02-05 Sensor Electronic Technology, Inc. Semiconductor structure with stress-reducing buffer structure
CN111316452B (en) * 2019-09-30 2021-11-23 重庆康佳光电技术研究院有限公司 Epitaxial structure, preparation method thereof and LED

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Also Published As

Publication number Publication date
TWI452717B (en) 2014-09-11
TW200845427A (en) 2008-11-16
JP5754886B2 (en) 2015-07-29
RU2009128204A (en) 2011-01-27
CN101636849A (en) 2010-01-27
BRPI0721105A2 (en) 2014-03-04
WO2008078300A2 (en) 2008-07-03
KR101505833B1 (en) 2015-03-25
EP2126984B1 (en) 2018-09-05
US20080153191A1 (en) 2008-06-26
CN101636849B (en) 2011-06-29
US7534638B2 (en) 2009-05-19
EP2126984A2 (en) 2009-12-02
RU2466479C2 (en) 2012-11-10
JP2010514192A (en) 2010-04-30
KR20090094150A (en) 2009-09-03

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