WO2008082641A3 - Multi-mode parallel graphics processing systems and methods - Google Patents

Multi-mode parallel graphics processing systems and methods Download PDF

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Publication number
WO2008082641A3
WO2008082641A3 PCT/US2007/026466 US2007026466W WO2008082641A3 WO 2008082641 A3 WO2008082641 A3 WO 2008082641A3 US 2007026466 W US2007026466 W US 2007026466W WO 2008082641 A3 WO2008082641 A3 WO 2008082641A3
Authority
WO
WIPO (PCT)
Prior art keywords
graphics
graphics processing
parallel
time
mode
Prior art date
Application number
PCT/US2007/026466
Other languages
French (fr)
Other versions
WO2008082641A2 (en
Inventor
Reuven Bakalash
Yaniv Leviathan
Original Assignee
Lucid Information Technology Ltd
Reuven Bakalash
Yaniv Leviathan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/648,160 external-priority patent/US8497865B2/en
Priority claimed from US11/789,039 external-priority patent/US20070291040A1/en
Application filed by Lucid Information Technology Ltd, Reuven Bakalash, Yaniv Leviathan filed Critical Lucid Information Technology Ltd
Priority to CA002674351A priority Critical patent/CA2674351A1/en
Priority to US12/077,072 priority patent/US20090027383A1/en
Publication of WO2008082641A2 publication Critical patent/WO2008082641A2/en
Priority to US12/231,296 priority patent/US20090179894A1/en
Priority to US12/231,304 priority patent/US8284207B2/en
Priority to US12/231,295 priority patent/US20090128550A1/en
Publication of WO2008082641A3 publication Critical patent/WO2008082641A3/en
Priority to US13/646,710 priority patent/US20130120410A1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/10—Protocols in which an application is distributed across nodes in the network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/501—Performance criteria
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2210/00—Indexing scheme for image generation or computer graphics
    • G06T2210/52—Parallel processing

Abstract

Computing systems, including PC-level computers, game console systems, application servers and the like, running single-user or multi-user graphics-based applications (e.g. interactive games), are provided with a multi-mode parallel graphics processing system (MMPGPS) having multiple graphics processing pipelines (GPPLs) that support parallel graphics rendering processes having time, frame/image and object division modes of parallel operation, wherein the mode of parallel operation, at any instant in time during run-time of the graphics-based application, is automatically controlled to optimally meet the graphics requirements of the graphics-based application and achieve significant levels of system performance.
PCT/US2007/026466 2003-11-19 2007-12-28 Multi-mode parallel graphics processing systems and methods WO2008082641A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
CA002674351A CA2674351A1 (en) 2006-12-31 2007-12-28 Multi-mode parallel graphics processing systems and methods
US12/077,072 US20090027383A1 (en) 2003-11-19 2008-03-14 Computing system parallelizing the operation of multiple graphics processing pipelines (GPPLs) and supporting depth-less based image recomposition
US12/231,296 US20090179894A1 (en) 2003-11-19 2008-08-29 Computing system capable of parallelizing the operation of multiple graphics processing pipelines (GPPLS)
US12/231,304 US8284207B2 (en) 2003-11-19 2008-08-29 Method of generating digital images of objects in 3D scenes while eliminating object overdrawing within the multiple graphics processing pipeline (GPPLS) of a parallel graphics processing system generating partial color-based complementary-type images along the viewing direction using black pixel rendering and subsequent recompositing operations
US12/231,295 US20090128550A1 (en) 2003-11-19 2008-08-29 Computing system supporting parallel 3D graphics processes based on the division of objects in 3D scenes
US13/646,710 US20130120410A1 (en) 2003-11-19 2012-10-07 Multi-pass method of generating an image frame of a 3d scene using an object-division based parallel graphics rendering process

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US11/648,160 US8497865B2 (en) 2006-12-31 2006-12-31 Parallel graphics system employing multiple graphics processing pipelines with multiple graphics processing units (GPUS) and supporting an object division mode of parallel graphics processing using programmable pixel or vertex processing resources provided with the GPUS
US11/648,160 2006-12-31
US11/789,039 2007-04-23
US11/789,039 US20070291040A1 (en) 2005-01-25 2007-04-23 Multi-mode parallel graphics rendering system supporting dynamic profiling of graphics-based applications and automatic control of parallel modes of operation
US11/897,536 2007-08-30
US11/897,536 US7961194B2 (en) 2003-11-19 2007-08-30 Method of controlling in real time the switching of modes of parallel operation of a multi-mode parallel graphics processing subsystem embodied within a host computing system

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US11/789,039 Continuation-In-Part US20070291040A1 (en) 2003-11-19 2007-04-23 Multi-mode parallel graphics rendering system supporting dynamic profiling of graphics-based applications and automatic control of parallel modes of operation

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/897,536 Continuation-In-Part US7961194B2 (en) 2003-11-19 2007-08-30 Method of controlling in real time the switching of modes of parallel operation of a multi-mode parallel graphics processing subsystem embodied within a host computing system

Publications (2)

Publication Number Publication Date
WO2008082641A2 WO2008082641A2 (en) 2008-07-10
WO2008082641A3 true WO2008082641A3 (en) 2008-10-09

Family

ID=39589133

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/026466 WO2008082641A2 (en) 2003-11-19 2007-12-28 Multi-mode parallel graphics processing systems and methods

Country Status (3)

Country Link
US (3) US7961194B2 (en)
CA (1) CA2674351A1 (en)
WO (1) WO2008082641A2 (en)

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